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/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Darm-pl08x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: dma-controller.yaml#
22 - arm,pl080
23 - arm,pl081
25 - compatible
[all …]
H A Dlpc1850-dmamux.txt4 - compatible: "nxp,lpc1850-dmamux"
5 - reg: Memory map for accessing module
6 - #dma-cells: Should be set to <3>.
8 * 2nd cell contain the mux value (0-3) for the peripheral
11 - dma-requests: Number of DMA requests for the mux
12 - dma-masters: phandle pointing to the DMA controller
15 - dma-requests: Number of DMA requests the controller can handle
20 compatible = "nxp,lpc1850-gpdma", "arm,pl080", "arm,primecell";
21 arm,primecell-periphid = <0x00041080>;
25 clock-names = "apb_pclk";
[all …]
/openbmc/linux/drivers/dma/
H A Damba-pl08x.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (c) 2010 ST-Ericsson SA
23 * The PL080 has a dual bus master, PL081 has a single master.
27 * - CH_CONFIG register at different offset,
28 * - separate CH_CONTROL2 register for transfer size,
29 * - bigger maximum transfer size,
30 * - 8-word aligned LLI, instead of 4-word, due to extra CCTL2 word,
31 * - no support for peripheral flow control.
45 * (Bursts are irrelevant for mem to mem transfers - there are no burst
51 * - DMAC flow control: the transfer size defines the number of transfers
[all …]
/openbmc/linux/drivers/staging/media/atomisp/pci/isp/kernels/sdis/sdis_2/
H A Dia_css_sdis2.host.c1 // SPDX-License-Identifier: GPL-2.0
29 fill_row(short *private, const short *public, unsigned int width, in fill_row() argument
32 memcpy(private, public, width * sizeof(short)); in fill_row()
33 memset(&private[width], 0, padding * sizeof(short)); in fill_row()
41 unsigned int aligned_width = from->grid.aligned_width * in ia_css_sdis2_horicoef_vmem_encode()
42 from->grid.bqs_per_grid_cell; in ia_css_sdis2_horicoef_vmem_encode()
43 unsigned int width = from->grid.num_hor_coefs; in ia_css_sdis2_horicoef_vmem_encode() local
44 int padding = aligned_width - width; in ia_css_sdis2_horicoef_vmem_encode()
55 fill_row(&private[0 * stride], from->hor_coefs.odd_real, width, padding); in ia_css_sdis2_horicoef_vmem_encode()
56 fill_row(&private[1 * stride], from->hor_coefs.odd_imag, width, padding); in ia_css_sdis2_horicoef_vmem_encode()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dmtd-physmap.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mtd/mtd-physmap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
10 - Rob Herring <robh@kernel.org>
17 - $ref: mtd.yaml#
18 - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml#
23 - items:
24 - enum:
[all …]
/openbmc/u-boot/doc/device-tree-bindings/mtd/
H A Dmtd-physmap.txt1 CFI or JEDEC memory-mapped NOR flash, MTD-RAM (NVRAM...)
6 - compatible : should contain the specific model of mtd chip(s)
7 used, if known, followed by either "cfi-flash", "jedec-flash",
8 "mtd-ram" or "mtd-rom".
9 - reg : Address range(s) of the mtd chip(s)
11 non-identical chips can be described in one node.
12 - bank-width : Width (in bytes) of the bank. Equal to the
13 device width times the number of interleaved chips.
14 - device-width : (optional) Width of a single mtd chip. If
15 omitted, assumed to be equal to 'bank-width'.
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-39x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
31 #address-cells = <1>;
32 #size-cells = <0>;
33 enable-method = "marvell,armada-390-smp";
37 compatible = "arm,cortex-a9";
[all …]
H A Darmada-375.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/phy/phy.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
35 compatible = "fixed-clock";
36 #clock-cells = <0>;
[all …]
H A Darmada-xp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
16 #include "armada-370-xp.dtsi"
19 #address-cells = <2>;
20 #size-cells = <2>;
23 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
31 compatible = "marvell,armadaxp-mbus", "simple-bus";
38 internal-regs {
40 compatible = "marvell,armada-xp-sdram-controller";
[all …]
/openbmc/linux/drivers/acpi/acpica/
H A Dexregion.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: exregion - ACPI default op_region (address space) handlers
6 * Copyright (C) 2000 - 2023, Intel Corp.
21 * PARAMETERS: function - Read or Write operation
22 * address - Where in the space to read or write
23 * bit_width - Field width in bits (8, 16, or 32)
24 * value - Pointer to in or out value
25 * handler_context - Pointer to Handler's context
26 * region_context - Pointer to context specific to the
44 struct acpi_mem_mapping *mm = mem_info->cur_mm; in acpi_ex_system_memory_space_handler()
[all …]
/openbmc/qemu/hw/pci-bridge/
H A Dcxl_upstream.c8 * SPDX-License-Identifier: GPL-2.0-or-later
13 #include "hw/qdev-properties.h"
14 #include "hw/qdev-properties-system.h"
18 #include "hw/pci-bridge/cxl_upstream_port.h"
37 return &usp->cxl_cstate; in cxl_usp_to_cstate()
45 if (range_contains(&usp->cxl_cstate.dvsecs[EXTENSIONS_PORT_DVSEC], addr)) { in cxl_usp_dvsec_write_config()
46 uint8_t *reg = &dev->config[addr]; in cxl_usp_dvsec_write_config()
47 addr -= usp->cxl_cstate.dvsecs[EXTENSIONS_PORT_DVSEC].lob; in cxl_usp_dvsec_write_config()
67 pcie_doe_write_config(&usp->doe_cdat, address, val, len); in cxl_usp_write_config()
80 if (pcie_doe_read_config(&usp->doe_cdat, address, len, &val)) { in cxl_usp_read_config()
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0+
15 #include <asm/arch-tegra/clk_rst.h>
34 .compatible = "nvidia,tegra20-nand",
41 * OOB flash layout for Tegra with Reed-Solomon 4 symbol correct ECC:
91 struct gpio_desc wp_gpio; /* write-protect GPIO */
92 s32 width; /* bit width, normally 8 */ member
112 * 1 - Command completed
113 * 0 - Timeout
122 if ((readl(&reg->command) & CMD_GO) || in nand_waitfor_cmd_completion()
123 !(readl(&reg->status) & STATUS_RBSY0) || in nand_waitfor_cmd_completion()
[all …]
/openbmc/linux/drivers/media/pci/saa7164/
H A Dsaa7164-api.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2010-2015 Steven Toth <stoth@kernellabs.com>
22 i->deviceinst = 0; in saa7164_api_get_load_info()
23 i->devicespec = 0; in saa7164_api_get_load_info()
24 i->mode = 0; in saa7164_api_get_load_info()
25 i->status = 0; in saa7164_api_get_load_info()
32 printk(KERN_INFO "saa7164[%d]-CPU: %d percent", dev->nr, i->CPULoad); in saa7164_api_get_load_info()
45 while (more--) { in saa7164_api_collect_debug()
58 printk(KERN_INFO "saa7164[%d]-FWMSG: %s", dev->nr, in saa7164_api_collect_debug()
93 struct saa7164_dev *dev = port->dev; in saa7164_api_set_vbi_format()
[all …]
/openbmc/u-boot/board/freescale/t102xrdb/
H A Dddr.c1 // SPDX-License-Identifier: GPL-2.0+
55 struct cpu_type *cpu = gd->arch.cpu; in fsl_ddr_board_options()
61 if (!pdimm->n_ranks) in fsl_ddr_board_options()
70 while (pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
71 if (pbsp->n_ranks == pdimm->n_ranks && in fsl_ddr_board_options()
72 (pdimm->rank_density >> 30) >= pbsp->rank_gb) { in fsl_ddr_board_options()
73 if (ddr_freq <= pbsp->datarate_mhz_high) { in fsl_ddr_board_options()
74 popts->clk_adjust = pbsp->clk_adjust; in fsl_ddr_board_options()
75 popts->wrlvl_start = pbsp->wrlvl_start; in fsl_ddr_board_options()
76 popts->wrlvl_ctl_2 = pbsp->wrlvl_ctl_2; in fsl_ddr_board_options()
[all …]
/openbmc/linux/drivers/net/wireless/quantenna/qtnfmac/
H A Devent.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (c) 2015-2016 Quantenna Communications. All rights reserved. */
12 #include "bus.h"
34 mac->macid, vif->vifid, len, sizeof(*sta_assoc)); in qtnf_event_handle_sta_assoc()
35 return -EINVAL; in qtnf_event_handle_sta_assoc()
38 if (vif->wdev.iftype != NL80211_IFTYPE_AP) { in qtnf_event_handle_sta_assoc()
40 mac->macid, vif->vifid); in qtnf_event_handle_sta_assoc()
41 return -EPROTO; in qtnf_event_handle_sta_assoc()
46 return -ENOMEM; in qtnf_event_handle_sta_assoc()
48 sta_addr = sta_assoc->sta_addr; in qtnf_event_handle_sta_assoc()
[all …]
/openbmc/u-boot/drivers/ddr/fsl/
H A Dddr3_dimm_params.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2008-2012 Freescale Semiconductor, Inc.
8 * JEDEC standard No.21-C 4_01_02_11R18.pdf
21 * sdram capacity(bit) / 8 * primary bus width / sdram width
24 * primary bus width = spd byte8[2:0]
25 * sdram width = spd byte7[2:0]
27 * SPD byte4 - sdram density and banks
37 * SPD byte8 - module memory bus width
38 * bit[2:0] primary bus width
44 * SPD byte7 - module organiztion
[all …]
H A Dddr4_dimm_params.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014-2016 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018 NXP Semiconductor
8 * JEDEC standard No.21-C 4_01_02_12R23A.pdf
23 * sdram capacity(bit) / 8 * primary bus width / sdram width
27 * primary bus width = spd byte13[2:0]
28 * sdram width = spd byte12[2:0]
35 * SPD byte4 - sdram density and banks
46 * SPD byte13 - module memory bus width
47 * bit[2:0] primary bus width
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/keystone/
H A Dkeystone-k2g.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/pinctrl/keystone.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
32 #address-cells = <1>;
33 #size-cells = <0>;
[all …]
/openbmc/linux/drivers/thunderbolt/
H A Dxdomain.c1 // SPDX-License-Identifier: GPL-2.0
79 /* UUID for XDomain discovery protocol: b638d70e-42ff-40bb-97c2-90e2c0b2ff07 */
92 switch (pkg->frame.eof) { in tb_xdomain_match()
97 const struct tb_xdp_header *res_hdr = pkg->buffer; in tb_xdomain_match()
98 const struct tb_xdp_header *req_hdr = req->request; in tb_xdomain_match()
100 if (pkg->frame.size < req->response_size / 4) in tb_xdomain_match()
104 if ((res_hdr->xd_hdr.route_hi & ~BIT(31)) != in tb_xdomain_match()
105 req_hdr->xd_hdr.route_hi) in tb_xdomain_match()
107 if ((res_hdr->xd_hdr.route_lo) != req_hdr->xd_hdr.route_lo) in tb_xdomain_match()
111 if (!uuid_equal(&res_hdr->uuid, &req_hdr->uuid)) in tb_xdomain_match()
[all …]
/openbmc/linux/include/linux/amba/
H A Dpl08x.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/amba/pl08x.h - ARM PrimeCell DMA Controller driver
6 * Copyright (C) 2010 ST-Ericsson SA
32 * struct pl08x_channel_data - data structure to pass info between
84 * struct pl08x_platform_data - the platform configuration for the PL08x
91 * @memcpy_burst_size: the appropriate burst size for memcpy operations
92 * @memcpy_bus_width: memory bus width
93 * @memcpy_prot_buff: whether memcpy DMA is bufferable
94 * @memcpy_prot_cache: whether memcpy DMA is cacheable
/openbmc/u-boot/arch/arm/dts/
H A Darmada-375.dtsi6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9 * This file is dual-licensed: you can use it either under the terms
49 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 #include <dt-bindings/interrupt-controller/irq.h>
51 #include <dt-bindings/phy/phy.h>
70 compatible = "fixed-clock";
71 #clock-cells = <0>;
72 clock-frequency = <1000000000>;
76 compatible = "fixed-clock";
[all …]
H A Darmada-xp.dtsi7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
11 * This file is dual-licensed: you can use it either under the terms
53 #include "armada-370-xp.dtsi"
57 compatible = "marvell,armadaxp", "marvell,armada-370-xp";
65 compatible = "marvell,armadaxp-mbus", "simple-bus";
66 u-boot,dm-pre-reloc;
73 internal-regs {
75 compatible = "marvell,armada-xp-sdram-controller";
79 L2: l2-cache {
[all …]
/openbmc/linux/samples/vfio-mdev/
H A Dmdpy.c1 // SPDX-License-Identifier: GPL-2.0
5 * See mdpy-defs.h for device specs
30 #include "mdpy-defs.h"
53 u32 width; member
58 .type.pretty_name = MDPY_CLASS_NAME "-" MDPY_TYPE_1,
61 .width = 640,
65 .type.pretty_name = MDPY_CLASS_NAME "-" MDPY_TYPE_2,
68 .width = 1024,
72 .type.pretty_name = MDPY_CLASS_NAME "-" MDPY_TYPE_3,
75 .width = 1920,
[all …]
/openbmc/linux/drivers/memory/
H A Demif.c1 // SPDX-License-Identifier: GPL-2.0-only
32 * struct emif_data - Per device static data for driver's use
37 * to this EMIF - read from MR4 register. If there
42 * @base: base address of memory-mapped IO registers.
46 * frequencies, to avoid re-calculating them on
79 u32 type = emif->plat_data->device_info->type; in do_emif_regdump_show()
80 u32 ip_rev = emif->plat_data->ip_rev; in do_emif_regdump_show()
83 regs->freq/1000000); in do_emif_regdump_show()
85 seq_printf(s, "ref_ctrl_shdw\t: 0x%08x\n", regs->ref_ctrl_shdw); in do_emif_regdump_show()
86 seq_printf(s, "sdram_tim1_shdw\t: 0x%08x\n", regs->sdram_tim1_shdw); in do_emif_regdump_show()
[all …]
/openbmc/linux/drivers/ssb/
H A Dsdio.c3 * SDIO-Hostbus related functions
9 * Copyright 2007-2008 Michael Buesch <m@bues.ch>
60 #define SBSDIO_FUNC1_SBADDRMID 0x1000b /* SB Address window Mid (b23-b16) */
61 #define SBSDIO_FUNC1_SBADDRHIGH 0x1000c /* SB Address window High (b24-b31) */
71 #define SBSDIO_SB_ACCESS_2_4B_FLAG 0x8000 /* forces 32-bit SB access */
78 * ------- ------- ------------------------------------------
85 * In order to access the contents of a 32-bit Silicon Backplane address
94 * a 32-bit access flag
104 static inline struct device *ssb_sdio_dev(struct ssb_bus *bus) in ssb_sdio_dev() argument
106 return &bus->host_sdio->dev; in ssb_sdio_dev()
[all …]

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