Lines Matching +full:memcpy +full:- +full:bus +full:- +full:width
1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2014-2016 Freescale Semiconductor, Inc.
4 * Copyright 2017-2018 NXP Semiconductor
8 * JEDEC standard No.21-C 4_01_02_12R23A.pdf
23 * sdram capacity(bit) / 8 * primary bus width / sdram width
27 * primary bus width = spd byte13[2:0]
28 * sdram width = spd byte12[2:0]
35 * SPD byte4 - sdram density and banks
46 * SPD byte13 - module memory bus width
47 * bit[2:0] primary bus width
53 * SPD byte12 - module organization
54 * bit[2:0] sdram device width
60 * SPD byte12 - module organization
67 * SPD byte6 - SDRAM package type
78 * SPD byte6 - SRAM package type
96 if ((spd->density_banks & 0xf) <= 7) in compute_ranksize()
97 nbit_sdram_cap_bsize = (spd->density_banks & 0xf) + 28; in compute_ranksize()
98 if ((spd->bus_width & 0x7) < 4) in compute_ranksize()
99 nbit_primary_bus_width = (spd->bus_width & 0x7) + 3; in compute_ranksize()
100 if ((spd->organization & 0x7) < 4) in compute_ranksize()
101 nbit_sdram_width = (spd->organization & 0x7) + 2; in compute_ranksize()
102 package_3ds = (spd->package_type & 0x3) == 0x2; in compute_ranksize()
103 if ((spd->package_type & 0x80) && !package_3ds) { /* other than 3DS */ in compute_ranksize()
108 die_count = (spd->package_type >> 4) & 0x7; in compute_ranksize()
110 bsize = 1ULL << (nbit_sdram_cap_bsize - 3 + in compute_ranksize()
111 nbit_primary_bus_width - nbit_sdram_width + in compute_ranksize()
120 (mtb * pdimm->mtb_ps + (ftb * pdimm->ftb_10th_ps) / 10)
143 if (spd->mem_type) { in ddr_compute_dimm_parameters()
144 if (spd->mem_type != SPD_MEMTYPE_DDR4) { in ddr_compute_dimm_parameters()
165 memset(pdimm->mpart, 0, sizeof(pdimm->mpart)); in ddr_compute_dimm_parameters()
166 if ((spd->info_size_crc & 0xF) > 2) in ddr_compute_dimm_parameters()
167 memcpy(pdimm->mpart, spd->mpart, sizeof(pdimm->mpart) - 1); in ddr_compute_dimm_parameters()
170 pdimm->n_ranks = ((spd->organization >> 3) & 0x7) + 1; in ddr_compute_dimm_parameters()
171 pdimm->rank_density = compute_ranksize(spd); in ddr_compute_dimm_parameters()
172 pdimm->capacity = pdimm->n_ranks * pdimm->rank_density; in ddr_compute_dimm_parameters()
173 pdimm->die_density = spd->density_banks & 0xf; in ddr_compute_dimm_parameters()
174 pdimm->primary_sdram_width = 1 << (3 + (spd->bus_width & 0x7)); in ddr_compute_dimm_parameters()
175 if ((spd->bus_width >> 3) & 0x3) in ddr_compute_dimm_parameters()
176 pdimm->ec_sdram_width = 8; in ddr_compute_dimm_parameters()
178 pdimm->ec_sdram_width = 0; in ddr_compute_dimm_parameters()
179 pdimm->data_width = pdimm->primary_sdram_width in ddr_compute_dimm_parameters()
180 + pdimm->ec_sdram_width; in ddr_compute_dimm_parameters()
181 pdimm->device_width = 1 << ((spd->organization & 0x7) + 2); in ddr_compute_dimm_parameters()
182 pdimm->package_3ds = (spd->package_type & 0x3) == 0x2 ? in ddr_compute_dimm_parameters()
183 (spd->package_type >> 4) & 0x7 : 0; in ddr_compute_dimm_parameters()
186 pdimm->mirrored_dimm = 0; in ddr_compute_dimm_parameters()
187 pdimm->registered_dimm = 0; in ddr_compute_dimm_parameters()
188 switch (spd->module_type & DDR4_SPD_MODULETYPE_MASK) { in ddr_compute_dimm_parameters()
191 pdimm->registered_dimm = 1; in ddr_compute_dimm_parameters()
192 if (spd->mod_section.registered.reg_map & 0x1) in ddr_compute_dimm_parameters()
193 pdimm->mirrored_dimm = 1; in ddr_compute_dimm_parameters()
194 val = spd->mod_section.registered.ca_stren; in ddr_compute_dimm_parameters()
195 pdimm->rcw[3] = val >> 4; in ddr_compute_dimm_parameters()
196 pdimm->rcw[4] = ((val & 0x3) << 2) | ((val & 0xc) >> 2); in ddr_compute_dimm_parameters()
197 val = spd->mod_section.registered.clk_stren; in ddr_compute_dimm_parameters()
198 pdimm->rcw[5] = ((val & 0x3) << 2) | ((val & 0xc) >> 2); in ddr_compute_dimm_parameters()
200 pdimm->rcw[6] = 0xf; in ddr_compute_dimm_parameters()
205 pdimm->rcw[8] = pdimm->die_density >= 0x6 ? 0x0 : 0x8 | in ddr_compute_dimm_parameters()
206 (pdimm->package_3ds > 0x3 ? 0x0 : in ddr_compute_dimm_parameters()
207 (pdimm->package_3ds > 0x1 ? 0x1 : in ddr_compute_dimm_parameters()
208 (pdimm->package_3ds > 0 ? 0x2 : 0x3))); in ddr_compute_dimm_parameters()
209 if (pdimm->package_3ds || pdimm->n_ranks != 4) in ddr_compute_dimm_parameters()
210 pdimm->rcw[13] = 0xc; in ddr_compute_dimm_parameters()
212 pdimm->rcw[13] = 0xd; /* Fix encoded by board */ in ddr_compute_dimm_parameters()
219 if (spd->mod_section.unbuffered.addr_mapping & 0x1) in ddr_compute_dimm_parameters()
220 pdimm->mirrored_dimm = 1; in ddr_compute_dimm_parameters()
221 if ((spd->mod_section.unbuffered.mod_height & 0xe0) == 0 && in ddr_compute_dimm_parameters()
222 (spd->mod_section.unbuffered.ref_raw_card == 0x04)) { in ddr_compute_dimm_parameters()
225 if (spd->mapping[i] == udimm_rc_e_dq[i]) in ddr_compute_dimm_parameters()
229 60 + i, spd->mapping[i], in ddr_compute_dimm_parameters()
231 ptr = (u8 *)&spd->mapping[i]; in ddr_compute_dimm_parameters()
240 printf("unknown module_type 0x%02X\n", spd->module_type); in ddr_compute_dimm_parameters()
245 pdimm->n_row_addr = ((spd->addressing >> 3) & 0x7) + 12; in ddr_compute_dimm_parameters()
246 pdimm->n_col_addr = (spd->addressing & 0x7) + 9; in ddr_compute_dimm_parameters()
247 pdimm->bank_addr_bits = (spd->density_banks >> 4) & 0x3; in ddr_compute_dimm_parameters()
248 pdimm->bank_group_bits = (spd->density_banks >> 6) & 0x3; in ddr_compute_dimm_parameters()
253 * when the extension bus exist in ddr_compute_dimm_parameters()
255 if (pdimm->ec_sdram_width) in ddr_compute_dimm_parameters()
256 pdimm->edc_config = 0x02; in ddr_compute_dimm_parameters()
258 pdimm->edc_config = 0x00; in ddr_compute_dimm_parameters()
263 * BL8 -bit3, BC4 -bit2 in ddr_compute_dimm_parameters()
265 pdimm->burst_lengths_bitmask = 0x0c; in ddr_compute_dimm_parameters()
267 /* MTB - medium timebase in ddr_compute_dimm_parameters()
270 * FTB - fine timebase in ddr_compute_dimm_parameters()
274 if ((spd->timebases & 0xf) == 0x0) { in ddr_compute_dimm_parameters()
275 pdimm->mtb_ps = 125; in ddr_compute_dimm_parameters()
276 pdimm->ftb_10th_ps = 10; in ddr_compute_dimm_parameters()
283 pdimm->tckmin_x_ps = spd_to_ps(spd->tck_min, spd->fine_tck_min); in ddr_compute_dimm_parameters()
286 pdimm->tckmax_ps = spd_to_ps(spd->tck_max, spd->fine_tck_max); in ddr_compute_dimm_parameters()
290 * bit0 - CL7 in ddr_compute_dimm_parameters()
291 * bit4 - CL11 in ddr_compute_dimm_parameters()
292 * bit8 - CL15 in ddr_compute_dimm_parameters()
293 * bit12- CL19 in ddr_compute_dimm_parameters()
294 * bit16- CL23 in ddr_compute_dimm_parameters()
296 pdimm->caslat_x = (spd->caslat_b1 << 7) | in ddr_compute_dimm_parameters()
297 (spd->caslat_b2 << 15) | in ddr_compute_dimm_parameters()
298 (spd->caslat_b3 << 23); in ddr_compute_dimm_parameters()
300 BUG_ON(spd->caslat_b4 != 0); in ddr_compute_dimm_parameters()
305 pdimm->taa_ps = spd_to_ps(spd->taa_min, spd->fine_taa_min); in ddr_compute_dimm_parameters()
310 pdimm->trcd_ps = spd_to_ps(spd->trcd_min, spd->fine_trcd_min); in ddr_compute_dimm_parameters()
315 pdimm->trp_ps = spd_to_ps(spd->trp_min, spd->fine_trp_min); in ddr_compute_dimm_parameters()
318 pdimm->tras_ps = (((spd->tras_trc_ext & 0xf) << 8) + in ddr_compute_dimm_parameters()
319 spd->tras_min_lsb) * pdimm->mtb_ps; in ddr_compute_dimm_parameters()
322 pdimm->trc_ps = spd_to_ps((((spd->tras_trc_ext & 0xf0) << 4) + in ddr_compute_dimm_parameters()
323 spd->trc_min_lsb), spd->fine_trc_min); in ddr_compute_dimm_parameters()
325 pdimm->trfc1_ps = ((spd->trfc1_min_msb << 8) | (spd->trfc1_min_lsb)) * in ddr_compute_dimm_parameters()
326 pdimm->mtb_ps; in ddr_compute_dimm_parameters()
327 pdimm->trfc2_ps = ((spd->trfc2_min_msb << 8) | (spd->trfc2_min_lsb)) * in ddr_compute_dimm_parameters()
328 pdimm->mtb_ps; in ddr_compute_dimm_parameters()
329 pdimm->trfc4_ps = ((spd->trfc4_min_msb << 8) | (spd->trfc4_min_lsb)) * in ddr_compute_dimm_parameters()
330 pdimm->mtb_ps; in ddr_compute_dimm_parameters()
332 pdimm->tfaw_ps = (((spd->tfaw_msb & 0xf) << 8) | spd->tfaw_min) * in ddr_compute_dimm_parameters()
333 pdimm->mtb_ps; in ddr_compute_dimm_parameters()
336 pdimm->trrds_ps = spd_to_ps(spd->trrds_min, spd->fine_trrds_min); in ddr_compute_dimm_parameters()
338 pdimm->trrdl_ps = spd_to_ps(spd->trrdl_min, spd->fine_trrdl_min); in ddr_compute_dimm_parameters()
340 pdimm->tccdl_ps = spd_to_ps(spd->tccdl_min, spd->fine_tccdl_min); in ddr_compute_dimm_parameters()
342 if (pdimm->package_3ds) { in ddr_compute_dimm_parameters()
343 if (pdimm->die_density <= 0x4) { in ddr_compute_dimm_parameters()
344 pdimm->trfc_slr_ps = 260000; in ddr_compute_dimm_parameters()
345 } else if (pdimm->die_density <= 0x5) { in ddr_compute_dimm_parameters()
346 pdimm->trfc_slr_ps = 350000; in ddr_compute_dimm_parameters()
349 pdimm->die_density); in ddr_compute_dimm_parameters()
357 pdimm->refresh_rate_ps = 7800000; in ddr_compute_dimm_parameters()
360 pdimm->dq_mapping[i] = spd->mapping[i]; in ddr_compute_dimm_parameters()
362 pdimm->dq_mapping_ors = ((spd->mapping[0] >> 6) & 0x3) == 0 ? 1 : 0; in ddr_compute_dimm_parameters()