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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,dp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11 - Jitao shi <jitao.shi@mediatek.com>
24 - mediatek,mt8195-dp-tx
25 - mediatek,mt8195-edp-tx
30 nvmem-cells:
34 nvmem-cell-names:
37 power-domains:
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/openbmc/linux/drivers/gpu/drm/mediatek/
H A Dmtk_dp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019-2022 MediaTek Inc.
18 #include <linux/arm-smccc.h>
23 #include <linux/media-bus-format.h>
24 #include <linux/nvmem-consumer.h>
33 #include <sound/hdmi-codec.h>
317 .name = "mtk-dp-registers",
330 ret = regmap_read(mtk_dp->regs, offset, &read_val); in mtk_dp_read()
332 dev_err(mtk_dp->dev, "Failed to read register 0x%x: %d\n", in mtk_dp_read()
342 int ret = regmap_write(mtk_dp->regs, offset, val); in mtk_dp_write()
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/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8195.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8195-clk.h>
9 #include <dt-bindings/gce/mt8195-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8195-memory-port.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
15 #include <dt-bindings/power/mt8195-power.h>
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/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_reg.h18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
44 * registers that are defined solely for the use by function-like macros.
52 * should be defined using function-like macros.
58 * with underscore, followed by a function-like macro choosing the right
68 * function-like macros may be used to define bit fields, but do note that the
87 * Try to re-use existing register macro definitions. Only add new macros for
206 #define DPIO_POST_DIV_HDMIDP 1 /* DAC 225-400M rate */
553 _MMIO(BXT_PHY_BASE(phy) - _BXT_PHY0_BASE + (reg))
556 (BXT_PHY_BASE(phy) + _PIPE((ch), (reg_ch0) - _BXT_PHY0_BASE, \
557 (reg_ch1) - _BXT_PHY0_BASE))
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