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/openbmc/linux/drivers/net/pcs/
H A Dpcs-lynx.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Lynx PCS MDIO helpers
8 #include <linux/pcs-lynx.h>
11 #define SGMII_CLOCK_PERIOD_NS 8 /* PCS is clocked at 125 MHz */
24 struct phylink_pcs pcs; member
35 #define phylink_pcs_to_lynx(pl_pcs) container_of((pl_pcs), struct lynx_pcs, pcs)
36 #define lynx_to_phylink_pcs(lynx) (&(lynx)->pcs) argument
38 static void lynx_pcs_get_state_usxgmii(struct mdio_device *pcs, in lynx_pcs_get_state_usxgmii() argument
41 struct mii_bus *bus = pcs->bus; in lynx_pcs_get_state_usxgmii()
42 int addr = pcs->addr; in lynx_pcs_get_state_usxgmii()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Makefile for Linux PCS drivers
4 pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-nxp.o pcs-xpcs-wx.o
6 obj-$(CONFIG_PCS_XPCS) += pcs_xpcs.o
7 obj-$(CONFIG_PCS_LYNX) += pcs-lynx.o
8 obj-$(CONFIG_PCS_MTK_LYNXI) += pcs-mtk-lynxi.o
9 obj-$(CONFIG_PCS_RZN1_MIIC) += pcs-rzn1-miic.o
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # PCS Layer Configuration
6 menu "PCS device drivers"
18 This module provides helpers to phylink for managing the Lynx PCS
25 This module provides helpers to phylink for managing the LynxI PCS
33 on RZ/N1 SoCs. This PCS converts MII to RMII/RGMII or can be set in
34 pass-through mode for MII.
/openbmc/linux/Documentation/devicetree/bindings/net/pcs/
H A Dfsl,lynx-pcs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/pcs/fsl,lynx-pcs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Lynx PCS
10 - Ioana Ciornei <ioana.ciornei@nxp.com>
13 NXP Lynx 10G and 28G SerDes have Ethernet PCS devices which can be used as
19 const: fsl,lynx-pcs
25 - compatible
26 - reg
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1043-post.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2015-2016 Freescale Semiconductor Inc.
11 #include "qoriq-fman3-0.dtsi"
12 #include "qoriq-fman3-0-1g-0.dtsi"
13 #include "qoriq-fman3-0-1g-1.dtsi"
14 #include "qoriq-fman3-0-1g-2.dtsi"
15 #include "qoriq-fman3-0-1g-3.dtsi"
16 #include "qoriq-fman3-0-1g-4.dtsi"
17 #include "qoriq-fman3-0-1g-5.dtsi"
18 #include "qoriq-fman3-0-10g-0.dtsi"
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H A Dfsl-ls1046-post.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright 2015-2016 Freescale Semiconductor Inc.
12 #include "qoriq-fman3-0.dtsi"
13 #include "qoriq-fman3-0-1g-0.dtsi"
14 #include "qoriq-fman3-0-1g-1.dtsi"
15 #include "qoriq-fman3-0-1g-2.dtsi"
16 #include "qoriq-fman3-0-1g-3.dtsi"
17 #include "qoriq-fman3-0-1g-4.dtsi"
18 #include "qoriq-fman3-0-1g-5.dtsi"
19 #include "qoriq-fman3-0-10g-0.dtsi"
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/openbmc/linux/include/linux/
H A Dpcs-lynx.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * Lynx PCS helpers
15 void lynx_pcs_destroy(struct phylink_pcs *pcs);
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-fman3-0-10g-1-best-effort.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x9>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
41 fsl,fman-best-effort-port;
45 cell-index = <0x29>;
46 compatible = "fsl,fman-v3-port-tx";
48 fsl,fman-10g-port;
49 fsl,fman-best-effort-port;
53 cell-index = <1>;
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H A Dqoriq-fman3-1-10g-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x30>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x8>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman1_rx_0x10 &fman1_tx_0x30>;
[all …]
H A Dqoriq-fman3-1-10g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x11>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x31>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x9>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman1_rx_0x11 &fman1_tx_0x31>;
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H A Dqoriq-fman3-0-10g-0.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x10>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x30>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x8>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman0_rx_0x10 &fman0_tx_0x30>;
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H A Dqoriq-fman3-0-10g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x11>;
38 compatible = "fsl,fman-v3-port-rx";
40 fsl,fman-10g-port;
44 cell-index = <0x31>;
45 compatible = "fsl,fman-v3-port-tx";
47 fsl,fman-10g-port;
51 cell-index = <0x9>;
52 compatible = "fsl,fman-memac";
54 fsl,fman-ports = <&fman0_rx_0x11 &fman0_tx_0x31>;
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H A Dqoriq-fman3-0-1g-5.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xd>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2d>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <5>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman0_rx_0x0d &fman0_tx_0x2d>;
53 ptp-timer = <&ptp_timer0>;
54 pcsphy-handle = <&pcsphy5>, <&qsgmiib_pcs1>;
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H A Dqoriq-fman3-1-1g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x9>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x29>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <1>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x09 &fman1_tx_0x29>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy9>, <&qsgmiic_pcs1>;
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H A Dqoriq-fman3-0-1g-3.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xb>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2b>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <3>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman0_rx_0x0b &fman0_tx_0x2b>;
53 ptp-timer = <&ptp_timer0>;
54 pcsphy-handle = <&pcsphy3>, <&qsgmiia_pcs3>;
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H A Dqoriq-fman3-0-1g-2.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xa>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2a>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <2>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman0_rx_0x0a &fman0_tx_0x2a>;
53 ptp-timer = <&ptp_timer0>;
54 pcsphy-handle = <&pcsphy2>, <&qsgmiia_pcs2>;
[all …]
H A Dqoriq-fman3-1-1g-3.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xb>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2b>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <3>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x0b &fman1_tx_0x2b>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy11>, <&qsgmiic_pcs3>;
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H A Dqoriq-fman3-1-1g-5.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xd>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2d>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <5>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x0d &fman1_tx_0x2d>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy13>, <&qsgmiid_pcs1>;
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H A Dqoriq-fman3-1-1g-2.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0xa>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x2a>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <2>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman1_rx_0x0a &fman1_tx_0x2a>;
53 ptp-timer = <&ptp_timer1>;
54 pcsphy-handle = <&pcsphy10>, <&qsgmiic_pcs2>;
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H A Dqoriq-fman3-0-1g-1.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
37 cell-index = <0x9>;
38 compatible = "fsl,fman-v3-port-rx";
43 cell-index = <0x29>;
44 compatible = "fsl,fman-v3-port-tx";
49 cell-index = <1>;
50 compatible = "fsl,fman-memac";
52 fsl,fman-ports = <&fman0_rx_0x09 &fman0_tx_0x29>;
53 ptp-timer = <&ptp_timer0>;
54 pcsphy-handle = <&pcsphy1>, <&qsgmiia_pcs1>;
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/openbmc/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpaa2-mac.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 #include <linux/pcs-lynx.h>
9 #include "dpaa2-eth.h"
10 #include "dpaa2-mac.h"
23 if (mac->ver_major == ver_major) in dpaa2_mac_cmp_ver()
24 return mac->ver_minor - ver_minor; in dpaa2_mac_cmp_ver()
25 return mac->ver_major - ver_major; in dpaa2_mac_cmp_ver()
30 mac->features = 0; in dpaa2_mac_detect_features()
34 mac->features |= DPAA2_MAC_FEATURE_PROTOCOL_CHANGE; in dpaa2_mac_detect_features()
61 return -EINVAL; in phy_mode()
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/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
18 #include <linux/pcs/pcs-xpcs.h>
57 #define STMMAC_GET_ENTRY(x, size) ((x + 1) & (size - 1))
190 /* PCS */
269 /* PCS defines */
275 #define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */
280 #define DMA_HW_FEAT_HDSEL 0x00000004 /* Half-Duplex Support */
284 #define DMA_HW_FEAT_PCSSEL 0x00000040 /* PCS registers */
290 #define DMA_HW_FEAT_TSVER1SEL 0x00001000 /* Only IEEE 1588-2002 */
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H A Ddwmac-socfpga.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Adopted from dwmac-sti.c
7 #include <linux/mfd/altera-sysmgr.h>
13 #include <linux/mdio/mdio-regmap.h>
14 #include <linux/pcs-lynx.h>
67 void __iomem *splitter_base = dwmac->splitter_base; in socfpga_dwmac_fix_mac_speed()
68 void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base; in socfpga_dwmac_fix_mac_speed()
69 struct device *dev = dwmac->dev; in socfpga_dwmac_fix_mac_speed()
71 struct phy_device *phy_dev = ndev->phydev; in socfpga_dwmac_fix_mac_speed()
105 struct device_node *np = dev->of_node; in socfpga_dwmac_parse_data()
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/openbmc/linux/drivers/phy/freescale/
H A Dphy-fsl-lynx-28g.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (c) 2021-2022 NXP. */
24 #define LYNX_28G_LNa_PCC_OFFSET(lane) (4 * (LYNX_28G_NUM_LANE - (lane->id) - 1))
143 void __iomem *reg = priv->base + off; in lynx_28g_rmw()
153 lynx_28g_rmw((lane)->priv, LYNX_28G_##reg(lane->id), \
156 ioread32((lane)->priv->base + LYNX_28G_##reg((lane)->id))
158 ioread32((pll)->priv->base + LYNX_28G_##reg((pll)->id))
165 if (LYNX_28G_PLLnRSTCTL_DIS(priv->pll[i].rstctl)) in lynx_28g_supports_interface()
168 if (test_bit(intf, priv->pll[i].supported)) in lynx_28g_supports_interface()
182 pll = &priv->pll[i]; in lynx_28g_pll_get()
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/openbmc/linux/Documentation/i2c/busses/
H A Di2c-i801.rst2 Kernel driver i2c-i801
7 * Intel 82801AA and 82801AB (ICH and ICH0 - part of the
9 * Intel 82801BA (ICH2 - part of the '815E' chipset)
26 * Intel Lynx Point (PCH)
60 - Mark Studebaker <mdsxyz123@yahoo.com>
61 - Jean Delvare <jdelvare@suse.de>
65 -----------------
83 -----------
87 Intel's '810' chipset for Celeron-based PCs, '810E' chipset for
88 Pentium-based PCs, '815E' chipset, and others.
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