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/openbmc/linux/drivers/mfd/
H A Dexynos-lpass.c26 /* LPASS Top register definitions */
52 /* pointer to the LPASS TOP regmap */
57 static void exynos_lpass_core_sw_reset(struct exynos_lpass *lpass, int mask) in exynos_lpass_core_sw_reset() argument
61 regmap_read(lpass->top, SFR_LPASS_CORE_SW_RESET, &val); in exynos_lpass_core_sw_reset()
64 regmap_write(lpass->top, SFR_LPASS_CORE_SW_RESET, val); in exynos_lpass_core_sw_reset()
69 regmap_write(lpass->top, SFR_LPASS_CORE_SW_RESET, val); in exynos_lpass_core_sw_reset()
72 static void exynos_lpass_enable(struct exynos_lpass *lpass) in exynos_lpass_enable() argument
74 clk_prepare_enable(lpass->sfr0_clk); in exynos_lpass_enable()
77 regmap_write(lpass->top, SFR_LPASS_INTR_CA5_MASK, in exynos_lpass_enable()
80 regmap_write(lpass->top, SFR_LPASS_INTR_CPU_MASK, in exynos_lpass_enable()
[all …]
/openbmc/linux/sound/soc/qcom/
H A DMakefile3 snd-soc-lpass-cpu-objs := lpass-cpu.o
4 snd-soc-lpass-cdc-dma-objs := lpass-cdc-dma.o
5 snd-soc-lpass-hdmi-objs := lpass-hdmi.o
6 snd-soc-lpass-platform-objs := lpass-platform.o
7 snd-soc-lpass-ipq806x-objs := lpass-ipq806x.o
8 snd-soc-lpass-apq8016-objs := lpass-apq8016.o
9 snd-soc-lpass-sc7180-objs := lpass-sc7180.o
10 snd-soc-lpass-sc7280-objs := lpass-sc7280.o
12 obj-$(CONFIG_SND_SOC_LPASS_CPU) += snd-soc-lpass-cpu.o
13 obj-$(CONFIG_SND_SOC_LPASS_CDC_DMA) += snd-soc-lpass-cdc-dma.o
[all …]
H A Dlpass-ipq806x.c5 * lpass-ipq806x.c -- ALSA SoC CPU DAI driver for QTi LPASS
6 * Splited out the IPQ8064 soc specific from lpass-cpu.c
20 #include "lpass-lpaif-reg.h"
21 #include "lpass.h"
40 .stream_name = "lpass-cpu-playback",
164 { .compatible = "qcom,lpass-cpu", .data = &ipq806x_data },
171 .name = "lpass-cpu",
179 MODULE_DESCRIPTION("QTi LPASS CPU Driver");
H A Dlpass-apq8016.c5 * lpass-apq8016.c -- ALSA SoC CPU DAI driver for APQ8016 LPASS
21 #include <dt-bindings/sound/apq8016-lpass.h>
22 #include "lpass-lpaif-reg.h"
23 #include "lpass.h"
291 { .compatible = "qcom,lpass-cpu-apq8016", .data = &apq8016_data },
292 { .compatible = "qcom,apq8016-lpass-cpu", .data = &apq8016_data },
299 .name = "apq8016-lpass-cpu",
307 MODULE_DESCRIPTION("APQ8016 LPASS CPU Driver");
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dqcom,lpass-cpu.yaml4 $id: http://devicetree.org/schemas/sound/qcom,lpass-cpu.yaml#
7 title: Qualcomm Technologies Inc. LPASS CPU dai driver
14 Qualcomm Technologies Inc. SOC Low-Power Audio SubSystem (LPASS) that consist
15 of MI2S interface for audio data transfer on external codecs. LPASS cpu driver
22 - qcom,lpass-cpu
23 - qcom,apq8016-lpass-cpu
24 - qcom,sc7180-lpass-cpu
25 - qcom,sc7280-lpass-cpu
84 LPASS CPU dai node for each I2S device or Soundwire device. Bindings of each node
123 const: qcom,lpass-cpu
[all …]
H A Dqcom,lpass-wsa-macro.yaml4 $id: http://devicetree.org/schemas/sound/qcom,lpass-wsa-macro.yaml#
7 title: LPASS(Low Power Audio Subsystem) VA Macro audio codec
15 - qcom,sc7280-lpass-wsa-macro
16 - qcom,sm8250-lpass-wsa-macro
17 - qcom,sm8450-lpass-wsa-macro
18 - qcom,sm8550-lpass-wsa-macro
19 - qcom,sc8280xp-lpass-wsa-macro
60 - qcom,sc7280-lpass-wsa-macro
61 - qcom,sm8450-lpass-wsa-macro
62 - qcom,sc8280xp-lpass-wsa-macro
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H A Dqcom,lpass-rx-macro.yaml4 $id: http://devicetree.org/schemas/sound/qcom,lpass-rx-macro.yaml#
7 title: LPASS(Low Power Audio Subsystem) RX Macro audio codec
15 - qcom,sc7280-lpass-rx-macro
16 - qcom,sm8250-lpass-rx-macro
17 - qcom,sm8450-lpass-rx-macro
18 - qcom,sm8550-lpass-rx-macro
19 - qcom,sc8280xp-lpass-rx-macro
60 - qcom,sc7280-lpass-rx-macro
80 - qcom,sc8280xp-lpass-rx-macro
81 - qcom,sm8250-lpass-rx-macro
[all …]
H A Dqcom,lpass-va-macro.yaml4 $id: http://devicetree.org/schemas/sound/qcom,lpass-va-macro.yaml#
7 title: LPASS(Low Power Audio Subsystem) VA Macro audio codec
15 - qcom,sc7280-lpass-va-macro
16 - qcom,sm8250-lpass-va-macro
17 - qcom,sm8450-lpass-va-macro
18 - qcom,sm8550-lpass-va-macro
19 - qcom,sc8280xp-lpass-va-macro
70 const: qcom,sc7280-lpass-va-macro
83 const: qcom,sm8250-lpass-va-macro
100 - qcom,sc8280xp-lpass-va-macro
[all …]
H A Dqcom,lpass-tx-macro.yaml4 $id: http://devicetree.org/schemas/sound/qcom,lpass-tx-macro.yaml#
7 title: LPASS(Low Power Audio Subsystem) TX Macro audio codec
15 - qcom,sc7280-lpass-tx-macro
16 - qcom,sm8250-lpass-tx-macro
17 - qcom,sm8450-lpass-tx-macro
18 - qcom,sm8550-lpass-tx-macro
19 - qcom,sc8280xp-lpass-tx-macro
64 - qcom,sc7280-lpass-tx-macro
84 - qcom,sc8280xp-lpass-tx-macro
85 - qcom,sm8250-lpass-tx-macro
[all …]
H A Dqcom,q6apm-lpass-dais.yaml4 $id: http://devicetree.org/schemas/sound/qcom,q6apm-lpass-dais.yaml#
7 title: Qualcomm DSP LPASS (Low Power Audio SubSystem) Audio Ports
19 - qcom,q6apm-lpass-dais
33 compatible = "qcom,q6apm-lpass-dais";
/openbmc/linux/drivers/pinctrl/qcom/
H A DKconfig51 tristate "Qualcomm Technologies Inc LPASS LPI pin controller driver"
59 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
63 tristate "Qualcomm Technologies Inc SC7280 LPASS LPI pin controller driver"
68 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
72 tristate "Qualcomm Technologies Inc SM6115 LPASS LPI pin controller driver"
77 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
81 tristate "Qualcomm Technologies Inc SM8250 LPASS LPI pin controller driver"
86 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
90 tristate "Qualcomm Technologies Inc SM8350 LPASS LPI pin controller driver"
95 Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
[all …]
H A DMakefile37 obj-$(CONFIG_PINCTRL_SC7280_LPASS_LPI) += pinctrl-sc7280-lpass-lpi.o
47 obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
54 obj-$(CONFIG_PINCTRL_SM8250_LPASS_LPI) += pinctrl-sm8250-lpass-lpi.o
56 obj-$(CONFIG_PINCTRL_SM8350_LPASS_LPI) += pinctrl-sm8350-lpass-lpi.o
58 obj-$(CONFIG_PINCTRL_SM8450_LPASS_LPI) += pinctrl-sm8450-lpass-lpi.o
60 obj-$(CONFIG_PINCTRL_SM8550_LPASS_LPI) += pinctrl-sm8550-lpass-lpi.o
61 obj-$(CONFIG_PINCTRL_SC8280XP_LPASS_LPI) += pinctrl-sc8280xp-lpass-lpi.o
62 obj-$(CONFIG_PINCTRL_LPASS_LPI) += pinctrl-lpass-lpi.o
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8550-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8550-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8550 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8550 SoC.
19 const: qcom,sm8550-lpass-lpi-pinctrl
23 - description: LPASS LPI TLMM Control and Status registers
24 - description: LPASS LPI MCC registers
28 - description: LPASS Core voting clock
29 - description: LPASS Audio voting clock
49 - $ref: "#/$defs/qcom-sm8550-lpass-state"
52 $ref: "#/$defs/qcom-sm8550-lpass-state"
[all …]
H A Dqcom,sm8350-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8350 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM8350 SoC.
19 const: qcom,sm8350-lpass-lpi-pinctrl
23 - description: LPASS LPI TLMM Control and Status registers
24 - description: LPASS LPI MCC registers
28 - description: LPASS Core voting clock
29 - description: LPASS Audio voting clock
49 - $ref: "#/$defs/qcom-sm8350-lpass-state"
52 $ref: "#/$defs/qcom-sm8350-lpass-state"
[all …]
H A Dqcom,sc8280xp-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc8280xp-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SC8280XP SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SC8280XP SoC.
18 const: qcom,sc8280xp-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
27 - description: LPASS Core voting clock
28 - description: LPASS Audio voting clock
48 - $ref: "#/$defs/qcom-sc8280xp-lpass-state"
51 $ref: "#/$defs/qcom-sc8280xp-lpass-state"
[all …]
H A Dqcom,sm6115-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm6115-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM6115 SoC LPASS LPI TLMM
15 (LPASS) Low Power Island (LPI) of Qualcomm SM6115 SoC.
19 const: qcom,sm6115-lpass-lpi-pinctrl
23 - description: LPASS LPI TLMM Control and Status registers
24 - description: LPASS LPI MCC registers
28 - description: LPASS Audio voting clock
47 - $ref: "#/$defs/qcom-sm6115-lpass-state"
50 $ref: "#/$defs/qcom-sm6115-lpass-state"
54 qcom-sm6115-lpass-state:
[all …]
H A Dqcom,sm8450-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8450-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8450 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8450 SoC.
18 const: qcom,sm8450-lpass-lpi-pinctrl
22 - description: LPASS LPI TLMM Control and Status registers
23 - description: LPASS LPI MCC registers
27 - description: LPASS Core voting clock
28 - description: LPASS Audio voting clock
48 - $ref: "#/$defs/qcom-sm8450-lpass-state"
51 $ref: "#/$defs/qcom-sm8450-lpass-state"
[all …]
H A Dqcom,sm8250-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8250-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SM8250 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SM8250 SoC.
18 const: qcom,sm8250-lpass-lpi-pinctrl
25 - description: LPASS Core voting clock
26 - description: LPASS Audio voting clock
46 - $ref: "#/$defs/qcom-sm8250-lpass-state"
49 $ref: "#/$defs/qcom-sm8250-lpass-state"
53 qcom-sm8250-lpass-state:
128 compatible = "qcom,sm8250-lpass-lpi-pinctrl";
H A Dqcom,sc7280-lpass-lpi-pinctrl.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7280-lpass-lpi-pinctrl.yaml#
7 title: Qualcomm SC7280 SoC LPASS LPI TLMM
14 (LPASS) Low Power Island (LPI) of Qualcomm SC7280 SoC.
18 const: qcom,sc7280-lpass-lpi-pinctrl
36 - $ref: "#/$defs/qcom-sc7280-lpass-state"
39 $ref: "#/$defs/qcom-sc7280-lpass-state"
43 qcom-sc7280-lpass-state:
111 compatible = "qcom,sc7280-lpass-lpi-pinctrl";
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,audiocc-sm8250.yaml7 title: LPASS Audio Clock Controller on SM8250 SoCs
15 See include/dt-bindings/clock/qcom,sm8250-lpass-audiocc.h for the full list
20 const: qcom,sm8250-lpass-audiocc
30 - description: LPASS Core voting clock
31 - description: LPASS Audio codec voting clock
51 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
55 compatible = "qcom,sm8250-lpass-audiocc";
H A Dqcom,aoncc-sm8250.yaml7 title: LPASS Always ON Clock Controller on SM8250 SoCs
15 See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
20 const: qcom,sm8250-lpass-aoncc
30 - description: LPASS Core voting clock
31 - description: LPASS Audio codec voting clock
51 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
55 compatible = "qcom,sm8250-lpass-aoncc";
H A Dqcom,sc7280-lpasscc.yaml7 title: Qualcomm LPASS Core Clock Controller on SC7280
13 Qualcomm LPASS core clock control module provides the clocks and power
16 See also:: include/dt-bindings/clock/qcom,lpass-sc7280.h
36 - description: LPASS qdsp6ss register
37 - description: LPASS top-cc register
46 Indicates if the LPASS would be brought out of reset using
62 #include <dt-bindings/clock/qcom,lpass-sc7280.h>
/openbmc/linux/drivers/clk/qcom/
H A DKconfig182 tristate "IPQ806x LPASS Clock Controller"
186 Support for the LPASS clock controller on ipq806x devices.
259 tristate "APQ8064/MSM8960/MDM9650 LPASS Clock Controller"
262 Support for the LPASS clock controller on apq8064/msm8960/mdm9650
546 tristate "SC7280 Low Power Audio Subsystem (LPASS) Clock Controller"
550 Support for the LPASS clock controller on SC7280 devices.
551 Say Y if you want to use the LPASS branch clocks of the LPASS clock
552 controller to reset the LPASS subsystem.
555 tristate "SC8280 Low Power Audio Subsystem (LPASS) Clock Controller"
559 Support for the LPASS clock controller on SC8280XP devices.
[all …]
/openbmc/linux/sound/soc/qcom/qdsp6/
H A Dq6prm-clocks.c10 #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
11 #include "q6dsp-lpass-clocks.h"
78 { .compatible = "qcom,q6prm-lpass-clocks", .data = &q6dsp_clk_q6prm },
86 .name = "q6prm-lpass-clock",
93 MODULE_DESCRIPTION("Q6 Proxy Resource Manager LPASS clock driver");
/openbmc/linux/include/dt-bindings/sound/
H A Dsc7180-lpass.h5 #include <dt-bindings/sound/qcom,lpass.h>
7 /* NOTE: Use qcom,lpass.h to define any AIF ID's for LPASS */

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