Home
last modified time | relevance | path

Searched +full:lo +full:- +full:freq +full:- +full:khz (Results 1 – 25 of 27) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/iio/frequency/
H A Dadi,admv4420.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
14 mixer with an integrated fractional-N synthesizer, ideally suited
20 - adi,admv4420
25 spi-max-frequency:
28 adi,lo-freq-khz:
29 description: LO Frequency
32 adi,ref-ext-single-ended-en:
[all …]
/openbmc/u-boot/drivers/timer/
H A Dtsc_timer.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <asm/u-boot-x86.h>
40 if (gd->arch.x86_vendor != X86_VENDOR_INTEL) in native_calibrate_tsc()
54 switch (gd->arch.x86_model) { in native_calibrate_tsc()
77 if (gd->arch.x86_vendor != X86_VENDOR_INTEL) in cpu_mhz_from_cpuid()
87 * According to Intel 64 and IA-32 System Programming Guide,
107 /* TNG - Intel Atom processor Z3400 series */
109 /* VLV2 - Intel Atom processor E3000, Z3600, Z3700 series */
111 /* ANN - Intel Atom processor Z3500 series */
113 /* AMT - Intel Atom processor X7-Z8000 and X5-Z8000 series */
[all …]
/openbmc/linux/drivers/cpufreq/
H A Dpowernow-k8.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * (c) 2003-2012 Advanced Micro Devices, Inc.
8 * Based on the powernow-k7.c module written by Dave Jones.
48 #include "powernow-k8.h"
50 /* serialize freq changes */
63 /* Return a frequency in KHz, given an input fid */
89 u32 lo, hi __always_unused; in pending_bit_stuck() local
91 rdmsr(MSR_FIDVID_STATUS, lo, hi); in pending_bit_stuck()
92 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; in pending_bit_stuck()
101 u32 lo, hi; in query_current_values_with_pending_wait() local
[all …]
H A Dpowernow-k8.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * (c) 2003-2006 Advanced Micro Devices, Inc.
9 u32 numps; /* number of p-states */
10 u32 batps; /* number of p-states supported on battery */
13 * vid/fid pairings, but are modified during the ->target() call
28 * frequency is in kHz */
36 * handle hotplug events - so just point at cpufreq pol->cpus
53 /* Model Specific Registers for p-state transitions. MSRs are 64-bit. For */
54 /* writes (wrmsr - opcode 0f 30), the register number is placed in ecx, and */
55 /* the value to write is placed in edx:eax. For reads (rdmsr - opcode 0f 32), */
[all …]
/openbmc/linux/drivers/media/tuners/
H A Dtea5767.c1 // SPDX-License-Identifier: GPL-2.0
16 #include "tuner-i2c.h"
40 /* Bits 0-5 for divider MSB */
43 /* Bits 0-7 for divider LSB */
59 /* if on, div=4*(Frf+Fif)/Fref otherwise, div=4*(Frf-Fif)/Freq) */
78 /* Japan freq (76-108 MHz. If disabled, 87.5-108 MHz */
81 /* Unselected means 32.768 KHz freq as reference. Otherwise Xtal at 13 MHz */
111 /* Bits 0-5 for divider MSB after search or preset */
114 /* Bits 0-7 for divider LSB after search or preset */
149 switch (priv->ctrl.xtal_freq) { in tea5767_status_dump()
[all …]
H A Dmt2131.c1 // SPDX-License-Identifier: GPL-2.0-or-later
42 { .addr = priv->cfg->i2c_address, .flags = 0, in mt2131_readreg()
44 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, in mt2131_readreg()
48 if (i2c_transfer(priv->i2c, msg, 2) != 2) { in mt2131_readreg()
50 return -EREMOTEIO; in mt2131_readreg()
58 struct i2c_msg msg = { .addr = priv->cfg->i2c_address, .flags = 0, in mt2131_writereg()
61 if (i2c_transfer(priv->i2c, &msg, 1) != 1) { in mt2131_writereg()
63 return -EREMOTEIO; in mt2131_writereg()
70 struct i2c_msg msg = { .addr = priv->cfg->i2c_address, in mt2131_writeregs()
73 if (i2c_transfer(priv->i2c, &msg, 1) != 1) { in mt2131_writeregs()
[all …]
H A Dmt2060.c1 // SPDX-License-Identifier: GPL-2.0-or-later
31 { .addr = priv->cfg->i2c_address, .flags = 0, .len = 1 }, in mt2060_readreg()
32 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .len = 1 }, in mt2060_readreg()
39 return -ENOMEM; in mt2060_readreg()
47 if (i2c_transfer(priv->i2c, msg, 2) != 2) { in mt2060_readreg()
49 rc = -EREMOTEIO; in mt2060_readreg()
61 .addr = priv->cfg->i2c_address, .flags = 0, .len = 2 in mt2060_writereg()
68 return -ENOMEM; in mt2060_writereg()
75 if (i2c_transfer(priv->i2c, &msg, 1) != 1) { in mt2060_writereg()
77 rc = -EREMOTEIO; in mt2060_writereg()
[all …]
H A Dmt2063.c1 // SPDX-License-Identifier: GPL-2.0-only
34 /* Info: Unavoidable LO-related spur may be present in the output */
37 /* Info: Mask of bits used for # of LO-related spurs that were avoided during tuning */
144 * Two-wire serial bus subaddresses of the tuner registers.
155 MT2063_REG_LO_STATUS, /* 0x07: LO Status */
237 * mt2063_write - Write data into the I2C bus
241 struct dvb_frontend *fe = state->frontend; in mt2063_write()
245 .addr = state->config->tuner_address, in mt2063_write()
256 if (fe->ops.i2c_gate_ctrl) in mt2063_write()
257 fe->ops.i2c_gate_ctrl(fe, 1); in mt2063_write()
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dbase.c44 struct nvkm_bios *bios = clk->subdev.device->bios; in nvkm_clk_adjust()
76 * C-States
82 const struct nvkm_domain *domain = clk->domains; in nvkm_cstate_valid()
83 struct nvkm_volt *volt = clk->subdev.device->volt; in nvkm_cstate_valid()
86 while (domain && domain->name != nv_clk_src_max) { in nvkm_cstate_valid()
87 if (domain->flags & NVKM_CLK_DOM_FLAG_VPSTATE) { in nvkm_cstate_valid()
88 u32 freq = cstate->domain[domain->name]; in nvkm_cstate_valid() local
89 switch (clk->boost_mode) { in nvkm_cstate_valid()
91 if (clk->base_khz && freq > clk->base_khz) in nvkm_cstate_valid()
95 if (clk->boost_khz && freq > clk->boost_khz) in nvkm_cstate_valid()
[all …]
/openbmc/linux/arch/x86/kernel/
H A Dtsc_msr.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <asm/intel-family.h>
63 * so the freq number is not exactly the same as reported
161 * MSR-based CPU/TSC frequency discovery for certain CPUs.
164 * Return processor base frequency in KHz, or 0 on failure.
168 u32 lo, hi, ratio, freq, tscref; in cpu_khz_from_msr() local
179 freq_desc = (struct freq_desc *)id->driver_data; in cpu_khz_from_msr()
180 if (freq_desc->use_msr_plat) { in cpu_khz_from_msr()
181 rdmsr(MSR_PLATFORM_INFO, lo, hi); in cpu_khz_from_msr()
182 ratio = (lo >> 8) & 0xff; in cpu_khz_from_msr()
[all …]
/openbmc/linux/tools/power/cpupower/po/
H A Dpt.po9 "Project-Id-Version: cpufrequtils 004\n"
10 "Report-Msgid-Bugs-To: \n"
11 "POT-Creation-Date: 2011-03-08 17:03+0100\n"
12 "PO-Revision-Date: 2008-06-14 22:16-0400\n"
13 "Last-Translator: Claudio Eduardo <claudioeddy@gmail.com>\n"
14 "MIME-Version: 1.0\n"
15 "Content-Type: text/plain; charset=UTF-8\n"
16 "Content-Transfer-Encoding: 8bit\n"
70 #: utils/idle_monitor/cpupower-monitor.c:66
71 #, c-format
[all …]
/openbmc/u-boot/drivers/video/
H A Dvideomodes.c1 // SPDX-License-Identifier: GPL-2.0+
14 "videomode=301" - 301 is a hexadecimal number describing the VESA
18 --------+---------------------------------------------
23 --------+---------------------------------------------
25 - the parameters are parsed from the bootargs.
47 lo lower_margin
88 /* x y hz pixclk ps/kHz le ri up lo hs vs s vmode */
138 return -1; in video_search_param()
145 * le:56,ri:48,up:26,lo:5,hs:152,vs:2,sync:0,vmode:0,accel:0
195 bpp = 24 - ((mode % 3) * 8); in video_get_params()
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dsgtl5000.c1 // SPDX-License-Identifier: GPL-2.0
3 // sgtl5000.c -- SGTL5000 ALSA SoC Audio driver
5 // Copyright 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
26 #include <sound/soc-dapm.h>
80 /* AVC: Threshold dB -> register: pre-calculated values */
110 #define LINREG_VDDD ((1600 - LDO_VOLTAGE / 1000) / 50)
190 /* When VAG powering on to get local loop from Line-In, the sleep in vag_power_on()
210 * If the event comes from HP and Line-In is selected, in vag_power_consumers()
212 * As HP_POWERUP is not set when HP muxed to line-in, in vag_power_consumers()
240 * - LINE_IN (for HP events) / HP (for DAC/ADC events) in vag_power_off()
[all …]
H A Dcs42l56.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs42l56.c -- CS42L56 ALSA SoC audio driver
29 #include <sound/soc-dapm.h>
63 { 3, 0x7f }, /* r03 - Power Ctl 1 */
64 { 4, 0xff }, /* r04 - Power Ctl 2 */
65 { 5, 0x00 }, /* ro5 - Clocking Ctl 1 */
66 { 6, 0x0b }, /* r06 - Clocking Ctl 2 */
67 { 7, 0x00 }, /* r07 - Serial Format */
68 { 8, 0x05 }, /* r08 - Class H Ctl */
69 { 9, 0x0c }, /* r09 - Misc Ctl */
[all …]
/openbmc/linux/drivers/acpi/
H A Dprocessor_perflib.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * processor_perflib.c - ACPI Processor P-States Library ($Revision: 71 $)
9 * - Added processor hotplug support
40 * -1 -> cpufreq low level drivers not initialized -> _PSS, etc. not called yet
42 * 0 -> cpufreq low level drivers initialized -> consider _PPC values
43 * 1 -> ignore _PPC totally -> forced by user through boot param
45 static int ignore_ppc = -1;
61 return -EINVAL; in acpi_processor_get_platform_limit()
67 status = acpi_evaluate_integer(pr->handle, "_PPC", NULL, &ppc); in acpi_processor_get_platform_limit()
72 acpi_evaluation_failure_warn(pr->handle, "_PPC", status); in acpi_processor_get_platform_limit()
[all …]
/openbmc/linux/arch/m68k/amiga/
H A Dconfig.c32 #include <asm/bootinfo-amiga.h>
77 [AMI_500-AMI_500] = s_a500,
78 [AMI_500PLUS-AMI_500] = s_a500p,
79 [AMI_600-AMI_500] = s_a600,
80 [AMI_1000-AMI_500] = s_a1000,
81 [AMI_1200-AMI_500] = s_a1200,
82 [AMI_2000-AMI_500] = s_a2000,
83 [AMI_2500-AMI_500] = s_a2500,
84 [AMI_3000-AMI_500] = s_a3000,
85 [AMI_3000T-AMI_500] = s_a3000t,
[all …]
/openbmc/linux/drivers/iio/frequency/
H A Dadmv4420.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
132 return regmap_read(st->regmap, reg, readval); in admv4420_reg_access()
134 return regmap_write(st->regmap, reg, writeval); in admv4420_reg_access()
142 put_unaligned_le32(frac_val, st->transf_buf); in admv4420_set_n_counter()
143 ret = regmap_bulk_write(st->regmap, ADMV4420_FRAC_L, st->transf_buf, 3); in admv4420_set_n_counter()
147 put_unaligned_le32(mod_val, st->transf_buf); in admv4420_set_n_counter()
148 ret = regmap_bulk_write(st->regmap, ADMV4420_MOD_L, st->transf_buf, 3); in admv4420_set_n_counter()
152 put_unaligned_le32(int_val, st->transf_buf); in admv4420_set_n_counter()
153 return regmap_bulk_write(st->regmap, ADMV4420_INT_L, st->transf_buf, 2); in admv4420_set_n_counter()
165 *val = div_u64_rem(st->lo_freq_hz, MICRO, val2); in admv4420_read_raw()
[all …]
/openbmc/linux/include/sound/
H A Demu10k1.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <sound/pcm-indirect.h>
25 /* ------------------- DEFINES -------------------- */
33 /* FIXME? - according to the OSS driver the EMU10K1 needs a 29 bit DMA mask */
41 // This is used to define hardware bit-fields (sub-registers) by combining
44 // The non-concatenating (_NC) variant should be used directly only for
45 // sub-registers that do not follow the <register>_<field> naming pattern.
55 // Macros for manipulating values of bit-fields declared using the above macros.
59 // single sub-register at a time.
62 #define REG_MASK0(r) ((1U << REG_SIZE(r)) - 1U)
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dtridentfb.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2001, 2002 - Jani Monoses <jani@iv.ro>
31 #include <linux/i2c-algo-bit.h>
80 MODULE_PARM_DESC(mode_option, "Initial video mode e.g. '648x480-8@60'");
82 MODULE_PARM_DESC(mode, "Initial video mode e.g. '648x480-8@60' (deprecated)");
167 fb_writeb(val, p->io_virt + reg); in t_outb()
172 return fb_readb(p->io_virt + reg); in t_inb()
177 fb_writel(v, par->io_virt + r); in writemmr()
182 return fb_readl(par->io_virt + r); in readmmr()
194 u8 reg = vga_mm_rcrt(par->io_virt, I2C) & DDC_MASK_TGUI; in tridentfb_ddc_setscl_tgui()
[all …]
/openbmc/linux/sound/pci/rme9652/
H A Dhdsp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
34 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
70 /* Write registers. These are defined as byte-offsets from the iobase value.
85 /* Read registers. These are defined as byte-offsets from the iobase value
99 /* the meters are regular i/o-mapped registers, but offset
101 when read; the least-significant 4 bits are full-scale counters;
102 the actual peak value is in the most-significant 24 bits.
157 #define HDSP_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
158 #define HDSP_Frequency1 (1<<7) /* 0=32kHz/64kHz/128kHz */
246 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
[all …]
/openbmc/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_lp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 IEEE 802.11a/g LP-PHY driver
7 Copyright (c) 2008-2009 Michael Buesch <m@bues.ch>
37 if (b43_current_band(dev->wl) == NL80211_BAND_2GHZ) in b43_lpphy_op_get_default_chan()
48 return -ENOMEM; in b43_lpphy_op_allocate()
49 dev->phy.lp = lpphy; in b43_lpphy_op_allocate()
56 struct b43_phy *phy = &dev->phy; in b43_lpphy_op_prepare_structs()
57 struct b43_phy_lp *lpphy = phy->lp; in b43_lpphy_op_prepare_structs()
60 lpphy->antenna = B43_ANTENNA_DEFAULT; in b43_lpphy_op_prepare_structs()
67 struct b43_phy_lp *lpphy = dev->phy.lp; in b43_lpphy_op_free()
[all …]
/openbmc/linux/drivers/hwmon/
H A Dw83627hf.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * w83627hf.c - Part of lm_sensors, Linux kernel modules for hardware
5 * Copyright (c) 1998 - 2003 Frodo Looijaard <frodol@dds.nl>,
9 * Copyright (c) 2007 - 1012 Jean Delvare <jdelvare@suse.de>
37 #include <linux/hwmon-sysfs.h>
38 #include <linux/hwmon-vid.h>
102 outb(reg, sio->sioaddr); in superio_outb()
103 outb(val, sio->sioaddr + 1); in superio_outb()
109 outb(reg, sio->sioaddr); in superio_inb()
110 return inb(sio->sioaddr + 1); in superio_inb()
[all …]
/openbmc/linux/drivers/media/dvb-frontends/
H A Ddib0090.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Linux-DVB Driver for DiBcom's DiB0090 base-band RF Tuner.
5 * Copyright (C) 2005-9 DiBcom (http://www.dibcom.fr/)
90 #define MP008 0x6 /* Dual diversity VHF-UHF-LBAND */
91 #define MP009 0x7 /* Dual diversity 29098 CBAND-UHF-LBAND-SBAND */
135 s16 rf_gain_limit; /* take-over-point: where to split between bb and rf gain */
149 /* for the captrim/dc-offset search */
204 if (mutex_lock_interruptible(&state->i2c_buffer_lock) < 0) { in dib0090_read_reg()
209 state->i2c_write_buffer[0] = reg; in dib0090_read_reg()
211 memset(state->msg, 0, 2 * sizeof(struct i2c_msg)); in dib0090_read_reg()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dtonga_smumgr.c84 * and [Floor Freq, Boundary Freq, VID min , VID max]
102 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_protection_mode()
110 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_protection_mode()
114 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_protection_mode()
117 /* De-assert reset */ in tonga_start_in_protection_mode()
118 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_protection_mode()
122 PHM_WRITE_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_protection_mode()
126 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, in tonga_start_in_protection_mode()
142 if (1 != PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, in tonga_start_in_protection_mode()
145 return -EINVAL; in tonga_start_in_protection_mode()
[all …]
/openbmc/linux/drivers/media/pci/cx23885/
H A Dcx23885-core.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include "altera-ci.h"
25 #include "cx23888-ir.h"
26 #include "cx23885-ir.h"
27 #include "cx23885-av.h"
28 #include "cx23885-input.h"
45 …a_reset_workaround, "periodic RiSC dma engine reset; 0-force disable, 1-driver detect (default), 2…
51 static unsigned int card[] = {[0 ... (CX23885_MAXBOARDS - 1)] = UNSET };
63 #define NO_SYNC_LINE (-1U)
310 spin_lock_irqsave(&dev->pci_irqmask_lock, flags); in cx23885_irq_add()
[all …]

12