1b59c0415SCristian Pop // SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
2b59c0415SCristian Pop /*
3b59c0415SCristian Pop * ADMV4420
4b59c0415SCristian Pop *
5b59c0415SCristian Pop * Copyright 2021 Analog Devices Inc.
6b59c0415SCristian Pop */
7b59c0415SCristian Pop
8b59c0415SCristian Pop #include <linux/bitfield.h>
9b59c0415SCristian Pop #include <linux/iio/iio.h>
10b59c0415SCristian Pop #include <linux/iio/sysfs.h>
11b59c0415SCristian Pop #include <linux/module.h>
12b59c0415SCristian Pop #include <linux/regmap.h>
13b59c0415SCristian Pop #include <linux/spi/spi.h>
14b59c0415SCristian Pop #include <linux/units.h>
15b59c0415SCristian Pop
16b59c0415SCristian Pop #include <asm/unaligned.h>
17b59c0415SCristian Pop
18b59c0415SCristian Pop /* ADMV4420 Register Map */
19b59c0415SCristian Pop #define ADMV4420_SPI_CONFIG_1 0x00
20b59c0415SCristian Pop #define ADMV4420_SPI_CONFIG_2 0x01
21b59c0415SCristian Pop #define ADMV4420_CHIPTYPE 0x03
22b59c0415SCristian Pop #define ADMV4420_PRODUCT_ID_L 0x04
23b59c0415SCristian Pop #define ADMV4420_PRODUCT_ID_H 0x05
24b59c0415SCristian Pop #define ADMV4420_SCRATCHPAD 0x0A
25b59c0415SCristian Pop #define ADMV4420_SPI_REV 0x0B
26b59c0415SCristian Pop #define ADMV4420_ENABLES 0x103
27b59c0415SCristian Pop #define ADMV4420_SDO_LEVEL 0x108
28b59c0415SCristian Pop #define ADMV4420_INT_L 0x200
29b59c0415SCristian Pop #define ADMV4420_INT_H 0x201
30b59c0415SCristian Pop #define ADMV4420_FRAC_L 0x202
31b59c0415SCristian Pop #define ADMV4420_FRAC_M 0x203
32b59c0415SCristian Pop #define ADMV4420_FRAC_H 0x204
33b59c0415SCristian Pop #define ADMV4420_MOD_L 0x208
34b59c0415SCristian Pop #define ADMV4420_MOD_M 0x209
35b59c0415SCristian Pop #define ADMV4420_MOD_H 0x20A
36b59c0415SCristian Pop #define ADMV4420_R_DIV_L 0x20C
37b59c0415SCristian Pop #define ADMV4420_R_DIV_H 0x20D
38b59c0415SCristian Pop #define ADMV4420_REFERENCE 0x20E
39b59c0415SCristian Pop #define ADMV4420_VCO_DATA_READBACK1 0x211
40b59c0415SCristian Pop #define ADMV4420_VCO_DATA_READBACK2 0x212
41b59c0415SCristian Pop #define ADMV4420_PLL_MUX_SEL 0x213
42b59c0415SCristian Pop #define ADMV4420_LOCK_DETECT 0x214
43b59c0415SCristian Pop #define ADMV4420_BAND_SELECT 0x215
44b59c0415SCristian Pop #define ADMV4420_VCO_ALC_TIMEOUT 0x216
45b59c0415SCristian Pop #define ADMV4420_VCO_MANUAL 0x217
46b59c0415SCristian Pop #define ADMV4420_ALC 0x219
47b59c0415SCristian Pop #define ADMV4420_VCO_TIMEOUT1 0x21C
48b59c0415SCristian Pop #define ADMV4420_VCO_TIMEOUT2 0x21D
49b59c0415SCristian Pop #define ADMV4420_VCO_BAND_DIV 0x21E
50b59c0415SCristian Pop #define ADMV4420_VCO_READBACK_SEL 0x21F
51b59c0415SCristian Pop #define ADMV4420_AUTOCAL 0x226
52b59c0415SCristian Pop #define ADMV4420_CP_STATE 0x22C
53b59c0415SCristian Pop #define ADMV4420_CP_BLEED_EN 0x22D
54b59c0415SCristian Pop #define ADMV4420_CP_CURRENT 0x22E
55b59c0415SCristian Pop #define ADMV4420_CP_BLEED 0x22F
56b59c0415SCristian Pop
57b59c0415SCristian Pop #define ADMV4420_SPI_CONFIG_1_SDOACTIVE (BIT(4) | BIT(3))
58b59c0415SCristian Pop #define ADMV4420_SPI_CONFIG_1_ENDIAN (BIT(5) | BIT(2))
59b59c0415SCristian Pop #define ADMV4420_SPI_CONFIG_1_SOFTRESET (BIT(7) | BIT(1))
60b59c0415SCristian Pop
61b59c0415SCristian Pop #define ADMV4420_REFERENCE_DIVIDE_BY_2_MASK BIT(0)
62b59c0415SCristian Pop #define ADMV4420_REFERENCE_MODE_MASK BIT(1)
63b59c0415SCristian Pop #define ADMV4420_REFERENCE_DOUBLER_MASK BIT(2)
64b59c0415SCristian Pop
65b59c0415SCristian Pop #define ADMV4420_REF_DIVIDER_MAX_VAL GENMASK(9, 0)
66b59c0415SCristian Pop #define ADMV4420_N_COUNTER_INT_MAX GENMASK(15, 0)
67b59c0415SCristian Pop #define ADMV4420_N_COUNTER_FRAC_MAX GENMASK(23, 0)
68b59c0415SCristian Pop #define ADMV4420_N_COUNTER_MOD_MAX GENMASK(23, 0)
69b59c0415SCristian Pop
70b59c0415SCristian Pop #define ENABLE_PLL BIT(6)
71b59c0415SCristian Pop #define ENABLE_LO BIT(5)
72b59c0415SCristian Pop #define ENABLE_VCO BIT(3)
73b59c0415SCristian Pop #define ENABLE_IFAMP BIT(2)
74b59c0415SCristian Pop #define ENABLE_MIXER BIT(1)
75b59c0415SCristian Pop #define ENABLE_LNA BIT(0)
76b59c0415SCristian Pop
77b59c0415SCristian Pop #define ADMV4420_SCRATCH_PAD_VAL_1 0xAD
78b59c0415SCristian Pop #define ADMV4420_SCRATCH_PAD_VAL_2 0xEA
79b59c0415SCristian Pop
80b59c0415SCristian Pop #define ADMV4420_REF_FREQ_HZ 50000000
81b59c0415SCristian Pop #define MAX_N_COUNTER 655360UL
82b59c0415SCristian Pop #define MAX_R_DIVIDER 1024
83b59c0415SCristian Pop #define ADMV4420_DEFAULT_LO_FREQ_HZ 16750000000ULL
84b59c0415SCristian Pop
85b59c0415SCristian Pop enum admv4420_mux_sel {
86b59c0415SCristian Pop ADMV4420_LOW = 0,
87b59c0415SCristian Pop ADMV4420_LOCK_DTCT = 1,
88b59c0415SCristian Pop ADMV4420_R_COUNTER_PER_2 = 4,
89b59c0415SCristian Pop ADMV4420_N_CONUTER_PER_2 = 5,
90b59c0415SCristian Pop ADMV4420_HIGH = 8,
91b59c0415SCristian Pop };
92b59c0415SCristian Pop
93b59c0415SCristian Pop struct admv4420_reference_block {
94b59c0415SCristian Pop bool doubler_en;
95b59c0415SCristian Pop bool divide_by_2_en;
96b59c0415SCristian Pop bool ref_single_ended;
97b59c0415SCristian Pop u32 divider;
98b59c0415SCristian Pop };
99b59c0415SCristian Pop
100b59c0415SCristian Pop struct admv4420_n_counter {
101b59c0415SCristian Pop u32 int_val;
102b59c0415SCristian Pop u32 frac_val;
103b59c0415SCristian Pop u32 mod_val;
104b59c0415SCristian Pop u32 n_counter;
105b59c0415SCristian Pop };
106b59c0415SCristian Pop
107b59c0415SCristian Pop struct admv4420_state {
108b59c0415SCristian Pop struct spi_device *spi;
109b59c0415SCristian Pop struct regmap *regmap;
110b59c0415SCristian Pop u64 vco_freq_hz;
111b59c0415SCristian Pop u64 lo_freq_hz;
112b59c0415SCristian Pop struct admv4420_reference_block ref_block;
113b59c0415SCristian Pop struct admv4420_n_counter n_counter;
114b59c0415SCristian Pop enum admv4420_mux_sel mux_sel;
115b59c0415SCristian Pop struct mutex lock;
116*f890aaacSJonathan Cameron u8 transf_buf[4] __aligned(IIO_DMA_MINALIGN);
117b59c0415SCristian Pop };
118b59c0415SCristian Pop
119b59c0415SCristian Pop static const struct regmap_config admv4420_regmap_config = {
120b59c0415SCristian Pop .reg_bits = 16,
121b59c0415SCristian Pop .val_bits = 8,
122b59c0415SCristian Pop .read_flag_mask = BIT(7),
123b59c0415SCristian Pop };
124b59c0415SCristian Pop
admv4420_reg_access(struct iio_dev * indio_dev,u32 reg,u32 writeval,u32 * readval)125b59c0415SCristian Pop static int admv4420_reg_access(struct iio_dev *indio_dev,
126b59c0415SCristian Pop u32 reg, u32 writeval,
127b59c0415SCristian Pop u32 *readval)
128b59c0415SCristian Pop {
129b59c0415SCristian Pop struct admv4420_state *st = iio_priv(indio_dev);
130b59c0415SCristian Pop
131b59c0415SCristian Pop if (readval)
132b59c0415SCristian Pop return regmap_read(st->regmap, reg, readval);
133b59c0415SCristian Pop else
134b59c0415SCristian Pop return regmap_write(st->regmap, reg, writeval);
135b59c0415SCristian Pop }
136b59c0415SCristian Pop
admv4420_set_n_counter(struct admv4420_state * st,u32 int_val,u32 frac_val,u32 mod_val)137b59c0415SCristian Pop static int admv4420_set_n_counter(struct admv4420_state *st, u32 int_val,
138b59c0415SCristian Pop u32 frac_val, u32 mod_val)
139b59c0415SCristian Pop {
140b59c0415SCristian Pop int ret;
141b59c0415SCristian Pop
142b59c0415SCristian Pop put_unaligned_le32(frac_val, st->transf_buf);
143b59c0415SCristian Pop ret = regmap_bulk_write(st->regmap, ADMV4420_FRAC_L, st->transf_buf, 3);
144b59c0415SCristian Pop if (ret)
145b59c0415SCristian Pop return ret;
146b59c0415SCristian Pop
147b59c0415SCristian Pop put_unaligned_le32(mod_val, st->transf_buf);
148b59c0415SCristian Pop ret = regmap_bulk_write(st->regmap, ADMV4420_MOD_L, st->transf_buf, 3);
149b59c0415SCristian Pop if (ret)
150b59c0415SCristian Pop return ret;
151b59c0415SCristian Pop
152b59c0415SCristian Pop put_unaligned_le32(int_val, st->transf_buf);
153b59c0415SCristian Pop return regmap_bulk_write(st->regmap, ADMV4420_INT_L, st->transf_buf, 2);
154b59c0415SCristian Pop }
155b59c0415SCristian Pop
admv4420_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long info)156b59c0415SCristian Pop static int admv4420_read_raw(struct iio_dev *indio_dev,
157b59c0415SCristian Pop struct iio_chan_spec const *chan,
158b59c0415SCristian Pop int *val, int *val2, long info)
159b59c0415SCristian Pop {
160b59c0415SCristian Pop struct admv4420_state *st = iio_priv(indio_dev);
161b59c0415SCristian Pop
162b59c0415SCristian Pop switch (info) {
163b59c0415SCristian Pop case IIO_CHAN_INFO_FREQUENCY:
164b59c0415SCristian Pop
165b59c0415SCristian Pop *val = div_u64_rem(st->lo_freq_hz, MICRO, val2);
166b59c0415SCristian Pop
167b59c0415SCristian Pop return IIO_VAL_INT_PLUS_MICRO;
168b59c0415SCristian Pop default:
169b59c0415SCristian Pop return -EINVAL;
170b59c0415SCristian Pop }
171b59c0415SCristian Pop }
172b59c0415SCristian Pop
173b59c0415SCristian Pop static const struct iio_info admv4420_info = {
174b59c0415SCristian Pop .read_raw = admv4420_read_raw,
175b59c0415SCristian Pop .debugfs_reg_access = &admv4420_reg_access,
176b59c0415SCristian Pop };
177b59c0415SCristian Pop
178b59c0415SCristian Pop static const struct iio_chan_spec admv4420_channels[] = {
179b59c0415SCristian Pop {
180b59c0415SCristian Pop .type = IIO_ALTVOLTAGE,
181b59c0415SCristian Pop .output = 0,
182b59c0415SCristian Pop .indexed = 1,
183b59c0415SCristian Pop .channel = 0,
184b59c0415SCristian Pop .info_mask_separate = BIT(IIO_CHAN_INFO_FREQUENCY),
185b59c0415SCristian Pop },
186b59c0415SCristian Pop };
187b59c0415SCristian Pop
admv4420_fw_parse(struct admv4420_state * st)188b59c0415SCristian Pop static void admv4420_fw_parse(struct admv4420_state *st)
189b59c0415SCristian Pop {
190b59c0415SCristian Pop struct device *dev = &st->spi->dev;
191b59c0415SCristian Pop u32 tmp;
192b59c0415SCristian Pop int ret;
193b59c0415SCristian Pop
194b59c0415SCristian Pop ret = device_property_read_u32(dev, "adi,lo-freq-khz", &tmp);
195b59c0415SCristian Pop if (!ret)
196b59c0415SCristian Pop st->lo_freq_hz = (u64)tmp * KILO;
197b59c0415SCristian Pop
198b59c0415SCristian Pop st->ref_block.ref_single_ended = device_property_read_bool(dev,
199b59c0415SCristian Pop "adi,ref-ext-single-ended-en");
200b59c0415SCristian Pop }
201b59c0415SCristian Pop
admv4420_calc_pfd_vco(struct admv4420_state * st)202b59c0415SCristian Pop static inline uint64_t admv4420_calc_pfd_vco(struct admv4420_state *st)
203b59c0415SCristian Pop {
204b59c0415SCristian Pop return div_u64(st->vco_freq_hz * 10, st->n_counter.n_counter);
205b59c0415SCristian Pop }
206b59c0415SCristian Pop
admv4420_calc_pfd_ref(struct admv4420_state * st)207b59c0415SCristian Pop static inline uint32_t admv4420_calc_pfd_ref(struct admv4420_state *st)
208b59c0415SCristian Pop {
209b59c0415SCristian Pop uint32_t tmp;
210b59c0415SCristian Pop u8 doubler, divide_by_2;
211b59c0415SCristian Pop
212b59c0415SCristian Pop doubler = st->ref_block.doubler_en ? 2 : 1;
213b59c0415SCristian Pop divide_by_2 = st->ref_block.divide_by_2_en ? 2 : 1;
214b59c0415SCristian Pop tmp = ADMV4420_REF_FREQ_HZ * doubler;
215b59c0415SCristian Pop
216b59c0415SCristian Pop return (tmp / (st->ref_block.divider * divide_by_2));
217b59c0415SCristian Pop }
218b59c0415SCristian Pop
admv4420_calc_parameters(struct admv4420_state * st)219b59c0415SCristian Pop static int admv4420_calc_parameters(struct admv4420_state *st)
220b59c0415SCristian Pop {
221b59c0415SCristian Pop u64 pfd_ref, pfd_vco;
222b59c0415SCristian Pop bool sol_found = false;
223b59c0415SCristian Pop
224b59c0415SCristian Pop st->ref_block.doubler_en = false;
225b59c0415SCristian Pop st->ref_block.divide_by_2_en = false;
226b59c0415SCristian Pop st->vco_freq_hz = div_u64(st->lo_freq_hz, 2);
227b59c0415SCristian Pop
228b59c0415SCristian Pop for (st->ref_block.divider = 1; st->ref_block.divider < MAX_R_DIVIDER;
229b59c0415SCristian Pop st->ref_block.divider++) {
230b59c0415SCristian Pop pfd_ref = admv4420_calc_pfd_ref(st);
231b59c0415SCristian Pop for (st->n_counter.n_counter = 1; st->n_counter.n_counter < MAX_N_COUNTER;
232b59c0415SCristian Pop st->n_counter.n_counter++) {
233b59c0415SCristian Pop pfd_vco = admv4420_calc_pfd_vco(st);
234b59c0415SCristian Pop if (pfd_ref == pfd_vco) {
235b59c0415SCristian Pop sol_found = true;
236b59c0415SCristian Pop break;
237b59c0415SCristian Pop }
238b59c0415SCristian Pop }
239b59c0415SCristian Pop
240b59c0415SCristian Pop if (sol_found)
241b59c0415SCristian Pop break;
242b59c0415SCristian Pop
243b59c0415SCristian Pop st->n_counter.n_counter = 1;
244b59c0415SCristian Pop }
245b59c0415SCristian Pop if (!sol_found)
246b59c0415SCristian Pop return -1;
247b59c0415SCristian Pop
248b59c0415SCristian Pop st->n_counter.int_val = div_u64_rem(st->n_counter.n_counter, 10, &st->n_counter.frac_val);
249b59c0415SCristian Pop st->n_counter.mod_val = 10;
250b59c0415SCristian Pop
251b59c0415SCristian Pop return 0;
252b59c0415SCristian Pop }
253b59c0415SCristian Pop
admv4420_setup(struct iio_dev * indio_dev)254b59c0415SCristian Pop static int admv4420_setup(struct iio_dev *indio_dev)
255b59c0415SCristian Pop {
256b59c0415SCristian Pop struct admv4420_state *st = iio_priv(indio_dev);
257b59c0415SCristian Pop struct device *dev = indio_dev->dev.parent;
258b59c0415SCristian Pop u32 val;
259b59c0415SCristian Pop int ret;
260b59c0415SCristian Pop
261b59c0415SCristian Pop ret = regmap_write(st->regmap, ADMV4420_SPI_CONFIG_1,
262b59c0415SCristian Pop ADMV4420_SPI_CONFIG_1_SOFTRESET);
263b59c0415SCristian Pop if (ret)
264b59c0415SCristian Pop return ret;
265b59c0415SCristian Pop
266b59c0415SCristian Pop ret = regmap_write(st->regmap, ADMV4420_SPI_CONFIG_1,
267b59c0415SCristian Pop ADMV4420_SPI_CONFIG_1_SDOACTIVE |
268b59c0415SCristian Pop ADMV4420_SPI_CONFIG_1_ENDIAN);
269b59c0415SCristian Pop if (ret)
270b59c0415SCristian Pop return ret;
271b59c0415SCristian Pop
272b59c0415SCristian Pop ret = regmap_write(st->regmap,
273b59c0415SCristian Pop ADMV4420_SCRATCHPAD,
274b59c0415SCristian Pop ADMV4420_SCRATCH_PAD_VAL_1);
275b59c0415SCristian Pop if (ret)
276b59c0415SCristian Pop return ret;
277b59c0415SCristian Pop
278b59c0415SCristian Pop ret = regmap_read(st->regmap, ADMV4420_SCRATCHPAD, &val);
279b59c0415SCristian Pop if (ret)
280b59c0415SCristian Pop return ret;
281b59c0415SCristian Pop
282b59c0415SCristian Pop if (val != ADMV4420_SCRATCH_PAD_VAL_1) {
283b59c0415SCristian Pop dev_err(dev, "Failed ADMV4420 to read/write scratchpad %x ", val);
284b59c0415SCristian Pop return -EIO;
285b59c0415SCristian Pop }
286b59c0415SCristian Pop
287b59c0415SCristian Pop ret = regmap_write(st->regmap,
288b59c0415SCristian Pop ADMV4420_SCRATCHPAD,
289b59c0415SCristian Pop ADMV4420_SCRATCH_PAD_VAL_2);
290b59c0415SCristian Pop if (ret)
291b59c0415SCristian Pop return ret;
292b59c0415SCristian Pop
293b59c0415SCristian Pop ret = regmap_read(st->regmap, ADMV4420_SCRATCHPAD, &val);
294b59c0415SCristian Pop if (ret)
295b59c0415SCristian Pop return ret;
296b59c0415SCristian Pop
297b59c0415SCristian Pop if (val != ADMV4420_SCRATCH_PAD_VAL_2) {
298b59c0415SCristian Pop dev_err(dev, "Failed to read/write scratchpad %x ", val);
299b59c0415SCristian Pop return -EIO;
300b59c0415SCristian Pop }
301b59c0415SCristian Pop
302b59c0415SCristian Pop st->mux_sel = ADMV4420_LOCK_DTCT;
303b59c0415SCristian Pop st->lo_freq_hz = ADMV4420_DEFAULT_LO_FREQ_HZ;
304b59c0415SCristian Pop
305b59c0415SCristian Pop admv4420_fw_parse(st);
306b59c0415SCristian Pop
307b59c0415SCristian Pop ret = admv4420_calc_parameters(st);
308b59c0415SCristian Pop if (ret) {
309b59c0415SCristian Pop dev_err(dev, "Failed calc parameters for %lld ", st->vco_freq_hz);
310b59c0415SCristian Pop return ret;
311b59c0415SCristian Pop }
312b59c0415SCristian Pop
313b59c0415SCristian Pop ret = regmap_write(st->regmap, ADMV4420_R_DIV_L,
314b59c0415SCristian Pop FIELD_GET(0xFF, st->ref_block.divider));
315b59c0415SCristian Pop if (ret)
316b59c0415SCristian Pop return ret;
317b59c0415SCristian Pop
318b59c0415SCristian Pop ret = regmap_write(st->regmap, ADMV4420_R_DIV_H,
319b59c0415SCristian Pop FIELD_GET(0xFF00, st->ref_block.divider));
320b59c0415SCristian Pop if (ret)
321b59c0415SCristian Pop return ret;
322b59c0415SCristian Pop
323b59c0415SCristian Pop ret = regmap_write(st->regmap, ADMV4420_REFERENCE,
324b59c0415SCristian Pop st->ref_block.divide_by_2_en |
325b59c0415SCristian Pop FIELD_PREP(ADMV4420_REFERENCE_MODE_MASK, st->ref_block.ref_single_ended) |
326b59c0415SCristian Pop FIELD_PREP(ADMV4420_REFERENCE_DOUBLER_MASK, st->ref_block.doubler_en));
327b59c0415SCristian Pop if (ret)
328b59c0415SCristian Pop return ret;
329b59c0415SCristian Pop
330b59c0415SCristian Pop ret = admv4420_set_n_counter(st, st->n_counter.int_val,
331b59c0415SCristian Pop st->n_counter.frac_val,
332b59c0415SCristian Pop st->n_counter.mod_val);
333b59c0415SCristian Pop if (ret)
334b59c0415SCristian Pop return ret;
335b59c0415SCristian Pop
336b59c0415SCristian Pop ret = regmap_write(st->regmap, ADMV4420_PLL_MUX_SEL, st->mux_sel);
337b59c0415SCristian Pop if (ret)
338b59c0415SCristian Pop return ret;
339b59c0415SCristian Pop
340b59c0415SCristian Pop return regmap_write(st->regmap, ADMV4420_ENABLES,
341b59c0415SCristian Pop ENABLE_PLL | ENABLE_LO | ENABLE_VCO |
342b59c0415SCristian Pop ENABLE_IFAMP | ENABLE_MIXER | ENABLE_LNA);
343b59c0415SCristian Pop }
344b59c0415SCristian Pop
admv4420_probe(struct spi_device * spi)345b59c0415SCristian Pop static int admv4420_probe(struct spi_device *spi)
346b59c0415SCristian Pop {
347b59c0415SCristian Pop struct iio_dev *indio_dev;
348b59c0415SCristian Pop struct admv4420_state *st;
349b59c0415SCristian Pop struct regmap *regmap;
350b59c0415SCristian Pop int ret;
351b59c0415SCristian Pop
352b59c0415SCristian Pop indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
353b59c0415SCristian Pop if (!indio_dev)
354b59c0415SCristian Pop return -ENOMEM;
355b59c0415SCristian Pop
356b59c0415SCristian Pop regmap = devm_regmap_init_spi(spi, &admv4420_regmap_config);
357b59c0415SCristian Pop if (IS_ERR(regmap))
358b59c0415SCristian Pop return dev_err_probe(&spi->dev, PTR_ERR(regmap),
359b59c0415SCristian Pop "Failed to initializing spi regmap\n");
360b59c0415SCristian Pop
361b59c0415SCristian Pop st = iio_priv(indio_dev);
362b59c0415SCristian Pop st->spi = spi;
363b59c0415SCristian Pop st->regmap = regmap;
364b59c0415SCristian Pop
365b59c0415SCristian Pop indio_dev->name = "admv4420";
366b59c0415SCristian Pop indio_dev->info = &admv4420_info;
367b59c0415SCristian Pop indio_dev->channels = admv4420_channels;
368b59c0415SCristian Pop indio_dev->num_channels = ARRAY_SIZE(admv4420_channels);
369b59c0415SCristian Pop
370b59c0415SCristian Pop ret = admv4420_setup(indio_dev);
371b59c0415SCristian Pop if (ret) {
372b59c0415SCristian Pop dev_err(&spi->dev, "Setup ADMV4420 failed (%d)\n", ret);
373b59c0415SCristian Pop return ret;
374b59c0415SCristian Pop }
375b59c0415SCristian Pop
376b59c0415SCristian Pop return devm_iio_device_register(&spi->dev, indio_dev);
377b59c0415SCristian Pop }
378b59c0415SCristian Pop
379b59c0415SCristian Pop static const struct of_device_id admv4420_of_match[] = {
380b59c0415SCristian Pop { .compatible = "adi,admv4420" },
381b59c0415SCristian Pop { }
382b59c0415SCristian Pop };
383b59c0415SCristian Pop
384b59c0415SCristian Pop MODULE_DEVICE_TABLE(of, admv4420_of_match);
385b59c0415SCristian Pop
386b59c0415SCristian Pop static struct spi_driver admv4420_driver = {
387b59c0415SCristian Pop .driver = {
388b59c0415SCristian Pop .name = "admv4420",
389b59c0415SCristian Pop .of_match_table = admv4420_of_match,
390b59c0415SCristian Pop },
391b59c0415SCristian Pop .probe = admv4420_probe,
392b59c0415SCristian Pop };
393b59c0415SCristian Pop
394b59c0415SCristian Pop module_spi_driver(admv4420_driver);
395b59c0415SCristian Pop
396b59c0415SCristian Pop MODULE_AUTHOR("Cristian Pop <cristian.pop@analog.com>");
397b59c0415SCristian Pop MODULE_DESCRIPTION("Analog Devices ADMV44200 K Band Downconverter");
398b59c0415SCristian Pop MODULE_LICENSE("Dual BSD/GPL");
399