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/openbmc/linux/arch/arm/mach-lpc32xx/
H A Dpm.c45 * section of IRAM is used instead for this.
48 * Backup a small area of IRAM used for the suspend code
49 * Copy suspend code to IRAM
50 * Transfer control to code in IRAM
60 * Code execution returns from IRAM
61 * IRAM code are used for suspend is restored
85 /* Allocate some space for temporary IRAM storage */ in lpc32xx_pm_enter()
92 * Copy code to suspend system into IRAM. The suspend code in lpc32xx_pm_enter()
93 * needs to run from IRAM as DRAM may no longer be available in lpc32xx_pm_enter()
101 /* Transfer to suspend code in IRAM */ in lpc32xx_pm_enter()
[all …]
/openbmc/linux/sound/soc/sprd/
H A Dsprd-pcm-compress.c28 /* Stage 0 IRAM buffer size definition */
58 * For 2-stage DMA transfer, we can allocate 2 buffers: IRAM buffer (always
59 * power-on) and DDR buffer. The source channel will transfer data from IRAM
60 * buffer to the DSP fifo to decoding/encoding, once IRAM buffer is empty by
62 * DDR buffer to IRAM buffer.
64 * Since the DSP fifo is only 512B, IRAM buffer is allocated by 32K, and DDR
65 * buffer is larger to 2M. That means only the IRAM 32k data is transferred
66 * done, we can wake up the AP system to transfer data from DDR to IRAM, and
77 /* Stage 0 IRAM buffer */
82 /* DSP play information IRAM buffer */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/remoteproc/
H A Dti,pru-rproc.yaml60 - const: iram
133 reg-names = "iram", "control", "debug";
142 reg-names = "iram", "control", "debug";
172 reg-names = "iram", "control", "debug";
181 reg-names = "iram", "control", "debug";
190 reg-names = "iram", "control", "debug";
199 reg-names = "iram", "control", "debug";
208 reg-names = "iram", "control", "debug";
217 reg-names = "iram", "control", "debug";
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dlpc-eth.txt11 - use-iram: Use LPC32xx internal SRAM (IRAM) for DMA buffering
27 use-iram;
/openbmc/linux/drivers/gpu/ipu-v3/
H A Dipu-pre.c95 struct gen_pool *iram; member
288 pre->iram = of_gen_pool_get(dev->of_node, "fsl,iram", 0); in ipu_pre_probe()
289 if (!pre->iram) in ipu_pre_probe()
293 * Allocate IRAM buffer with maximum size. This could be made dynamic, in ipu_pre_probe()
294 * but as there is no other user of this IRAM region and we can fit all in ipu_pre_probe()
297 pre->buffer_virt = gen_pool_dma_alloc(pre->iram, IPU_PRE_MAX_WIDTH * in ipu_pre_probe()
327 gen_pool_free(pre->iram, (unsigned long)pre->buffer_virt, in ipu_pre_remove()
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnvidia,tegra-vde.yaml66 iram:
108 iram = <&iram>; /* IRAM MMIO region */
H A Dcoda.yaml65 iram:
106 iram = <&ocram>;
/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Dtegra.h55 /* Address at which WB code runs, it must not overlap Bootrom's IRAM usage */
59 #define NVBOOTINFOTABLE_BOOTTYPE 0xC /* Boot type in BIT in IRAM */
60 #define NVBOOTINFOTABLE_BCTSIZE 0x38 /* BCT size in BIT in IRAM */
61 #define NVBOOTINFOTABLE_BCTPTR 0x3C /* BCT pointer in BIT in IRAM */
/openbmc/linux/arch/arm/mach-tegra/
H A Dsleep-tegra20.S141 * tegra20_tear_down_core in IRAM
172 /* START OF ROUTINES COPIED TO IRAM */
180 * reset vector for LP1 restore; copied into IRAM during suspend.
193 * IRAM when this code is executed; immediately switch to CLKM and
266 * copied into and executed from IRAM
323 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
348 * must be executed from IRAM
432 /* dummy symbol for end of IRAM */
H A Dpm.c260 * SDRAM. These codes not be copied to IRAM in this fuction. We need to
261 * copy these code to IRAM before LP0/LP1 suspend and restore the content
262 * of IRAM after resume.
321 /* copy the reset vector & SDRAM shutdown code into IRAM */ in tegra_suspend_enter_lp1()
332 /* restore IRAM */ in tegra_suspend_exit_lp1()
H A Dsleep-tegra30.S282 * tegra30_tear_down_core in IRAM
346 /* START OF ROUTINES COPIED TO IRAM */
354 * reset vector for LP1 restore; copied into IRAM during suspend.
367 * IRAM when this code is executed; immediately switch to CLKM and
647 * copied into and executed from IRAM
745 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
783 * must be executed from IRAM
904 /* dummy symbol for end of IRAM */
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qp.dtsi34 fsl,iram = <&ocram2>;
43 fsl,iram = <&ocram2>;
52 fsl,iram = <&ocram3>;
61 fsl,iram = <&ocram3>;
/openbmc/u-boot/arch/arm/dts/
H A Dimx6qp.dtsi28 fsl,iram = <&ocram2>;
37 fsl,iram = <&ocram2>;
46 fsl,iram = <&ocram3>;
55 fsl,iram = <&ocram3>;
/openbmc/linux/sound/soc/intel/atom/sst/
H A Dsst_pci.c80 /* IRAM */ in sst_platform_get_resources()
83 ctx->iram = pcim_iomap(pci, 3, pci_resource_len(pci, 3)); in sst_platform_get_resources()
84 if (!ctx->iram) { in sst_platform_get_resources()
88 dev_dbg(ctx->dev, "IRAM Ptr %p\n", ctx->iram); in sst_platform_get_resources()
H A Dsst.c469 fw_save->iram = kvzalloc(ctx->iram_end - ctx->iram_base, GFP_KERNEL); in intel_sst_suspend()
470 if (!fw_save->iram) { in intel_sst_suspend()
472 goto iram; in intel_sst_suspend()
491 memcpy32_fromio(fw_save->iram, ctx->iram, ctx->iram_end - ctx->iram_base); in intel_sst_suspend()
504 kvfree(fw_save->iram); in intel_sst_suspend()
505 iram: in intel_sst_suspend()
527 memcpy32_toio(ctx->iram, fw_save->iram, ctx->iram_end - ctx->iram_base); in intel_sst_resume()
534 kvfree(fw_save->iram); in intel_sst_resume()
/openbmc/u-boot/drivers/qe/
H A Dqe.c186 * Upload microcode to IRAM for those SOCs in qe_init()
192 /* enable the microcode in IRAM */ in qe_init()
193 out_be32(&qe_immr->iram.iready, QE_IRAM_READY); in qe_init()
210 * Upload microcode to IRAM for those SOCs which do not have ROM in QE. in qe_init()
214 /* enable the microcode in IRAM */ in qe_init()
215 out_be32(&qe_immr->iram.iready,QE_IRAM_READY); in qe_init()
267 out_be32(&qe_immr->iram.iready, QE_IRAM_READY); in u_qe_init()
301 out_be32(&qe_immr->iram.iready, QE_IRAM_READY); in u_qe_init()
316 out_be32(&qe_immrr->iram.iready, QE_IRAM_READY); in u_qe_resume()
433 out_be32(&qe_immr->iram.iadd, be32_to_cpu(ucode->iram_offset) | in qe_upload_microcode()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-tegra114/
H A Dtegra.h19 #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
20 #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_dmcu.c86 /* Enable write access to IRAM */ in dce_dmcu_load_iram()
98 /* Disable write access to IRAM to allow dynamic sleep state */ in dce_dmcu_load_iram()
112 /* Enable write access to IRAM */ in dce_get_dmcu_psr_state()
123 /* Disable write access to IRAM after finished using IRAM in dce_get_dmcu_psr_state()
336 /* Enable write access to IRAM */ in dcn10_get_dmcu_version()
351 /* Disable write access to IRAM to allow dynamic sleep state */ in dcn10_get_dmcu_version()
486 /* Enable write access to IRAM */ in dcn10_dmcu_load_iram()
498 /* Disable write access to IRAM to allow dynamic sleep state */ in dcn10_dmcu_load_iram()
506 /* Set command to signal IRAM is loaded and to initialize IRAM */ in dcn10_dmcu_load_iram()
529 /* Enable write access to IRAM */ in dcn10_get_dmcu_psr_state()
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-tegra124/
H A Dtegra.h21 #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
22 #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
/openbmc/u-boot/arch/arm/include/asm/arch-tegra210/
H A Dtegra.h23 #define NVBOOTINFOTABLE_BCTSIZE 0x48 /* BCT size in BIT in IRAM */
24 #define NVBOOTINFOTABLE_BCTPTR 0x4C /* BCT pointer in BIT in IRAM */
/openbmc/linux/drivers/media/platform/nvidia/tegra-vde/
H A Dvde.c313 vde->iram_pool = of_gen_pool_get(dev->of_node, "iram", 0); in tegra_vde_probe()
315 dev_err(dev, "Could not get IRAM pool\n"); in tegra_vde_probe()
319 vde->iram = gen_pool_dma_alloc(vde->iram_pool, in tegra_vde_probe()
322 if (!vde->iram) { in tegra_vde_probe()
323 dev_err(dev, "Could not reserve IRAM\n"); in tegra_vde_probe()
376 gen_pool_free(vde->iram_pool, (unsigned long)vde->iram, in tegra_vde_probe()
409 gen_pool_free(vde->iram_pool, (unsigned long)vde->iram, in tegra_vde_remove()
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam57-pruss.dtsi93 reg-names = "iram", "control", "debug";
102 reg-names = "iram", "control", "debug";
202 reg-names = "iram", "control", "debug";
211 reg-names = "iram", "control", "debug";
/openbmc/qemu/hw/arm/
H A Dfsl-imx31.c207 if (!memory_region_init_ram(&s->iram, NULL, "imx31.iram", in fsl_imx31_realize()
212 &s->iram); in fsl_imx31_realize()
216 &s->iram, 0, FSL_IMX31_IRAM_ALIAS_SIZE); in fsl_imx31_realize()
/openbmc/u-boot/include/configs/
H A Dimx6_spl.h12 * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
13 * - IMX6DQ has 2x IRAM of IMX6SDL but we intend to support IMX6SDL as well
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi1189 reg-names = "iram", "control", "debug";
1198 reg-names = "iram", "control", "debug";
1207 reg-names = "iram", "control", "debug";
1216 reg-names = "iram", "control", "debug";
1225 reg-names = "iram", "control", "debug";
1234 reg-names = "iram", "control", "debug";
1331 reg-names = "iram", "control", "debug";
1340 reg-names = "iram", "control", "debug";
1349 reg-names = "iram", "control", "debug";
1358 reg-names = "iram", "control", "debug";
[all …]

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