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/openbmc/linux/Documentation/devicetree/bindings/arm/tegra/
H A Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
[all …]
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p2571.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra210-p2530.dtsi"
12 pinctrl-names = "boot";
13 pinctrl-0 = <&state_boot>;
20 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
21 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
22 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
29 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
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H A Dtegra210-p2595.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
10 pinctrl-names = "boot";
11 pinctrl-0 = <&state_boot>;
19 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
20 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
21 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
28 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
29 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
30 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
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H A Dtegra210-p2597.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
23 avdd-dsi-csi-supply = <&vdd_dsi_csi>;
33 avdd-io-hdmi-dp-supply = <&avdd_1v05>;
34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
35 hdmi-supply = <&vdd_hdmi>;
37 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
38 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1)
[all …]
H A Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
16 stdout-path = "serial0:115200n8";
26 pinctrl-names = "boot";
27 pinctrl-0 = <&state_boot>;
35 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
[all …]
H A Dtegra210-smaug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
12 compatible = "google,smaug-rev8", "google,smaug-rev7",
13 "google,smaug-rev6", "google,smaug-rev5",
14 "google,smaug-rev4", "google,smaug-rev3",
15 "google,smaug-rev2", "google,smaug-rev1",
25 stdout-path = "serial0:115200n8";
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/openbmc/linux/arch/powerpc/perf/
H A Dhv-common.c1 // SPDX-License-Identifier: GPL-2.0
2 #include <asm/io.h>
5 #include "hv-gpci.h"
6 #include "hv-common.h"
20 .starting_index = cpu_to_be32(-1), in hv_perf_caps_get()
33 caps->version = arg.params.counter_info_version_out; in hv_perf_caps_get()
34 caps->collect_privileged = !!arg.caps.perf_collect_privileged; in hv_perf_caps_get()
35 caps->ga = !!(arg.caps.capability_mask & HV_GPCI_CM_GA); in hv_perf_caps_get()
36 caps->expanded = !!(arg.caps.capability_mask & HV_GPCI_CM_EXPANDED); in hv_perf_caps_get()
37 caps->lab = !!(arg.caps.capability_mask & HV_GPCI_CM_LAB); in hv_perf_caps_get()
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dv4l2.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
7 Part I - Video for Linux API
16 .. class:: toc-title
26 io
30 user-func
31 common-defs
33 capture-example
34 v4l2grab-example
44 - Ailus, Sakari <sakari.ailus@iki.fi>
46 - Subdev selections API.
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/openbmc/linux/arch/parisc/kernel/
H A Dhpmc.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Copyright (C) 1999 Hewlett-Packard (Frank Rowand)
7 * Copyright (C) 2000 Hewlett-Packard (John Marvin)
12 * This HPMC handler retrieves the HPMC pim data, resets IO and
47 #define hpmc_stack toc_stack /* re-use the TOC stack */
142 * before PDC_IO if you want IO to be reset. PDC_PIM sets
151 stw %r4,-52(sp)
160 /* Reset IO by calling the hversion dependent PDC_IO routine */
163 ldo 0(%r0),arg1 /* log IO errors */
166 stw %r0,-52(sp) /* reserved */
[all …]
/openbmc/linux/arch/powerpc/platforms/ps3/
H A Dinterrupt.c1 // SPDX-License-Identifier: GPL-2.0-only
30 * struct ps3_bmp - a per cpu irq status and mask bitmap structure
36 * The HV maintains per SMT thread mappings of HV outlet to HV plug on
39 * are registered with the HV through lv1_configure_irq_state_bitmap().
40 * The HV requires that the 512 bits of status + mask not cross a page
44 * The HV supports 256 plugs per thread, assigned as {0..255}, for a total
46 * implementation equates HV plug value to Linux virq value, constrains each
68 * struct ps3_private - a per cpu data structure
72 * @ppe_id: HV logical_ppe_id
73 * @thread_id: HV thread_id
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H A Dmm.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
15 #include <asm/cell-regs.h>
56 HTAB_SIZE_MAX = 20U, /* HV limit of 1MB */
65 * struct mem_region - memory region structure
80 * struct map - address space state variables holder
81 * @total: total memory available as reported by HV
82 * @vas_id - HV virtual address space id
85 * The HV virtual address space (vas) allows for hotplug memory regions.
93 * lpar_addr: an address in the HV virtual address space
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H A Dspu.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/io.h>
28 * enum spe_type - Type of spe to create.
31 * For use with lv1_construct_logical_spe(). The current HV does not support
40 * struct spe_shadow - logical spe shadow register area.
42 * Read-only shadow of spe registers.
50 u8 padding_0158[0x0610-0x0158];
52 u8 padding_0618[0x0620-0x0618];
54 u8 padding_0628[0x0800-0x0628];
56 u8 padding_0808[0x0810-0x0808];
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra210-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra210-pinmux
19 - description: APB_MISC_GP_*_PADCTRL register (pad control)
20 - description: PINMUX_AUX_* registers (pinmux)
23 "^pinmux(-[a-z0-9-_]+)?$":
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H A Dnvidia,tegra194-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra194-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra194-pinmux
17 - nvidia,tegra194-pinmux-aon
21 - description: pinmux registers
24 "^pinmux(-[a-z0-9-_]+)?$":
[all …]
H A Dnvidia,tegra234-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - description: pinmux registers
19 "^pinmux(-[a-z0-9-]+)?$":
24 $ref: nvidia,tegra-pinmux-common.yaml
27 # for all chip generations. In this case, however, we want the per-SoC
[all …]
H A Dnvidia,tegra234-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 $ref: nvidia,tegra234-pinmux-common.yaml
17 const: nvidia,tegra234-pinmux
20 "^pinmux(-[a-z0-9-]+)?$":
118 - |
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H A Dnvidia,tegra-pinmux-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
14 Please refer to pinctrl-bindings.txt in this directory for details of the
22 pin configuration parameters, such as pull-up, tristate, drive strength,
46 $ref: /schemas/types.yaml#/definitions/string-array
57 description: Pull-down/up setting to apply to the pin.
[all …]
/openbmc/linux/drivers/virt/
H A Dfsl_hypervisor.c4 * Copyright (C) 2008-2011 Freescale Semiconductor, Inc.
43 #include <linux/io.h>
61 return -EFAULT; in ioctl_restart()
65 if (copy_to_user(&p->ret, &param.ret, sizeof(__u32))) in ioctl_restart()
66 return -EFAULT; in ioctl_restart()
83 return -EFAULT; in ioctl_status()
90 return -EFAULT; in ioctl_status()
106 return -EFAULT; in ioctl_start()
111 if (copy_to_user(&p->ret, &param.ret, sizeof(__u32))) in ioctl_start()
112 return -EFAULT; in ioctl_start()
[all …]
/openbmc/linux/arch/powerpc/sysdev/
H A Dehv_pic.c4 * Copyright 2008-2011 Freescale Semiconductor, Inc.
25 #include <asm/io.h>
47 unsigned int src = virq_to_hw(d->irq); in ehv_pic_unmask_irq()
54 unsigned int src = virq_to_hw(d->irq); in ehv_pic_mask_irq()
61 unsigned int src = virq_to_hw(d->irq); in ehv_pic_end_irq()
74 unsigned int src = virq_to_hw(d->irq); in ehv_pic_set_affinity()
114 unsigned int src = virq_to_hw(d->irq); in ehv_pic_set_irq_type()
166 if (global_ehv_pic->coreint_flag) in ehv_pic_get_irq()
171 if (irq == 0xFFFF) /* 0xFFFF --> no irq is pending */ in ehv_pic_get_irq()
178 return irq_linear_revmap(global_ehv_pic->irqhost, irq); in ehv_pic_get_irq()
[all …]
H A Dfsl_soc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
28 #include <asm/io.h>
37 static phys_addr_t immrbase = -1;
43 if (immrbase != -1) in get_immrbase()
63 static u32 sysfreq = -1; in fsl_get_sys_freq()
66 if (sysfreq != -1) in fsl_get_sys_freq()
71 return -1; in fsl_get_sys_freq()
73 of_property_read_u32(soc, "clock-frequency", &sysfreq); in fsl_get_sys_freq()
74 if (sysfreq == -1 || !sysfreq) in fsl_get_sys_freq()
75 of_property_read_u32(soc, "bus-frequency", &sysfreq); in fsl_get_sys_freq()
[all …]
/openbmc/linux/drivers/input/keyboard/
H A Dopencores-kbd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright 2007-2009 HV Sistemas S.L.
11 #include <linux/io.h>
28 struct input_dev *input = opencores_kbd->input; in opencores_kbd_isr()
31 c = readb(opencores_kbd->addr); in opencores_kbd_isr()
46 return -EINVAL; in opencores_kbd_probe()
48 opencores_kbd = devm_kzalloc(&pdev->dev, sizeof(*opencores_kbd), in opencores_kbd_probe()
51 return -ENOMEM; in opencores_kbd_probe()
53 input = devm_input_allocate_device(&pdev->dev); in opencores_kbd_probe()
55 dev_err(&pdev->dev, "failed to allocate input device\n"); in opencores_kbd_probe()
[all …]
/openbmc/linux/arch/powerpc/include/asm/
H A Dimc-pmu.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 #include <linux/io.h>
22 #define IMC_DTB_COMPAT "ibm,opal-in-memory-counters"
23 #define IMC_DTB_UNIT_COMPAT "ibm,imc-counters"
28 * perf/imc-pmu.c has the LDBAR layout information.
35 * For debugfs interface for imc-mode and imc-command
104 * specifies the MSR[HV PR] values.
146 * In-Memory Collection Counters type.
164 /* For trace-imc the domain is still thread but it operates in trace-mode */
/openbmc/linux/drivers/soc/tegra/
H A Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2023, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
27 #include <linux/io.h>
37 #include <linux/pinctrl/pinconf-generic.h>
56 #include <dt-bindings/interrupt-controller/arm-gic.h>
57 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
[all …]
/openbmc/linux/arch/powerpc/kvm/
H A Dbook3s_hv_builtin.c1 // SPDX-License-Identifier: GPL-2.0-only
27 #include <asm/io.h>
53 return -EINVAL; in early_parse_kvm_cma_resv()
60 VM_BUG_ON(order_base_2(nr_pages) < KVM_CMA_CHUNK_ORDER - PAGE_SHIFT); in kvm_alloc_hpt_cma()
74 * kvm_cma_reserve() - reserve area for kvm hash pagetable
87 * We need CMA reservation only when we are in HV mode in kvm_cma_reserve()
98 KVM_CMA_CHUNK_ORDER - PAGE_SHIFT, false, "kvm_cma", in kvm_cma_reserve()
104 * Real-mode H_CONFER implementation.
107 * to the virtual-mode implementation; if not, just return to
113 struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore; in kvmppc_rm_h_confer()
[all …]

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