1*85798213SPrathamesh Shete# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*85798213SPrathamesh Shete%YAML 1.2 3*85798213SPrathamesh Shete--- 4*85798213SPrathamesh Shete$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux-common.yaml# 5*85798213SPrathamesh Shete$schema: http://devicetree.org/meta-schemas/core.yaml# 6*85798213SPrathamesh Shete 7*85798213SPrathamesh Shetetitle: NVIDIA Tegra234 Pinmux Controller 8*85798213SPrathamesh Shete 9*85798213SPrathamesh Shetemaintainers: 10*85798213SPrathamesh Shete - Thierry Reding <thierry.reding@gmail.com> 11*85798213SPrathamesh Shete - Jon Hunter <jonathanh@nvidia.com> 12*85798213SPrathamesh Shete 13*85798213SPrathamesh Sheteproperties: 14*85798213SPrathamesh Shete reg: 15*85798213SPrathamesh Shete items: 16*85798213SPrathamesh Shete - description: pinmux registers 17*85798213SPrathamesh Shete 18*85798213SPrathamesh ShetepatternProperties: 19*85798213SPrathamesh Shete "^pinmux(-[a-z0-9-]+)?$": 20*85798213SPrathamesh Shete type: object 21*85798213SPrathamesh Shete 22*85798213SPrathamesh Shete # pin groups 23*85798213SPrathamesh Shete additionalProperties: 24*85798213SPrathamesh Shete $ref: nvidia,tegra-pinmux-common.yaml 25*85798213SPrathamesh Shete # We would typically use unevaluatedProperties here but that has the 26*85798213SPrathamesh Shete # downside that all the properties in the common bindings become valid 27*85798213SPrathamesh Shete # for all chip generations. In this case, however, we want the per-SoC 28*85798213SPrathamesh Shete # bindings to be able to override which of the common properties are 29*85798213SPrathamesh Shete # allowed, since not all pinmux generations support the same sets of 30*85798213SPrathamesh Shete # properties. This way, the common bindings define the format of the 31*85798213SPrathamesh Shete # properties but the per-SoC bindings define which of them apply to a 32*85798213SPrathamesh Shete # given chip. 33*85798213SPrathamesh Shete additionalProperties: false 34*85798213SPrathamesh Shete properties: 35*85798213SPrathamesh Shete nvidia,function: 36*85798213SPrathamesh Shete enum: [ gp, uartc, i2c8, spi2, i2c2, can1, can0, rsvd0, eth0, eth2, 37*85798213SPrathamesh Shete eth1, dp, eth3, i2c4, i2c7, i2c9, eqos, pe2, pe1, pe0, pe3, 38*85798213SPrathamesh Shete pe4, pe5, pe6, pe7, pe8, pe9, pe10, qspi0, qspi1, qpsi, 39*85798213SPrathamesh Shete sdmmc1, sce, soc, gpio, hdmi, ufs0, spi3, spi1, uartb, uarte, 40*85798213SPrathamesh Shete usb, extperiph2, extperiph1, i2c3, vi0, i2c5, uarta, uartd, 41*85798213SPrathamesh Shete i2c1, i2s4, i2s6, aud, spi5, touch, uartj, rsvd1, wdt, tsc, 42*85798213SPrathamesh Shete dmic3, led, vi0_alt, i2s5, nv, extperiph3, extperiph4, spi4, 43*85798213SPrathamesh Shete ccla, i2s1, i2s2, i2s3, i2s8, rsvd2, dmic5, dca, displayb, 44*85798213SPrathamesh Shete displaya, vi1, dcb, dmic1, dmic4, i2s7, dmic2, dspk0, rsvd3, 45*85798213SPrathamesh Shete tsc_alt, istctrl, vi1_alt, dspk1, igpu ] 46*85798213SPrathamesh Shete 47*85798213SPrathamesh Shete # out of the common properties, only these are allowed for Tegra234 48*85798213SPrathamesh Shete nvidia,pins: true 49*85798213SPrathamesh Shete nvidia,pull: true 50*85798213SPrathamesh Shete nvidia,tristate: true 51*85798213SPrathamesh Shete nvidia,schmitt: true 52*85798213SPrathamesh Shete nvidia,enable-input: true 53*85798213SPrathamesh Shete nvidia,open-drain: true 54*85798213SPrathamesh Shete nvidia,lock: true 55*85798213SPrathamesh Shete nvidia,drive-type: true 56*85798213SPrathamesh Shete nvidia,io-hv: true 57*85798213SPrathamesh Shete 58*85798213SPrathamesh Shete required: 59*85798213SPrathamesh Shete - nvidia,pins 60*85798213SPrathamesh Shete 61*85798213SPrathamesh Sheterequired: 62*85798213SPrathamesh Shete - compatible 63*85798213SPrathamesh Shete - reg 64*85798213SPrathamesh Shete 65*85798213SPrathamesh SheteadditionalProperties: true 66*85798213SPrathamesh Shete... 67