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/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dbrcm,iproc-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <ray.jui@broadcom.com>
11 - Scott Branden <scott.branden@broadcom.com>
14 - $ref: /schemas/pci/pci-bus.yaml#
19 - enum:
20 # for the first generation of PAXB based controller, used in SoCs
22 - brcm,iproc-pcie
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H A Drockchip-dw-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/rockchip-dw-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DesignWare based PCIe controller on Rockchip SoCs
10 - Shawn Lin <shawn.lin@rock-chips.com>
11 - Simon Xue <xxm@rock-chips.com>
12 - Heiko Stuebner <heiko@sntech.de>
15 RK3568 SoC PCIe host controller is based on the Synopsys DesignWare
17 snps,dw-pcie.yaml.
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/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dmarvell-bt-8xxx.txt1 Marvell 8897/8997 (sd8897/sd8997) bluetooth devices (SDIO or USB based)
2 ------
9 - compatible : should be one of the following:
10 * "marvell,sd8897-bt" (for SDIO)
11 * "marvell,sd8997-bt" (for SDIO)
16 - marvell,cal-data: Calibration data downloaded to the device during
20 - marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
22 - marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
25 - interrupt-names: Used only for USB based devices (See below)
26 - interrupts : specifies the interrupt pin number to the cpu. For SDIO, the
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H A Dmicrochip,sparx5-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
25 forwarding (uRPF) tasks. Additional L3 features include VRF-Lite and
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H A Dapm-xgene-enet.txt1 APM X-Gene SoC Ethernet nodes
3 Ethernet nodes are defined to describe on-chip ethernet interfaces in
4 APM X-Gene SoC.
7 - compatible: Should state binding information from the following list,
8 - "apm,xgene-enet": RGMII based 1G interface
9 - "apm,xgene1-sgenet": SGMII based 1G interface
10 - "apm,xgene1-xgenet": XFI based 10G interface
11 - reg: Address and length of the register set for the device. It contains the
12 information of registers in the same order as described by reg-names
13 - reg-names: Should contain the register set names
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H A Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
20 pattern: "^switch@[0-9a-f]+$"
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/openbmc/linux/Documentation/PCI/
H A Dmsi-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
16 the advantages of using MSI over traditional interrupt mechanisms, how
17 to change your driver to use MSI or MSI-X and some basic diagnostics to
24 A Message Signaled Interrupt is a write from the device to a special
25 address which causes an interrupt to be received by the CPU.
28 in PCI 3.0 to allow each interrupt to be masked individually. The MSI-X
32 Devices may support both MSI and MSI-X, but only one can be enabled at
40 traditional pin-based interrupts.
42 Pin-based PCI interrupts are often shared amongst several devices.
43 To support this, the kernel must call each interrupt handler associated
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/openbmc/linux/drivers/base/power/
H A Dwakeirq.c1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/interrupt.h>
13 * dev_pm_attach_wake_irq - Attach device interrupt as a wake IRQ
17 * Internal function to attach a dedicated wake-up interrupt as a wake IRQ.
24 return -EINVAL; in dev_pm_attach_wake_irq()
26 spin_lock_irqsave(&dev->power.lock, flags); in dev_pm_attach_wake_irq()
27 if (dev_WARN_ONCE(dev, dev->power.wakeirq, in dev_pm_attach_wake_irq()
29 spin_unlock_irqrestore(&dev->power.lock, flags); in dev_pm_attach_wake_irq()
30 return -EEXIST; in dev_pm_attach_wake_irq()
33 dev->power.wakeirq = wirq; in dev_pm_attach_wake_irq()
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/openbmc/u-boot/doc/device-tree-bindings/net/
H A Daltera_tse.txt1 * Altera Triple-Speed Ethernet MAC driver (TSE)
4 - compatible: Should be "altr,tse-1.0" for legacy SGDMA based TSE, and should
5 be "altr,tse-msgdma-1.0" for the preferred MSGDMA based TSE.
6 - reg: Address and length of the register set for the device. It contains
7 the information of registers in the same order as described by reg-names
8 - reg-names: Should contain the reg names
16 - interrupts: Should contain the TSE interrupts and it's mode.
17 - interrupt-names: Should contain the interrupt names
18 "rx_irq": xDMA Rx dispatcher interrupt
19 "tx_irq": xDMA Tx dispatcher interrupt
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/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dtwl-family.txt10 - compatible : Must be "ti,twl4030";
11 For Integrated power-management/audio CODEC device used in OMAP3
12 based boards
13 - compatible : Must be "ti,twl6030";
14 For Integrated power-management used in OMAP4 based boards
15 - interrupts : This i2c device has an IRQ line connected to the main SoC
16 - interrupt-controller : Since the twl support several interrupts internally,
17 it is considered as an interrupt controller cascaded to the SoC one.
18 - #interrupt-cells = <1>;
21 - Child nodes contain in the twl. The twl family is made of several variants
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/openbmc/linux/Documentation/timers/
H A Dhighres.rst8 https://www.kernel.org/doc/ols/2006/ols2006v1-pages-333-346.pdf
11 http://www.cs.columbia.edu/~nahum/w6998/papers/ols2006-hrtimers-slides.pdf
23 - hrtimer base infrastructure
24 - timeofday and clock source management
25 - clock event management
26 - high resolution timer functionality
27 - dynamic ticks
31 ---------------------------
40 - time ordered enqueueing into a rb-tree
41 - independent of ticks (the processing is based on nanoseconds)
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/openbmc/linux/drivers/pci/
H A Dirq.c1 // SPDX-License-Identifier: GPL-2.0
15 * pci_request_irq - allocate an interrupt line for a PCI device
17 * @nr: device-relative interrupt vector index (0-based).
25 * @fmt: Printf-like format string naming the handler
27 * This call allocates interrupt resources and enables the interrupt line and
48 return -ENOMEM; in pci_request_irq()
59 * pci_free_irq - free an interrupt allocated with pci_request_irq
61 * @nr: device-relative interrupt vector index (0-based).
64 * Remove an interrupt handler. The handler is removed and if the interrupt
66 * ensure the interrupt is disabled on the device before calling this function.
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/openbmc/linux/Documentation/networking/device_drivers/ethernet/intel/
H A De1000e.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2008-2018 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Additional Configurations
16 - Support
48 ---------------------
49 :Valid Range: 0,1,3,4,100-100000
52 Interrupt Throttle Rate controls the number of interrupts each interrupt
58 per second, even if more packets have come in. This reduces interrupt
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H A De1000.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999 - 2013 Intel Corporation.
13 - Identifying Your Adapter
14 - Command Line Parameters
15 - Speed and Duplex Configuration
16 - Additional Configurations
17 - Support
50 -------
54 :Valid Range: 0x01-0x0F, 0x20-0x2F
57 This parameter is a bit-mask that specifies the speed and duplex settings
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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dbrcm,bcm7271-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/brcm,bcm7271-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom 8250 based serial port
10 - Al Cooper <alcooperx@gmail.com>
13 - $ref: serial.yaml#
16 The Broadcom UART is based on the basic 8250 UART but with
23 - enum:
24 - brcm,bcm7271-uart
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/openbmc/linux/kernel/irq/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
30 # Support for delayed migration from interrupt context
42 # Interrupt injection mechanism
46 # Tasklet based software resend for pending interrupts on enable_irq()
50 # Edge style eoi based handler (cell)
54 # Generic configurable interrupt chip implementation
59 # Generic irq_domain hw <--> linux irq number translation
74 # Support for obsolete non-mapping irq domains
94 # Generic MSI hierarchical interrupt domain support
124 out the interrupt descriptors in a more NUMA-friendly way. )
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/openbmc/qemu/include/hw/vfio/
H A Dvfio-platform.h2 * vfio based device assignment support - platform devices
10 * the COPYING file in the top-level directory.
12 * Based on vfio based PCI device assignment support:
20 #include "hw/vfio/vfio-common.h"
25 #define TYPE_VFIO_PLATFORM "vfio-platform"
37 EventNotifier *interrupt; /* eventfd triggered on interrupt */ member
59 uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */
60 QEMUTimer *mmap_timer; /* allows fast-path resume after IRQ hit */
/openbmc/linux/Documentation/arch/arm/
H A Dinterrupts.rst5 2.5.2-rmk5:
7 major architecture-specific subsystems.
10 MMU TLB. Each MMU TLB variant is now handled completely separately -
26 SA1100 ------------> Neponset -----------> SA1111
28 -----------> USAR
30 -----------> SMC9196
33 exclusive of each other - if you're processing one interrupt from the
34 SA1111 and another comes in, you have to wait for that interrupt to
35 finish processing before you can service the new interrupt. Eg, an
36 IDE PIO-based interrupt on the SA1111 excludes all other SA1111 and
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/openbmc/linux/drivers/iio/trigger/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 menu "Triggers - standalone"
13 Provides a frequency based IIO trigger using high resolution
14 timers as interrupt source.
17 module will be called iio-trig-hrtimer.
20 tristate "Generic interrupt trigger"
22 Provides support for using an interrupt of any type as an IIO
26 module will be called iio-trig-interrupt.
29 tristate "STM32 Low-Power Timer Trigger"
32 Select this option to enable STM32 Low-Power Timer Trigger.
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/openbmc/linux/drivers/watchdog/
H A Dat91sam9_wdt.h1 /* SPDX-License-Identifier: GPL-2.0+ */
9 * Watchdog Timer (WDT) - System peripherals regsters.
10 * Based on AT91SAM9261 datasheet revision D.
11 * Based on SAM9X60 datasheet.
29 #define AT91_WDT_WDFIEN BIT(12) /* Fault Interrupt Enable */
52 /* Interrupt Enable Register */
54 /* Period Interrupt Enable */
56 /* Interrupt Disable Register */
58 /* Interrupt Status Register */
/openbmc/qemu/docs/specs/
H A Dvmw_pvscsi-spec.rst9 based on the source code of the PVSCSI Linux driver from kernel 3.0.4.
14 The interface is based on a memory area shared between hypervisor and VM.
21 hypervisor to VM. Data itself is transferred via virtual scatter-gather DMA.
30 issue device interrupts, and control interrupt masking.
53 The following interrupt types are supported by the PVSCSI device:
57 - ``PVSCSI_INTR_CMPL_0``
58 - ``PVSCSI_INTR_CMPL_1``
62 - ``PVSCSI_INTR_MSG_0``
63 - ``PVSCSI_INTR_MSG_1``
66 register. If a bit is set it means the interrupt is enabled, and if
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/openbmc/linux/Documentation/devicetree/bindings/power/supply/
H A Dbq24257.yaml1 # SPDX-License-Identifier: GPL-2.0
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Bq24250, bq24251 and bq24257 Li-Ion Charger
11 - Sebastian Reichel <sre@kernel.org>
14 - $ref: power-supply.yaml#
19 - ti,bq24250
20 - ti,bq24251
21 - ti,bq24257
29 ti,battery-regulation-voltage:
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/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Djcore,aic.txt1 J-Core Advanced Interrupt Controller
5 - compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic
6 with 8 interrupt lines with programmable priorities, or "jcore,aic2" for
9 - reg: Memory region(s) for configuration. For SMP, there should be one
10 region per cpu, indexed by the sequential, zero-based hardware cpu
13 - interrupt-controller: Identifies the node as an interrupt controller
15 - #interrupt-cells: Specifies the number of cells needed to encode an
16 interrupt source. The value shall be 1.
21 aic: interrupt-controller@200 {
24 interrupt-controller;
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/openbmc/qemu/include/hw/sd/
H A Dsdhci.h8 * Based on MMC controller for Samsung S5PC1xx-based board emulation
60 uint32_t rspreg[4]; /* Response Registers 0-3 */
69 uint16_t norintsts; /* Normal Interrupt Status Register */
70 uint16_t errintsts; /* Error Interrupt Status Register */
71 uint16_t norintstsen; /* Normal Interrupt Status Enable Register */
72 uint16_t errintstsen; /* Error Interrupt Status Enable Register */
73 uint16_t norintsigen; /* Normal Interrupt Signal Enable Register */
74 uint16_t errintsigen; /* Error Interrupt Signal Enable Register */
80 /* Read-only registers */
90 /* Buffer Data Port Register - virtual access point to R and W buffers */
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/openbmc/linux/Documentation/devicetree/bindings/
H A Dwriting-bindings.rst1 .. SPDX-License-Identifier: GPL-2.0
11 Documentation/devicetree/bindings/submitting-patches.rst
17 - DO attempt to make bindings complete even if a driver doesn't support some
18 features. For example, if a device has an interrupt, then include the
21 - DON'T refer to Linux or "device driver" in bindings. Bindings should be
22 based on what the hardware has, not what an OS and driver currently support.
24 - DO use node names matching the class of the device. Many standard names are
27 - DO check that the example matches the documentation especially after making
30 - DON'T create nodes just for the sake of instantiating drivers. Multi-function
34 - DON'T use 'syscon' alone without a specific compatible string. A 'syscon'
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