Lines Matching +full:interrupt +full:- +full:based

8  * Based on MMC controller for Samsung S5PC1xx-based board emulation
60     uint32_t rspreg[4];    /* Response Registers 0-3 */
69     uint16_t norintsts;    /* Normal Interrupt Status Register */
70     uint16_t errintsts;    /* Error Interrupt Status Register */
71     uint16_t norintstsen;  /* Normal Interrupt Status Enable Register */
72     uint16_t errintstsen;  /* Error Interrupt Status Enable Register */
73     uint16_t norintsigen;  /* Normal Interrupt Signal Enable Register */
74     uint16_t errintsigen;  /* Error Interrupt Signal Enable Register */
80     /* Read-only registers */
90     /* Buffer Data Port Register - virtual access point to R and W buffers */
91     /* Software Reset Register - always reads as 0 */
92     /* Force Event Auto CMD12 Error Interrupt Reg - write only */
93     /* Force Event Error Interrupt Register- write only */
115  * Controller does not provide transfer-complete interrupt when not
123 #define TYPE_PCI_SDHCI "sdhci-pci"
127 #define TYPE_SYSBUS_SDHCI "generic-sdhci"
131 #define TYPE_IMX_USDHC "imx-usdhc"
133 #define TYPE_S3C_SDHCI "s3c-sdhci"