/openbmc/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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H A D | imx8mm-venice-gw72xx-0x-rpidsi.dtso | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 8 #include "imx8mm-pinfunc.h" 10 /dts-v1/; 14 compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm"; 17 compatible = "powertip,ph800480t013-idf02"; 18 power-supply = <&attiny>; 23 remote-endpoint = <&bridge_out>; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
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H A D | imx8mm-venice-gw73xx-0x-rpidsi.dtso | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 8 #include "imx8mm-pinfunc.h" 10 /dts-v1/; 14 compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm"; 17 compatible = "powertip,ph800480t013-idf02"; 18 power-supply = <&attiny>; 23 remote-endpoint = <&bridge_out>; 30 #address-cells = <1>; 31 #size-cells = <0>; [all …]
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H A D | imx8mm-icore-mx8mm-ctouch2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "imx8mm.dtsi" 10 #include "imx8mm-icore-mx8mm.dtsi" 14 compatible = "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm", 15 "fsl,imx8mm"; 18 stdout-path = &uart2; 27 clock-frequency = <400000>; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&pinctrl_i2c2>; [all …]
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H A D | imx8mm-icore-mx8mm-edimm2.2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 9 #include "imx8mm.dtsi" 10 #include "imx8mm-icore-mx8mm.dtsi" 14 compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm", 15 "fsl,imx8mm"; 18 stdout-path = &uart2; 27 clock-frequency = <400000>; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&pinctrl_i2c2>; [all …]
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H A D | imx8mm-phg.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "imx8mm-tqma8mqml.dtsi" 12 compatible = "cloos,imx8mm-phg", "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 20 stdout-path = &uart2; 24 compatible = "gpio-beeper"; 25 pinctrl-0 = <&pinctrl_beeper>; 30 compatible = "gpio-leds"; 31 pinctrl-names = "default"; 32 pinctrl-0 = <&pinctrl_gpio_led>; [all …]
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H A D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/power/imx8mn-power.h> 8 #include <dt-bindings/reset/imx8mq-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mn-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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H A D | imx8mm-tqma8mqml-mba8mx.dts | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 3 * Copyright 2020-2021 TQ-Systems GmbH 6 /dts-v1/; 8 #include "imx8mm-tqma8mqml.dtsi" 12 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML on MBa8Mx"; 13 compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", "fsl,imx8mm"; 24 reg_usdhc2_vmmc: regulator-vmmc { 25 compatible = "regulator-fixed"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; [all …]
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H A D | imx8mm-phyboard-polis-rdk.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/leds/common.h> 11 #include <dt-bindings/phy/phy-imx8-pcie.h> 12 #include "imx8mm-phycore-som.dtsi" 15 model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK"; 16 compatible = "phytec,imx8mm-phyboard-polis-rdk", 17 "phytec,imx8mm-phycore-som", "fsl,imx8mm"; 20 stdout-path = &uart3; [all …]
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/openbmc/linux/Documentation/devicetree/bindings/soc/imx/ |
H A D | fsl,imx8mm-vpu-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MM VPU blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to 14 the NoC and ensuring proper power sequencing of the VPU peripherals 20 - const: fsl,imx8mm-vpu-blk-ctrl 21 - const: syscon [all …]
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H A D | fsl,imx8mm-disp-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MM DISP blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to 14 the NoC and ensuring proper power sequencing of the display and MIPI CSI 20 - const: fsl,imx8mm-disp-blk-ctrl 21 - const: syscon [all …]
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/openbmc/linux/Documentation/devicetree/bindings/power/ |
H A D | fsl,imx-gpcv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX General Power Controller v2 10 - Andrey Smirnov <andrew.smirnov@gmail.com> 13 The i.MX7S/D General Power Control (GPC) block contains Power Gating 14 Control (PGC) for various power domains. 16 Power domains contained within GPC node are generic power domain 18 Documentation/devicetree/bindings/power/power-domain.yaml, which are [all …]
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | fsl,imx8-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Richard Zhu <hongxing.zhu@nxp.com> 13 "#phy-cells": 18 - fsl,imx8mm-pcie-phy 19 - fsl,imx8mp-pcie-phy 27 clock-names: 29 - const: ref [all …]
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/openbmc/linux/Documentation/devicetree/bindings/media/ |
H A D | nxp,imx-mipi-csi2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/nxp,imx-mipi-csi2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver 10 - Rui Miguel Silva <rmfrfs@gmail.com> 11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 13 description: |- 14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2 19 While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is [all …]
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H A D | nxp,imx7-csi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/nxp,imx7-csi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Rui Miguel Silva <rmfrfs@gmail.com> 19 - enum: 20 - fsl,imx8mq-csi 21 - fsl,imx7-csi 22 - fsl,imx6ul-csi 23 - items: [all …]
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H A D | nxp,imx8mq-vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Philipp Zabel <p.zabel@pengutronix.de> 19 - const: nxp,imx8mq-vpu 21 - const: nxp,imx8mq-vpu-g1 22 - const: nxp,imx8mq-vpu-g2 23 - const: nxp,imx8mm-vpu-g1 34 power-domains: [all …]
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/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | fsl,rpmsg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shengjiu Wang <shengjiu.wang@nxp.com> 18 Cortex-A and Cortex-M. 21 - $ref: sound-card-common.yaml# 26 - fsl,imx7ulp-rpmsg-audio 27 - fsl,imx8mn-rpmsg-audio 28 - fsl,imx8mm-rpmsg-audio 29 - fsl,imx8mp-rpmsg-audio [all …]
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/openbmc/linux/Documentation/devicetree/bindings/remoteproc/ |
H A D | fsl,imx-rproc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX Co-Processor 10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs. 13 - Peng Fan <peng.fan@nxp.com> 18 - fsl,imx6sx-cm4 19 - fsl,imx7d-cm4 20 - fsl,imx7ulp-cm4 [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/ |
H A D | fsl,lcdif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Marek Vasut <marex@denx.de> 11 - Stefan Agner <stefan@agner.ch> 19 - enum: 20 - fsl,imx23-lcdif 21 - fsl,imx28-lcdif 22 - fsl,imx6sx-lcdif 23 - fsl,imx8mp-lcdif [all …]
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/openbmc/linux/drivers/pci/controller/dwc/ |
H A D | pci-imx6.c | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h> 36 #include "pcie-designware.h" 45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev) 53 IMX8MM, enumerator 97 /* power domain for pcie */ 99 /* power domain for pcie phy */ 109 /* PCIe Port Logic registers (memory-mapped) */ 122 /* PHY registers (not memory-mapped) */ [all …]
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/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | fsl-imx-esdhc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Shawn Guo <shawnguo@kernel.org> 13 - $ref: sdhci-common.yaml# 20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver. 25 - enum: 26 - fsl,imx25-esdhc 27 - fsl,imx35-esdhc [all …]
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/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi-nxp-fspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Han Xu <han.xu@nxp.com> 11 - Kuldeep Singh <singh.kuldeep87k@gmail.com> 14 - $ref: spi-controller.yaml# 19 - enum: 20 - nxp,imx8dxl-fspi 21 - nxp,imx8mm-fspi [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pci/ |
H A D | fsl,imx6q-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lucas Stach <l.stach@pengutronix.de> 11 - Richard Zhu <hongxing.zhu@nxp.com> 22 clock-names: 26 num-lanes: 29 fsl,imx7d-pcie-phy: 31 description: A phandle to an fsl,imx7d-pcie-phy node. Additional [all …]
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/openbmc/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | samsung,mipi-dsim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Jagan Teki <jagan@amarulasolutions.com> 12 - Marek Szyprowski <m.szyprowski@samsung.com> 21 - enum: 22 - samsung,exynos3250-mipi-dsi 23 - samsung,exynos4210-mipi-dsi [all …]
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/openbmc/linux/Documentation/devicetree/bindings/nvmem/ |
H A D | snvs-lpgpr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Low Power General Purpose Register found in i.MX Secure Non-Volatile Storage 10 - Oleksij Rempel <o.rempel@pengutronix.de> 15 - items: 16 - enum: 17 - fsl,imx8mm-snvs-lpgpr 18 - fsl,imx8mn-snvs-lpgpr [all …]
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