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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dnxp,imx-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver
10 - Rui Miguel Silva <rmfrfs@gmail.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 description: |-
14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2
19 While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
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/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dfsl,imx7-src.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX7 System Reset Controller
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The system reset controller can be used to reset various set of
14 peripherals. Device nodes that need access to reset lines should
15 specify them as a reset phandle in their corresponding node as
16 specified in reset.txt.
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/openbmc/qemu/include/hw/misc/
H A Dimx7_src.h2 * IMX7 System Reset Controller
4 * Copyright (C) 2023 Jean-Christophe Dubois <jcd@tribudubois.net>
7 * See the COPYING file in the top-level directory.
53 #define TYPE_IMX7_SRC "imx7.src"
/openbmc/u-boot/board/compulab/cl-som-imx7/
H A Dcl-som-imx7.c1 // SPDX-License-Identifier: GPL-2.0+
3 * U-Boot board functions for CompuLab CL-SOM-iMX7 module
18 #include <asm/mach-imx/mxc_i2c.h>
19 #include <asm/mach-imx/iomux-v3.h>
20 #include <asm/arch-mx7/mx7-pins.h>
21 #include <asm/arch-mx7/sys_proto.h>
22 #include <asm/arch-mx7/clock.h>
54 * cl_som_imx7_setup_i2c() - I2C pinmux configuration.
66 gd->ram_size = imx_ddr_size(); in dram_init()
85 * (U-boot device node) (Physical Port) in board_mmc_init()
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/openbmc/linux/drivers/reset/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-y += core.o
3 obj-y += hisilicon/
4 obj-y += starfive/
5 obj-$(CONFIG_ARCH_STI) += sti/
6 obj-$(CONFIG_ARCH_TEGRA) += tegra/
7 obj-$(CONFIG_RESET_A10SR) += reset-a10sr.o
8 obj-$(CONFIG_RESET_ATH79) += reset-ath79.o
9 obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o
10 obj-$(CONFIG_RESET_BCM6345) += reset-bcm6345.o
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H A Dreset-imx7.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * i.MX7 System Reset Controller (SRC) driver
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/reset/imx7-reset.h>
17 #include <dt-bindings/reset/imx8mq-reset.h>
18 #include <dt-bindings/reset/imx8mp-reset.h>
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
53 return regmap_update_bits(imx7src->regmap, in imx7_reset_update()
54 signal->offset, signal->bit, value); in imx7_reset_update()
95 const unsigned int bit = imx7src->signals[id].bit; in imx7_reset_set()
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/openbmc/qemu/hw/arm/
H A Dfsl-imx7.c8 * Based on hw/arm/fsl-imx6.c
23 #include "hw/arm/fsl-imx7.h"
27 #include "qemu/error-report.h"
29 #include "target/arm/cpu-qom.h"
43 for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX7_NUM_CPUS); i++) { in fsl_imx7_init()
45 object_initialize_child(obj, name, &s->cpu[i], in fsl_imx7_init()
46 ARM_CPU_TYPE_NAME("cortex-a7")); in fsl_imx7_init()
52 object_initialize_child(obj, "a7mpcore", &s->a7mpcore, in fsl_imx7_init()
60 object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO); in fsl_imx7_init()
68 object_initialize_child(obj, name, &s->gpt[i], TYPE_IMX7_GPT); in fsl_imx7_init()
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7d-mba7.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Device Tree Source for TQ-Systems TQMa7D board on MBa7 carrier board.
5 * Copyright (C) 2016 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
10 /dts-v1/;
12 #include "imx7d-tqma7.dtsi"
13 #include "imx7-mba7.dtsi"
16 model = "TQ-Systems TQMa7D board on MBa7 carrier board";
17 compatible = "tq,imx7d-mba7", "tq,imx7d-tqma7", "fsl,imx7d";
21 pinctrl-names = "default";
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H A Dimx7d-pico-pi.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 #include "imx7d-pico.dtsi"
8 model = "TechNexion PICO-IMX7D Board and PI baseboard";
9 compatible = "technexion,imx7d-pico-pi", "fsl,imx7d";
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 label = "gpio-led";
23 compatible = "simple-audio-card";
24 simple-audio-card,name = "imx7-sgtl5000";
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H A Dimx7d.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
7 #include <dt-bindings/reset/imx7-reset.h>
18 clock-frequency = <996000000>;
19 operating-points-v2 = <&cpu0_opp_table>;
20 #cooling-cells = <2>;
21 nvmem-cells = <&fuse_grade>;
22 nvmem-cell-names = "speed_grade";
26 compatible = "arm,cortex-a7";
29 clock-frequency = <996000000>;
30 operating-points-v2 = <&cpu0_opp_table>;
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H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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H A Dimx7s-warp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 compatible = "element14,imx7s-warp", "fsl,imx7s";
21 gpio-keys {
22 compatible = "gpio-keys";
23 pinctrl-0 = <&pinctrl_gpio>;
30 wakeup-source;
34 reg_brcm: regulator-brcm {
35 compatible = "regulator-fixed";
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H A Dimx7-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2016-2022 Toradex
6 #include <dt-bindings/pwm/pwm.h>
15 brightness-levels = <0 45 63 88 119 158 203 255>;
16 compatible = "pwm-backlight";
17 default-brightness-level = <4>;
18 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_bl_on>;
21 power-supply = <&reg_module_3v3>;
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/openbmc/linux/Documentation/devicetree/bindings/power/
H A Dfsl,imx-gpcv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
21 IP cores belonging to a power domain should contain a 'power-domains'
27 - fsl,imx7d-gpc
28 - fsl,imx8mn-gpc
29 - fsl,imx8mq-gpc
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/openbmc/qemu/hw/misc/
H A Dimx7_src.c2 * IMX7 System Reset Controller
4 * Copyright (c) 2023 Jean-Christophe Dubois <jcd@tribudubois.net>
7 * See the COPYING file in the top-level directory.
16 #include "qemu/main-loop.h"
18 #include "target/arm/arm-powerctl.h"
97 memset(s->regs, 0, sizeof(s->regs)); in imx7_src_reset()
99 /* Set reset values */ in imx7_src_reset()
100 s->regs[SRC_SCR] = 0xA0; in imx7_src_reset()
101 s->regs[SRC_SRSR] = 0x1; in imx7_src_reset()
102 s->regs[SRC_SIMR] = 0x1F; in imx7_src_reset()
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/openbmc/linux/drivers/phy/freescale/
H A Dphy-fsl-imx8m-pcie.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
18 #include <linux/reset.h>
20 #include <dt-bindings/phy/phy-imx8-pcie.h>
65 struct reset_control *reset; member
79 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on()
80 switch (imx8_phy->drvdata->variant) { in imx8_pcie_phy_power_on()
82 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on()
84 /* Tune PHY de-emphasis setting to pass PCIe compliance. */ in imx8_pcie_phy_power_on()
85 if (imx8_phy->tx_deemph_gen1) in imx8_pcie_phy_power_on()
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/openbmc/qemu/include/hw/timer/
H A Dimx_gpt.h8 * Updated by Jean-Christophe Dubois <jcd@tribudubois.net>
58 #define GPT_CR_SWR (1 << 15) /* Software Reset */
82 #define TYPE_IMX7_GPT "imx7.gpt"
/openbmc/u-boot/board/toradex/colibri_imx7/
H A Dcolibri_imx7.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2016-2018 Toradex AG
8 #include <asm/arch/imx-regs.h>
9 #include <asm/arch/mx7-pins.h>
12 #include <asm/mach-imx/iomux-v3.h>
28 #include <usb/ehci-ci.h>
29 #include "../common/tdx-common.h"
52 gd->ram_size = get_ram_size((void *)PHYS_SDRAM, imx_ddr_size()); in dram_init()
216 clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], in setup_fec()
221 clrsetbits_le32(&iomuxc_gpr_regs->gpr[1], in setup_fec()
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/openbmc/u-boot/arch/arm/dts/
H A Dimx7s-warp.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 compatible = "warp,imx7s-warp", "fsl,imx7s";
24 gpio-keys {
25 compatible = "gpio-keys";
26 pinctrl-0 = <&pinctrl_gpio>;
33 wakeup-source;
37 reg_brcm: regulator-brcm {
38 compatible = "regulator-fixed";
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H A Dimx7s.dtsi5 * This file is dual-licensed: you can use it either under the terms
44 #include <dt-bindings/clock/imx7d-clock.h>
45 #include <dt-bindings/power/imx7-power.h>
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include "imx7d-pinfunc.h"
52 #address-cells = <1>;
53 #size-cells = <1>;
56 * pre-existing /chosen node to be available to insert the
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/openbmc/linux/drivers/pci/controller/dwc/
H A Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
31 #include <linux/reset.h>
36 #include "pcie-designware.h"
45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
109 /* PCIe Port Logic registers (memory-mapped) */
122 /* PHY registers (not memory-mapped) */
136 /* iMX7 PCIe PHY registers */
159 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset()
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/openbmc/linux/drivers/media/platform/nxp/
H A Dimx8mq-mipi-csi2.c1 // SPDX-License-Identifier: GPL-2.0
3 * NXP i.MX8MQ SoC series MIPI-CSI2 receiver driver
9 #include <linux/clk-provider.h>
24 #include <linux/reset.h>
27 #include <media/v4l2-common.h>
28 #include <media/v4l2-device.h>
29 #include <media/v4l2-fwnode.h>
30 #include <media/v4l2-mc.h>
31 #include <media/v4l2-subdev.h>
33 #define MIPI_CSI2_DRIVER_NAME "imx8mq-mipi-csi2"
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H A Dimx-mipi-csis.c1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung CSIS MIPI CSI-2 receiver driver.
5 * The Samsung CSIS IP is a MIPI CSI-2 receiver found in various NXP i.MX7 and
10 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. All Rights Reserved.
11 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
28 #include <linux/reset.h>
31 #include <media/v4l2-common.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-fwnode.h>
34 #include <media/v4l2-mc.h>
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/openbmc/linux/drivers/pmdomain/imx/
H A Dgpcv2.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
18 #include <linux/reset.h>
20 #include <dt-bindings/power/imx7-power.h>
21 #include <dt-bindings/power/imx8mq-power.h>
22 #include <dt-bindings/power/imx8mm-power.h>
23 #include <dt-bindings/power/imx8mn-power.h>
24 #include <dt-bindings/power/imx8mp-power.h>
282 struct reset_control *reset; member
322 ret = pm_runtime_get_sync(domain->dev); in imx_pgc_power_up()
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/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
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