| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | loongson,ls2k-pinctrl.yaml | 42 enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,
47 enum: [gpio, sdio, can1, can0, pwm3, pwm2, pwm1, pwm0, i2c1, i2c0,
98 i2c0_pins_default: i2c0-pins {
100 groups = "i2c0";
101 function = "i2c0";
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| H A D | marvell,ac5-pinctrl.yaml | 34 enum: [ dev_init_done, ge, gpio, i2c0, i2c1, int_out, led, nand, pcie, ptp, sdio,
64 i2c0_pins: i2c0-pins {
66 marvell,function = "i2c0";
69 i2c0_gpio: i2c0-gpio-pins {
|
| /openbmc/linux/arch/mips/boot/dts/mscc/ |
| H A D | jaguar2_pcb110.dts | 15 i2c0 = &i2c0;
45 i2c0_imux: i2c0-imux {
49 i2c-parent = <&i2c0>;
78 i2c0_emux: i2c0-emux {
82 i2c-parent = <&i2c0>;
210 &i2c0 {
|
| H A D | jaguar2_pcb111.dts | 14 i2c0 = &i2c0;
22 i2c0_imux: i2c0-imux {
26 i2c-parent = <&i2c0>;
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| H A D | serval_common.dtsi | 23 i2c0_imux: i2c0-imux {
27 i2c-parent = <&i2c0>;
82 pins = "GPIO_7"; /* No "default" scl for i2c0 */
123 &i2c0 {
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| /openbmc/linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a7742-iwg21m.dtsi | 48 &i2c0 {
74 i2c0_pins: i2c0 {
75 groups = "i2c0";
76 function = "i2c0";
|
| /openbmc/linux/arch/arm/boot/dts/socionext/ |
| H A D | uniphier-pro5-proex.dts | 23 i2c0 = &i2c0;
41 &i2c0 {
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| H A D | uniphier-pro5-epcore.dts | 25 i2c0 = &i2c0;
54 &i2c0 {
|
| H A D | uniphier-sld8-ref.dts | 26 i2c0 = &i2c0;
66 &i2c0 {
|
| H A D | uniphier-pro4-sanji.dts | 22 i2c0 = &i2c0;
45 &i2c0 {
|
| H A D | uniphier-ld4-ref.dts | 26 i2c0 = &i2c0;
66 &i2c0 {
|
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | uniphier-pro5-4kbox.dts | 23 i2c0 = &i2c0;
42 &i2c0 {
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| H A D | armada-385-turris-omnia-u-boot.dtsi | 8 i2c0 = &i2c0;
14 &i2c0 {
|
| H A D | zynq-zc770-xm012.dts | 15 i2c0 = &i2c0;
36 &i2c0 {
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| H A D | uniphier-sld8-ref.dts | 26 i2c0 = &i2c0;
62 &i2c0 {
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| H A D | uniphier-ld4-ref.dts | 26 i2c0 = &i2c0;
62 &i2c0 {
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| H A D | uniphier-ld11-ref.dts | 26 i2c0 = &i2c0;
56 &i2c0 {
|
| H A D | uniphier-ld20-ref.dts | 26 i2c0 = &i2c0;
56 &i2c0 {
|
| /openbmc/linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a77980-v3hsk.dts | 18 i2c0 = &i2c0;
133 &i2c0 {
196 i2c0_pins: i2c0 {
197 groups = "i2c0";
198 function = "i2c0";
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| H A D | r8a77970-v3msk.dts | 18 i2c0 = &i2c0;
141 &i2c0 {
214 i2c0_pins: i2c0 {
215 groups = "i2c0";
216 function = "i2c0";
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| /openbmc/linux/arch/arm/boot/dts/xilinx/ |
| H A D | zynq-zc770-xm012.dts | 15 i2c0 = &i2c0;
36 &i2c0 {
|
| /openbmc/linux/arch/arm/boot/dts/intel/socfpga/ |
| H A D | socfpga_arria10_chameleonv3.dts | 15 i2c0 = &i2c0;
36 &i2c0 {
|
| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | tps6105x.txt | 27 i2c0 {
36 i2c0 {
53 i2c0 {
|
| /openbmc/u-boot/board/eets/pdu001/ |
| H A D | board.h | 16 * We have two pin mux functions that must exist. First we need I2C0 to
21 * In case of I2C0 access we explicitly don't rely on the the ROM but we could
22 * do so as we use the primary mode (mode 0) for I2C0.
|
| /openbmc/linux/arch/arm64/boot/dts/socionext/ |
| H A D | uniphier-ld11-ref.dts | 26 i2c0 = &i2c0;
61 &i2c0 {
|