1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*724ba675SRob Herring//
3*724ba675SRob Herring// Device Tree Source for UniPhier Pro4 Sanji Board
4*724ba675SRob Herring//
5*724ba675SRob Herring// Copyright (C) 2016 Socionext Inc.
6*724ba675SRob Herring//   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
7*724ba675SRob Herring
8*724ba675SRob Herring/dts-v1/;
9*724ba675SRob Herring#include "uniphier-pro4.dtsi"
10*724ba675SRob Herring
11*724ba675SRob Herring/ {
12*724ba675SRob Herring	model = "UniPhier Pro4 Sanji Board";
13*724ba675SRob Herring	compatible = "socionext,uniphier-pro4-sanji", "socionext,uniphier-pro4";
14*724ba675SRob Herring
15*724ba675SRob Herring	chosen {
16*724ba675SRob Herring		stdout-path = "serial0:115200n8";
17*724ba675SRob Herring	};
18*724ba675SRob Herring
19*724ba675SRob Herring	aliases {
20*724ba675SRob Herring		serial0 = &serial0;
21*724ba675SRob Herring		serial1 = &serial1;
22*724ba675SRob Herring		i2c0 = &i2c0;
23*724ba675SRob Herring		i2c1 = &i2c1;
24*724ba675SRob Herring		i2c2 = &i2c2;
25*724ba675SRob Herring		i2c3 = &i2c3;
26*724ba675SRob Herring		i2c5 = &i2c5;
27*724ba675SRob Herring		i2c6 = &i2c6;
28*724ba675SRob Herring		ethernet0 = &eth;
29*724ba675SRob Herring	};
30*724ba675SRob Herring
31*724ba675SRob Herring	memory@80000000 {
32*724ba675SRob Herring		device_type = "memory";
33*724ba675SRob Herring		reg = <0x80000000 0x80000000>;
34*724ba675SRob Herring	};
35*724ba675SRob Herring};
36*724ba675SRob Herring
37*724ba675SRob Herring&serial0 {
38*724ba675SRob Herring	status = "okay";
39*724ba675SRob Herring};
40*724ba675SRob Herring
41*724ba675SRob Herring&serial1 {
42*724ba675SRob Herring	status = "okay";
43*724ba675SRob Herring};
44*724ba675SRob Herring
45*724ba675SRob Herring&i2c0 {
46*724ba675SRob Herring	status = "okay";
47*724ba675SRob Herring
48*724ba675SRob Herring	eeprom@54 {
49*724ba675SRob Herring		compatible = "st,24c64", "atmel,24c64";
50*724ba675SRob Herring		reg = <0x54>;
51*724ba675SRob Herring		pagesize = <32>;
52*724ba675SRob Herring	};
53*724ba675SRob Herring};
54*724ba675SRob Herring
55*724ba675SRob Herring&i2c1 {
56*724ba675SRob Herring	status = "okay";
57*724ba675SRob Herring};
58*724ba675SRob Herring
59*724ba675SRob Herring&i2c2 {
60*724ba675SRob Herring	status = "okay";
61*724ba675SRob Herring};
62*724ba675SRob Herring
63*724ba675SRob Herring&i2c3 {
64*724ba675SRob Herring	status = "okay";
65*724ba675SRob Herring};
66*724ba675SRob Herring
67*724ba675SRob Herring&usb2 {
68*724ba675SRob Herring	status = "okay";
69*724ba675SRob Herring};
70*724ba675SRob Herring
71*724ba675SRob Herring&usb3 {
72*724ba675SRob Herring	status = "okay";
73*724ba675SRob Herring};
74*724ba675SRob Herring
75*724ba675SRob Herring&emmc {
76*724ba675SRob Herring	status = "okay";
77*724ba675SRob Herring};
78*724ba675SRob Herring
79*724ba675SRob Herring&eth {
80*724ba675SRob Herring	status = "okay";
81*724ba675SRob Herring	phy-handle = <&ethphy>;
82*724ba675SRob Herring};
83*724ba675SRob Herring
84*724ba675SRob Herring&mdio {
85*724ba675SRob Herring	ethphy: ethernet-phy@1 {
86*724ba675SRob Herring		reg = <1>;
87*724ba675SRob Herring	};
88*724ba675SRob Herring};
89*724ba675SRob Herring
90*724ba675SRob Herring&usb0 {
91*724ba675SRob Herring	status = "okay";
92*724ba675SRob Herring};
93*724ba675SRob Herring
94*724ba675SRob Herring&usb1 {
95*724ba675SRob Herring	status = "okay";
96*724ba675SRob Herring};
97