| /openbmc/linux/drivers/media/pci/netup_unidvb/ |
| H A D | netup_unidvb_i2c.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Internal I2C bus driver for NetUP Universal Dual DVB-CI
65 irqreturn_t netup_i2c_interrupt(struct netup_i2c *i2c) in netup_i2c_interrupt() argument
71 spin_lock_irqsave(&i2c->lock, flags); in netup_i2c_interrupt()
72 reg = readw(&i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
73 writew(reg & ~TWI_IRQEN, &i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
74 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
77 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
79 i2c->state = STATE_DONE; in netup_i2c_interrupt()
83 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
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| /openbmc/linux/Documentation/i2c/ |
| H A D | i2c-topology.rst | 2 I2C muxes and complex topologies
5 There are a couple of reasons for building more complex I2C topologies
6 than a straight-forward I2C bus with one adapter and one or more devices.
16 from the I2C bus, at least most of the time, and sits behind a gate
19 Several types of hardware components such as I2C muxes, I2C gates and I2C
22 These components are represented as I2C adapter trees by Linux, where
23 each adapter has a parent adapter (except the root adapter) and zero or
25 I2C transfers, and all adapters with a parent are part of an "i2c-mux"
29 an I2C transfer on one of its child adapters. The mux driver can
39 There are two variants of locking available to I2C muxes, they can be
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| /openbmc/linux/drivers/i2c/ |
| H A D | i2c-mux.c | 2 * Multiplexed I2C bus driver.
4 * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
5 * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
6 * Copyright (c) 2009-2010 NSN GmbH & Co KG <michael.lawnick.ext@nsn.com>
8 * Simplifies access to complex multiplexed I2C bus topologies, by presenting
9 * each multiplexed bus segment as an additional I2C adapter.
10 * Supports multi-level mux'ing (mux behind a mux).
13 * i2c-virt.c from Kumar Gala <galak@kernel.crashing.org>
14 * i2c-virtual.c from Ken Harrenstien, Copyright (c) 2004 Google, Inc.
15 * i2c-virtual.c from Brian Kuschak <bkuschak@yahoo.com>
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| H A D | i2c-atr.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * I2C Address Translator
8 * Originally based on i2c-mux.c
12 #include <linux/i2c-atr.h>
13 #include <linux/i2c.h>
21 #define ATR_MAX_SYMLINK_LEN 11 /* Longest name is 10 chars: "channel-99" */
24 * struct i2c_atr_alias_pair - Holds the alias assigned to a client.
27 * @alias: I2C alias address assigned by the driver.
28 * This is the address that will be used to issue I2C transactions
29 * on the parent (physical) bus.
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| /openbmc/linux/Documentation/devicetree/bindings/i2c/ |
| H A D | i2c-mux-gpmux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux-gpmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: General Purpose I2C Bus Mux
10 - Peter Rosin <peda@axentia.se>
13 This binding describes an I2C bus multiplexer that uses a mux controller
14 from the mux subsystem to route the I2C signals.
16 .-----. .-----.
18 .------------. '-----' '-----'
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| H A D | i2c-mux-reg.txt | 1 Register-based I2C Bus Mux
3 This binding describes an I2C bus multiplexer that uses a single register
4 to route the I2C signals.
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
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| H A D | i2c-demux-pinctrl.txt | 1 Pinctrl-based I2C Bus DeMux
3 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
4 route the I2C signals, and represents the pin multiplexing configuration using
5 the pinctrl device tree bindings. This may be used to select one I2C IP core at
6 runtime which may have a better feature set for a given task than another I2C
10 +-------------------------------+
12 | | +-----+ +-----+
13 | +------------+ | | dev | | dev |
14 | |I2C IP Core1|--\ | +-----+ +-----+
15 | +------------+ \-------+ | | |
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | exynos4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
23 combiner: interrupt-controller@10440000 {
24 compatible = "samsung,exynos4210-combiner";
25 #interrupt-cells = <2>;
26 interrupt-controller;
30 gic: interrupt-controller@10490000 {
31 compatible = "arm,cortex-a9-gic";
32 #interrupt-cells = <3>;
33 interrupt-controller;
34 cpu-offset = <0x4000>;
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| /openbmc/qemu/tests/qtest/libqos/ |
| H A D | i2c-omap.c | 2 * QTest I2C driver
7 * See the COPYING file in the top-level directory.
10 #include "i2c.h"
48 qtest_writew(s->parent.qts, s->addr + OMAP_I2C_SA, data); in omap_i2c_set_slave_addr()
49 data = qtest_readw(s->parent.qts, s->addr + OMAP_I2C_SA); in omap_i2c_set_slave_addr()
53 static void omap_i2c_send(I2CAdapter *i2c, uint8_t addr, in omap_i2c_send() argument
56 OMAPI2C *s = container_of(i2c, OMAPI2C, parent); in omap_i2c_send()
62 qtest_writew(i2c->qts, s->addr + OMAP_I2C_CNT, data); in omap_i2c_send()
69 qtest_writew(i2c->qts, s->addr + OMAP_I2C_CON, data); in omap_i2c_send()
70 data = qtest_readw(i2c->qts, s->addr + OMAP_I2C_CON); in omap_i2c_send()
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| H A D | i2c-imx.c | 2 * QTest i.MX I2C driver
4 * Copyright (c) 2013 Jean-Christophe Dubois
21 #include "i2c.h"
26 #include "hw/i2c/imx_i2c.h"
36 qtest_writeb(s->parent.qts, s->addr + I2DR_ADDR, in imx_i2c_set_slave_addr()
40 static void imx_i2c_send(I2CAdapter *i2c, uint8_t addr, in imx_i2c_send() argument
43 IMXI2C *s = container_of(i2c, IMXI2C, parent); in imx_i2c_send()
59 qtest_writeb(i2c->qts, s->addr + I2CR_ADDR, data); in imx_i2c_send()
60 status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR); in imx_i2c_send()
65 status = qtest_readb(i2c->qts, s->addr + I2SR_ADDR); in imx_i2c_send()
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| /openbmc/linux/drivers/i2c/muxes/ |
| H A D | i2c-mux-gpmux.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * General Purpose I2C multiplexer
10 #include <linux/i2c.h>
11 #include <linux/i2c-mux.h>
28 ret = mux_control_select(mux->control, chan); in i2c_mux_select()
29 mux->do_not_deselect = ret < 0; in i2c_mux_select()
38 if (mux->do_not_deselect) in i2c_mux_deselect()
41 return mux_control_deselect(mux->control); in i2c_mux_deselect()
46 struct device_node *np = dev->of_node; in mux_parent_adapter()
48 struct i2c_adapter *parent; in mux_parent_adapter() local
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| H A D | i2c-mux-pinctrl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C multiplexer using pinctrl API
8 #include <linux/i2c.h>
9 #include <linux/i2c-mux.h>
26 return pinctrl_select_state(mux->pinctrl, mux->states[chan]); in i2c_mux_pinctrl_select()
31 return i2c_mux_pinctrl_select(muxc, muxc->num_adapters); in i2c_mux_pinctrl_deselect()
41 list_for_each_entry(setting, &state->settings, node) { in i2c_mux_pinctrl_root_adapter()
42 pin_root = i2c_root_adapter(setting->pctldev->dev); in i2c_mux_pinctrl_root_adapter()
56 struct device_node *np = dev->of_node; in i2c_mux_pinctrl_parent_adapter()
58 struct i2c_adapter *parent; in i2c_mux_pinctrl_parent_adapter() local
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| H A D | i2c-mux-gpio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C multiplexer using GPIO API
8 #include <linux/i2c.h>
9 #include <linux/i2c-mux.h>
11 #include <linux/platform_data/i2c-mux-gpio.h>
32 gpiod_set_array_value_cansleep(mux->ngpios, mux->gpios, NULL, values); in i2c_mux_gpio_set()
48 i2c_mux_gpio_set(mux, mux->data.idle); in i2c_mux_gpio_deselect()
56 struct device *dev = &pdev->dev; in i2c_mux_gpio_probe_fw()
58 struct device_node *np = dev->of_node; in i2c_mux_gpio_probe_fw()
67 return -ENODEV; in i2c_mux_gpio_probe_fw()
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| H A D | i2c-arb-gpio-challenge.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO-based I2C Arbitration Using a Challenge & Response Mechanism
11 #include <linux/i2c.h>
12 #include <linux/i2c-mux.h>
19 * struct i2c_arbitrator_data - Driver data for I2C arbitrator
38 * i2c_arbitrator_select - claim the I2C bus
40 * Use the GPIO-based signalling protocol; return -EBUSY if we fail.
48 stop_time = jiffies + usecs_to_jiffies(arb->wait_free_us) + 1; in i2c_arbitrator_select()
51 gpiod_set_value(arb->our_gpio, 1); in i2c_arbitrator_select()
52 udelay(arb->slew_delay_us); in i2c_arbitrator_select()
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| H A D | i2c-demux-pinctrl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pinctrl based I2C DeMultiplexer
5 * Copyright (C) 2015-16 by Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
6 * Copyright (C) 2015-16 by Renesas Electronics Corporation
9 * (look for filenames containing 'i2c-demux-pinctrl' in Documentation/)
12 #include <linux/i2c.h>
40 struct i2c_demux_pinctrl_priv *priv = adap->algo_data; in i2c_demux_master_xfer()
41 struct i2c_adapter *parent = priv->chan[priv->cur_chan].parent_adap; in i2c_demux_master_xfer() local
43 return __i2c_transfer(parent, msgs, num); in i2c_demux_master_xfer()
48 struct i2c_demux_pinctrl_priv *priv = adap->algo_data; in i2c_demux_functionality()
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| H A D | i2c-mux-reg.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * I2C multiplexer using a single register
9 #include <linux/i2c.h>
10 #include <linux/i2c-mux.h>
15 #include <linux/platform_data/i2c-mux-reg.h>
25 if (!mux->data.reg) in i2c_mux_reg_set()
26 return -EINVAL; in i2c_mux_reg_set()
34 switch (mux->data.reg_size) { in i2c_mux_reg_set()
36 if (mux->data.little_endian) in i2c_mux_reg_set()
37 iowrite32(chan_id, mux->data.reg); in i2c_mux_reg_set()
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| /openbmc/linux/drivers/i2c/busses/ |
| H A D | i2c-xiic.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-xiic.c
4 * Copyright (c) 2002-2007 Xilinx Inc.
5 * Copyright (c) 2009-2010 Intel Corporation
24 #include <linux/i2c.h>
27 #include <linux/platform_data/i2c-xiic.h>
34 #define DRIVER_NAME "xiic-i2c"
56 * struct xiic_i2c - Internal representation of the XIIC I2C bus
67 * @endianness: big/little-endian byte order
68 * @clk: Pointer to AXI4-lite input clock
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| H A D | i2c-img-scb.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C adapter for the IMG Serial Control Bus (SCB) IP block.
7 * There are three ways that this I2C controller can be driven:
9 * - Raw control of the SDA and SCK signals.
15 * - Atomic commands. A low level I2C symbol (such as generate
20 * This mode of operation is used by MODE_ATOMIC, which uses an I2C
21 * state machine in the interrupt handler to compose/react to I2C
26 * in suboptimal use of the bus, with gaps between the I2C symbols while
29 * - Automatic mode. A bus address, and whether to read/write is
30 * specified, and the hardware takes care of the I2C state machine,
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| /openbmc/linux/include/linux/ |
| H A D | i2c-atr.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * I2C Address Translator
8 * Based on i2c-mux.h
14 #include <linux/i2c.h>
22 * struct i2c_atr_ops - Callbacks from ATR to the device driver.
40 * i2c_atr_new() - Allocate and initialize an I2C ATR helper.
41 * @parent: The parent (upstream) adapter
43 * @ops: Driver-specific callbacks
46 * The new ATR helper is connected to the parent adapter but has no child
53 struct i2c_atr *i2c_atr_new(struct i2c_adapter *parent, struct device *dev,
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| /openbmc/openbmc/meta-hpe/meta-dl360poc/recipes-kernel/linux/linux-obmc/ |
| H A D | gxp.dts | 1 /dts-v1/;
3 #address-cells = <1>;
4 #size-cells = <1>;
23 compatible = "simple-bus";
24 #address-cells = <1>;
25 #size-cells = <1>;
29 compatible = "arm,pl192-vic";
30 interrupt-controller;
32 #interrupt-cells = <1>;
36 compatible = "arm,pl192-vic";
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| /openbmc/linux/arch/arc/boot/dts/ |
| H A D | abilis_tb10x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only
12 compatible = "abilis,arc-tb10x";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 #address-cells = <1>;
18 #size-cells = <0>;
28 compatible = "snps,arc-timer";
30 interrupt-parent = <&intc>;
36 compatible = "snps,arc-timer";
41 #address-cells = <1>;
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| /openbmc/linux/arch/mips/boot/dts/ingenic/ |
| H A D | jz4780.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
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| /openbmc/linux/arch/arm64/boot/dts/apple/ |
| H A D | t600x-die0.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 nco: clock-controller@28e03c000 {
11 compatible = "apple,t6000-nco", "apple,nco";
14 #clock-cells = <1>;
17 aic: interrupt-controller@28e100000 {
18 compatible = "apple,t6000-aic", "apple,aic2";
19 #interrupt-cells = <4>;
20 interrupt-controller;
23 reg-names = "core", "event";
24 power-domains = <&ps_aic>;
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| /openbmc/linux/arch/mips/boot/dts/brcm/ |
| H A D | bcm7420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <93750000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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| H A D | bcm7125.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <202500000>;
30 cpu_intc: interrupt-controller {
31 #address-cells = <0>;
32 compatible = "mti,cpu-interrupt-controller";
34 interrupt-controller;
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