| /openbmc/linux/drivers/usb/host/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 # USB Host Controller Drivers
5 comment "USB Host Controller Drivers"
11 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role
12 host/peripheral/OTG USB controllers.
14 Enable this option to support this chip in host controller mode.
24 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
25 "SuperSpeed" host controller hardware.
28 module will be called xhci-hcd.
36 sure that your xHCI host supports the extended debug capability and
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| H A D | ehci-xilinx-of.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * EHCI HCD (Host Controller Driver) for USB.
9 * Based on "ehci-ppc-of.c" by Valentine Barshak <vbarshak@ru.mvista.com>
10 * and "ehci-ppc-soc.c" by Stefan Roese <sr@denx.de>
11 * and "ohci-ppc-of.c" by Sylvain Munaut <tnt@246tNt.com>
23 * ehci_xilinx_port_handed_over - hand the port out if failed to enable it
24 * @hcd: Pointer to the usb_hcd device to which the host controller bound
27 * This function is used as a place to tell the user that the Xilinx USB host
28 * controller does support LS devices. And in an HS only configuration, it
32 * There are cases when the host controller fails to enable the port due to,
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| /openbmc/linux/drivers/mmc/host/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 # MMC/SD host controller drivers
6 comment "MMC/SD/SDIO Host Controller Drivers"
9 bool "MMC host drivers debugging"
13 say N here. This enables MMC host driver debugging. And further
14 added host drivers please don't invent their private macro for
18 tristate "Sunplus SP7021 MMC Controller"
21 If you say yes here, you will get support for eMMC host interface
37 bool "Qualcomm Data Mover for SD Card Controller"
41 This selects the Qualcomm Data Mover lite/local on SD Card controller.
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| H A D | sdhci.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
5 * Header file for Host Controller registers and I/O accessors.
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
20 #include <linux/mmc/host.h>
23 * Controller registers
103 * VDD2 - UHS2 or PCIe/NVMe
174 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
196 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
243 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
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| /openbmc/linux/drivers/spi/ |
| H A D | spi-qup.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014, The Linux foundation. All rights reserved.
18 #include <linux/dma-mapping.h>
115 #define SPI_MAX_XFER (SZ_64K - 64)
155 static inline bool spi_qup_is_flag_set(struct spi_qup *controller, u32 flag) in spi_qup_is_flag_set() argument
157 u32 opflag = readl_relaxed(controller->base + QUP_OPERATIONAL); in spi_qup_is_flag_set()
171 static inline unsigned int spi_qup_len(struct spi_qup *controller) in spi_qup_len() argument
173 return controller->n_words * controller->w_size; in spi_qup_len()
176 static inline bool spi_qup_is_valid_state(struct spi_qup *controller) in spi_qup_is_valid_state() argument
178 u32 opstate = readl_relaxed(controller->base + QUP_STATE); in spi_qup_is_valid_state()
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| /openbmc/linux/drivers/pci/controller/dwc/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 menu "DesignWare-based PCIe controllers"
18 bool "Amazon Annapurna Labs PCIe controller"
25 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
27 required only for DT-based platforms. ACPI platforms with the
28 Annapurna Labs PCIe controller don't need to enable this.
31 tristate "Amlogic Meson PCIe controller"
36 Say Y here if you want to enable PCI controller support on Amlogic
37 SoCs. The PCI controller on Amlogic is based on DesignWare hardware
38 and therefore the driver re-uses the DesignWare core functions to
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| /openbmc/u-boot/drivers/usb/host/ |
| H A D | Kconfig | 2 # USB Host Controller Drivers
4 comment "USB Host Controller Drivers"
12 ---help---
13 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
14 "SuperSpeed" host controller hardware.
22 USB controller based on the DesignWare USB3 IP Core.
30 USB controller based on the DesignWare USB3 IP Core.
43 bool "Support for PCI-based xHCI USB controller"
47 Enables support for the PCI-based xHCI controller.
50 bool "Support for Rockchip on-chip xHCI USB controller"
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| /openbmc/u-boot/drivers/mmc/ |
| H A D | Kconfig | 1 menu "MMC Host controller Support"
12 also to your specific host controller driver.
31 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
32 and non-removable (e.g. eMMC chip) devices are supported. These
33 appear as block devices in U-Boot and can support filesystems such
42 Secure Digital I/O (SDIO) cards. Both removable (SD, micro-SD, etc.)
43 and non-removable (e.g. eMMC chip) devices are supported. These
44 appear as block devices in U-Boot and can support filesystems such
65 enabled by the host driver.
161 you are reading this help text, you most likely have no idea :-)
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| /openbmc/linux/drivers/usb/cdns3/ |
| H A D | Kconfig | 8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
30 bool "Cadence USB3 device controller"
33 Say Y here to enable device controller functionality of the
34 Cadence USBSS-DEV driver.
36 This controller supports FF, HS and SS mode. It doesn't support
40 bool "Cadence USB3 host controller"
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| /openbmc/linux/drivers/ufs/host/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0+
3 # Kernel configuration file for the UFS host controller drivers.
5 # Copyright (C) 2011-2013 Samsung India Software Operations
12 tristate "PCI bus based UFS Controller support"
15 This selects the PCI UFS Host Controller Interface. Select this if
16 you have UFS Host Controller with PCI Interface.
18 If you have a controller with this interface, say Y or M here.
31 tristate "Platform bus based UFS Controller support"
34 This selects the UFS host controller support. Select this if
35 you have an UFS controller on Platform bus.
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| H A D | ufs-qcom.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
8 #include <linux/reset-controller.h>
26 /* vendor specific pre-defined parameters */
32 /* QCOM UFS host controller vendor specific registers */
53 * QCOM UFS host controller vendor specific registers
61 /* QCOM UFS host controller vendor specific debug registers */
170 /* Host controller hardware version: major.minor.step */
186 * Set this capability if host controller supports the QUniPro mode
187 * and if driver wants the Host controller to operate in QUniPro mode.
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| /openbmc/linux/drivers/pci/controller/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 menu "PCI controller drivers"
7 tristate "Aardvark PCIe controller"
13 Add support for Aardvark 64bit PCIe Host Controller. This
14 controller is part of the South Bridge of the Marvel Armada
18 tristate "Altera PCIe controller"
21 Say Y here if you want to enable PCIe controller support on Altera
30 This MSI driver supports Altera MSI to GIC controller IP.
38 tristate "Apple PCIe controller"
44 Say Y here if you want to enable PCIe controller support on Apple
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| /openbmc/linux/drivers/eisa/ |
| H A D | eisa.ids | 6 # Marc Zyngier <maz@wild-wind.fr.eu.org>
10 ABP0510 "Advansys ABP-510 ISA SCSI Host Adapter"
11 ABP0540 "Advansys ABP-540/542 ISA SCSI Host Adapter"
12 ABP7401 "AdvanSys ABP-740/742 EISA Single Channel SCSI Host Adapter"
13 ABP7501 "AdvanSys ABP-750/752 EISA Dual Channel SCSI Host Adapter"
14 ACC1200 "ACCTON EtherCombo-32 Ethernet Adapter"
15 ACC120A "ACCTON EtherCombo-32 Ethernet Adapter"
22 ACE4010 "ACME Tape Controller"
24 ACE6010 "ACME Disk Controller"
25 ACE7010 "ACME Multi-Function Board"
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| /openbmc/linux/include/linux/ |
| H A D | mhi_ep.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
9 #include <linux/dma-direction.h>
15 * struct mhi_ep_channel_config - Channel configuration structure for controller
29 * struct mhi_ep_cntrl_config - MHI Endpoint controller configuration
30 * @mhi_version: MHI spec version supported by the controller
43 * struct mhi_ep_db_info - MHI Endpoint doorbell info
53 * struct mhi_ep_buf_info - MHI Endpoint transfer buffer info
56 * @host_addr: Address of the bufffer in host
59 * @cb: Callback to be executed by controller drivers after transfer completion (async)
74 * struct mhi_ep_cntrl - MHI Endpoint controller structure
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| /openbmc/linux/drivers/staging/fieldbus/Documentation/devicetree/bindings/fieldbus/ |
| H A D | arcx,anybus-controller.txt | 1 * Arcx Anybus-S controller
8 --------------------
10 - compatible : The following chip-specific string:
11 "arcx,anybus-controller"
13 - reg : three areas:
15 index 1: bus memory area of the first host's dual-port ram.
16 index 2: bus memory area of the second host's dual-port ram.
18 - reset-gpios : the GPIO pin connected to the reset line of the controller.
20 - interrupts : two interrupts:
21 index 0: interrupt connected to the first host
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| /openbmc/linux/drivers/usb/usbip/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
17 be called usbip-core.
25 This enables the USB/IP virtual host controller driver,
29 module will be called vhci-hcd.
32 int "Number of ports per USB/IP virtual host controller"
38 host controller driver, this defines number of ports per
39 USB/IP virtual host controller.
42 int "Number of USB/IP virtual host controllers"
48 host controller driver, this defines number of USB/IP
49 virtual host controllers as if adding physical host
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| /openbmc/linux/Documentation/devicetree/bindings/pci/ |
| H A D | host-generic-pci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic PCI host controller
10 - Will Deacon <will@kernel.org>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
16 and clock management. In fact, the controller may not even require the
21 Configuration Space is assumed to be memory-mapped (as opposed to being
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| /openbmc/u-boot/drivers/usb/gadget/ |
| H A D | Kconfig | 3 # (a) a peripheral controller, and
6 # NOTE: Gadget support ** DOES NOT ** depend on host-side CONFIG_USB !!
8 # - Host systems (like PCs) need CONFIG_USB (with "A" jacks).
9 # - Peripherals (like PDAs) need CONFIG_USB_GADGET (with "B" jacks).
10 # - Some systems have both kinds of controllers.
12 # With help from a special transceiver and a "Mini-AB" jack, systems with
13 # both kinds of controller can also support "USB On-the-Go" (CONFIG_USB_OTG).
20 host (such as a PC) controlling up to 127 peripheral devices.
22 you can't connect a "to-the-host" connector to a peripheral.
24 U-Boot can run in the host, or in the peripheral. In both cases
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| /openbmc/linux/drivers/nvme/host/ |
| H A D | fabrics.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * NVMe over Fabrics common host code.
4 * Copyright (c) 2015-2016 HGST, a Western Digital Company.
18 /* default is -1: the fail fast mechanism is disabled */
19 #define NVMF_DEF_FAIL_FAST_TMO -1
22 * Define a host as seen by the target. We allocate one at boot, but also
24 * persistence of the Host NQN over multiple boots, and to allow using
26 * use different Host NQNs with the same Host ID we generate a Host ID and
37 * enum nvmf_parsing_opts - used to define the sysfs parsing options used.
69 * struct nvmf_ctrl_options - Used to hold the options specified
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| /openbmc/qemu/docs/system/devices/ |
| H A D | usb.rst | 2 -------------
4 QEMU can emulate a PCI UHCI, OHCI, EHCI or XHCI USB controller. You can
5 plug virtual USB devices or real host USB devices (only works with
6 certain host operating systems). QEMU will automatically create and
12 XHCI controller support
15 QEMU has XHCI host adapter support. The XHCI hardware design is much
16 more virtualization-friendly when compared to EHCI and UHCI, thus XHCI
21 |qemu_system| -device qemu-xhci
24 only controller you need. With only a single USB controller (and
29 EHCI controller support
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| /openbmc/linux/drivers/ata/ |
| H A D | ata_piix.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ata_piix.c - Intel PATA/SATA controllers
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2003-2005 Red Hat Inc
10 * Copyright 2003-2005 Jeff Garzik
14 * Copyright (C) 1998-1999 Andrzej Krzysztofowicz, Author and Maintainer
15 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
19 * as Documentation/driver-api/libata.rst
40 * PIIX4 errata #9 - Only on ultra obscure hw
41 * ICH3 errata #13 - Not observed to affect real hw
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| /openbmc/linux/drivers/pci/controller/cadence/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 menu "Cadence-based PCIe controllers"
25 bool "Cadence platform PCIe controller (host mode)"
30 Say Y here if you want to support the Cadence PCIe platform controller in
31 host mode. This PCIe controller may be embedded into many different
35 bool "Cadence platform PCIe controller (endpoint mode)"
41 Say Y here if you want to support the Cadence PCIe platform controller in
42 endpoint mode. This PCIe controller may be embedded into many
49 bool "TI J721E PCIe controller (host mode)"
55 controller in host mode. TI J721E PCIe controller uses Cadence PCIe
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| /openbmc/linux/Documentation/devicetree/bindings/ata/ |
| H A D | apm-xgene.txt | 1 * APM X-Gene 6.0 Gb/s SATA host controller nodes
3 SATA host controller nodes are defined to describe on-chip Serial ATA
4 controllers. Each SATA controller (pair of ports) have its own node.
7 - compatible : Shall contain:
8 * "apm,xgene-ahci"
9 - reg : First memory resource shall be the AHCI memory
11 Second memory resource shall be the host controller
13 Third memory resource shall be the host controller
15 4th memory resource shall be the host controller
17 5th optional memory resource shall be the host
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| /openbmc/linux/Documentation/devicetree/bindings/mfd/ |
| H A D | aspeed-lpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/mfd/aspeed-lpc.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Aspeed Low Pin Count (LPC) Bus Controller
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Chia-Wei Wang <chiawei_wang@aspeedtech.com>
15 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
17 primary use case of the Aspeed LPC controller is as a slave on the bus
18 (typically in a Baseboard Management Controller SoC), but under certain
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| /openbmc/linux/drivers/mtd/nand/raw/ |
| H A D | lpc32xx_mlc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for NAND MLC Controller in LPC32xx
10 * NAND Flash Controller Operation:
11 * - Read: Auto Decode
12 * - Write: Auto Encode
13 * - Tested Page Sizes: 2048, 4096
32 #include <linux/dma-mapping.h>
38 * MLC NAND controller register offsets
134 if (section >= nand_chip->ecc.steps) in lpc32xx_ooblayout_ecc()
135 return -ERANGE; in lpc32xx_ooblayout_ecc()
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