/openbmc/entity-manager/configurations/ |
H A D | asrock_c3_medium_x86.json | 17 "Name": "higher non critical", 23 "Name": "higher critical", 44 "Name": "higher non critical", 50 "Name": "higher critical", 71 "Name": "higher non critical", 77 "Name": "higher critical", 98 "Name": "higher non critical", 104 "Name": "higher critical", 125 "Name": "higher non critical", 131 "Name": "higher critical", [all …]
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/openbmc/u-boot/arch/x86/lib/ |
H A D | div64.c | 15 u32 higher; member 25 output.words.higher = output.words.lower << (shift - 32); in __ashldi3() 30 output.words.higher = (output.words.higher << shift) | in __ashldi3() 43 output.words.lower = output.words.higher >> (shift - 32); in __lshrdi3() 44 output.words.higher = 0; in __lshrdi3() 49 (output.words.higher << (32 - shift)); in __lshrdi3() 50 output.words.higher = output.words.higher >> shift; in __lshrdi3()
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/openbmc/linux/Documentation/scheduler/ |
H A D | sched-debug.rst | 33 the higher the "scan size", the higher the scan rate. 35 Higher scan rates incur higher system overhead as page faults must be 36 trapped and potentially data must be migrated. However, the higher the scan
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/openbmc/linux/Documentation/userspace-api/media/dvb/ |
H A D | fe-enable-high-lnb-voltage.rst | 13 FE_ENABLE_HIGH_LNB_VOLTAGE - Select output DC level between normal LNBf voltages or higher LNBf - v… 33 - >0 - enables slightly higher voltages instead of 13/18V, in order 39 Select output DC level between normal LNBf voltages or higher LNBf 40 voltages between 0 (normal) or a value grater than 0 for higher
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/openbmc/linux/sound/soc/sof/intel/ |
H A D | Kconfig | 16 'select' statements at a higher level. 24 'select' statements at a higher level. 36 'select' statements at a higher level. 291 'select' statements at a higher level. 297 'select' statements at a higher level. 326 'select' statements at a higher level. 334 'select' statements at a higher level. 343 'select' statements at a higher level.
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/openbmc/linux/include/linux/ceph/ |
H A D | msgr.h | 109 with higher cseq */ 111 with higher gseq */ 158 __le16 priority; /* priority. higher value == higher priority */ 176 __le16 priority; /* priority. higher value == higher priority */ 195 __le16 priority; /* priority. higher value == higher priority */
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/openbmc/linux/arch/x86/kernel/ |
H A D | itmt.c | 10 * higher than for the other cores in the same package. In that case, 12 * to run tasks on the CPUs with higher max turbo frequencies. 15 * scheduler to favor scheduling on cores can be boosted to a higher 34 * of higher turbo frequency for cpus supporting Intel Turbo Boost Max 173 * to the max boost frequency. CPUs with higher boost 174 * frequency will receive higher priority.
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/openbmc/linux/Documentation/tools/rtla/ |
H A D | common_timerlat_options.rst | 14 Stop trace if the *IRQ* latency is higher than the argument in us. 18 Stop trace if the *Thread* latency is higher than the argument in us. 22 Save the stack trace at the *IRQ* if a *Thread* latency is higher than the
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H A D | common_osnoise_options.rst | 16 Stop the trace if a single sample is higher than the argument in microseconds. 21 Stop the trace if the total sample is higher than the argument in microseconds.
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/openbmc/docs/designs/mctp/ |
H A D | mctp.md | 44 I2C, PCI, Serial or custom hardware channel, without the higher layers of that 45 stack needing to be aware of the hardware implementation. These higher levels 58 the higher-level data transferred between MCTP endpoints, which packets are 75 - Be usable over simple hardware implementations, but have a facility for higher
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/openbmc/linux/Documentation/hwmon/ |
H A D | nct6775.rst | 115 configuration. An alarm is triggered when the temperature gets higher than 207 speed increases (if temperature is higher that desired) or decreases (if 252 points should be set to higher temperatures and higher pwm values to achieve 253 higher fan speeds with increasing temperature. The last data point reflects
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/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | kirkwood-rd88f6281-a.dts | 8 * higher stepping of the SoC. The ethernet switch does not have a 16 model = "Marvell RD88f6281 Reference design, with A0 or higher SoC";
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/openbmc/linux/net/lapb/ |
H A D | Kconfig | 12 it is used to transport higher level protocols (mostly X.25 Packet 13 Layer, the higher part of X.25, but others are possible as well).
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/openbmc/linux/Documentation/devicetree/bindings/display/ |
H A D | solomon,ssd1307fb.yaml | 111 the higher, the higher the capacitance of the OLED's pixels is. 125 Clock frequency, higher value means higher frequency.
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/openbmc/linux/sound/soc/sof/amd/ |
H A D | Kconfig | 28 'select' statements at a higher level 61 'select' statements at a higher level
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/openbmc/u-boot/include/power/ |
H A D | max77686_pmic.h | 187 #define MAX77686_LDO_UV_HSTEP 50000 /* uV higher value step */ 189 #define MAX77686_BUCK_UV_HMIN 750000 /* Higher minimun BUCK value */ 191 #define MAX77686_BUCK_UV_HSTEP 50000 /* uV higher value step */
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/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/upm/upm/ |
H A D | 0001-CMakeLists.txt-Use-SWIG_SUPPORT_FILES-to-find-the-li.patch | 5 of generated files for cmake version 3.12 or higher 9 cmake version 3.12 or higher
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/openbmc/linux/Documentation/block/ |
H A D | bfq-iosched.rst | 109 Higher speed for code-development tasks 120 On hard disks, BFQ achieves up to 30% higher throughput than CFQ, and 121 up to 150% higher throughput than DEADLINE and NOOP, with all the 260 receive a higher fraction of the device throughput. 274 got access to the device, the higher the throughput is. 286 higher in this common scenario. 290 higher-priority queues. Among queues in the same class, the 489 reached a higher throughput by setting max_budget explicitly, i.e., by 490 setting max_budget to a higher value than 0. In particular, they have 491 set max_budget to higher values than those to which BFQ would have set [all …]
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/openbmc/linux/drivers/misc/bcm-vk/ |
H A D | bcm_vk_sg.h | 24 * [U32] addr_h[0] = higher 32-bits of address0 28 * [U32] addr_h[N-1] = higher 32-bits of addressN-1
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/openbmc/linux/sound/soc/sof/ |
H A D | Kconfig | 63 'select' statements at a higher level. 70 'select' statements at a higher level. 269 'select' statements at a higher level. 278 'select' statements at a higher level.
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/openbmc/linux/Documentation/admin-guide/mm/ |
H A D | numaperf.rst | 104 slower performing memory cached by a smaller higher performing memory. The 107 higher performing memory to transparently cache access to progressively 111 hierarchy. Each increasing cache level provides higher performing 118 level memory, so the higher numbered cache level corresponds to memory
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/openbmc/linux/Documentation/locking/ |
H A D | rt-mutex-design.rst | 24 Priority inversion is when a lower priority process executes while a higher 38 meantime, B executes, and since B is of a higher priority than C, it preempts C, 39 but by doing so, it is in fact preempting A which is a higher priority process. 173 also call it the Top of the chain) must be equal to or higher in priority 360 pi waiter to its own normal/deadline priority and take the higher one. 367 higher the priority. A "prio" of 5 is of higher priority than a 371 or decrease the priority of the task. In the case that a higher priority 373 would increase/boost the task's priority. But if a higher priority task
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/openbmc/linux/arch/x86/crypto/ |
H A D | aes_ctrby8_avx-x86_64.S | 524 * Saving/restoring must be done at a higher level 537 * Saving/restoring must be done at a higher level 550 * Saving/restoring must be done at a higher level 563 * Saving/restoring must be done at a higher level 576 * Saving/restoring must be done at a higher level 589 * Saving/restoring must be done at a higher level
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/openbmc/linux/tools/bpf/runqslower/ |
H A D | runqslower.c | 33 " runqslower # trace run queue latency higher than 10000 us (default)\n" 34 " runqslower 1000 # trace run queue latency higher than 1000 us\n" 150 printf("Tracing run queue latency higher than %llu us\n", env.min_us); in main()
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/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | nvidia,tegra-regulators-coupling.txt | 13 and they both shall be higher than the CPU voltage by at least 120mV. 20 voltage shall be higher than the CPU by N mV, where N depends on the CPU
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