1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2857765e9SRajeshwari Shinde /* 3857765e9SRajeshwari Shinde * Copyright (C) 2012 Samsung Electronics 4857765e9SRajeshwari Shinde * Rajeshwari Shinde <rajeshwari.s@samsung.com> 5857765e9SRajeshwari Shinde */ 6857765e9SRajeshwari Shinde 7857765e9SRajeshwari Shinde #ifndef __MAX77686_H_ 8857765e9SRajeshwari Shinde #define __MAX77686_H_ 9857765e9SRajeshwari Shinde 107f39b067SPrzemyslaw Marczak #include <power/pmic.h> 117f39b067SPrzemyslaw Marczak 12857765e9SRajeshwari Shinde enum { 13857765e9SRajeshwari Shinde MAX77686_REG_PMIC_ID = 0x0, 14857765e9SRajeshwari Shinde MAX77686_REG_PMIC_INTSRC, 15857765e9SRajeshwari Shinde MAX77686_REG_PMIC_INT1, 16857765e9SRajeshwari Shinde MAX77686_REG_PMIC_INT2, 17857765e9SRajeshwari Shinde MAX77686_REG_PMIC_INT1MSK, 18857765e9SRajeshwari Shinde MAX77686_REG_PMIC_INT2MSK, 19857765e9SRajeshwari Shinde 20857765e9SRajeshwari Shinde MAX77686_REG_PMIC_STATUS1, 21857765e9SRajeshwari Shinde MAX77686_REG_PMIC_STATUS2, 22857765e9SRajeshwari Shinde 23857765e9SRajeshwari Shinde MAX77686_REG_PMIC_PWRON, 24857765e9SRajeshwari Shinde MAX77686_REG_PMIC_ONOFFDELAY, 25857765e9SRajeshwari Shinde MAX77686_REG_PMIC_MRSTB, 26857765e9SRajeshwari Shinde 27857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK1CRTL = 0x10, 28857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK1OUT, 29857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2CTRL1, 30857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK234FREQ, 31857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2DVS1, 32857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2DVS2, 33857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2DVS3, 34857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2DVS4, 35857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2DVS5, 36857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2DVS6, 37857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2DVS7, 38857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK2DVS8, 39857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK3CTRL, 40b0c3b119SJaehoon Chung MAX77686_REG_PMIC_BUCK3DVS1 = 0x1e, 41857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK3DVS2, 42857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK3DVS3, 43857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK3DVS4, 44857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK3DVS5, 45857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK3DVS6, 46857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK3DVS7, 47857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK3DVS8, 48857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4CTRL1, 49857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4DVS1 = 0x28, 50857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4DVS2, 51857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4DVS3, 52857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4DVS4, 53857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4DVS5, 54857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4DVS6, 55857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4DVS7, 56857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK4DVS8, 57857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK5CTRL, 58857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK5OUT, 59857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK6CRTL, 60857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK6OUT, 61857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK7CRTL, 62857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK7OUT, 63857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK8CRTL, 64857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK8OUT, 65857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK9CRTL, 66857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BUCK9OUT, 67857765e9SRajeshwari Shinde 68857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO1CTRL1 = 0x40, 69857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO2CTRL1, 70857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO3CTRL1, 71857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO4CTRL1, 72857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO5CTRL1, 73857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO6CTRL1, 74857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO7CTRL1, 75857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO8CTRL1, 76857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO9CTRL1, 77857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO10CTRL1, 78857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO11CTRL1, 79857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO12CTRL1, 80857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO13CTRL1, 81857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO14CTRL1, 82857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO15CTRL1, 83857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO16CTRL1, 84857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO17CTRL1, 85857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO18CTRL1, 86857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO19CTRL1, 87857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO20CTRL1, 88857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO21CTRL1, 89857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO22CTRL1, 90857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO23CTRL1, 91857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO24CTRL1, 92857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO25CTRL1, 93857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO26CTRL1, 94857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO1CTRL2, 95857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO2CTRL2, 96857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO3CTRL2, 97857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO4CTRL2, 98857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO5CTRL2, 99857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO6CTRL2, 100857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO7CTRL2, 101857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO8CTRL2, 102857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO9CTRL2, 103857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO10CTRL2, 104857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO11CTRL2, 105857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO12CTRL2, 106857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO13CTRL2, 107857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO14CTRL2, 108857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO15CTRL2, 109857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO16CTRL2, 110857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO17CTRL2, 111857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO18CTRL2, 112857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO19CTRL2, 113857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO20CTRL2, 114857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO21CTRL2, 115857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO22CTRL2, 116857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO23CTRL2, 117857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO24CTRL2, 118857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO25CTRL2, 119857765e9SRajeshwari Shinde MAX77686_REG_PMIC_LDO26CTRL2, 120857765e9SRajeshwari Shinde 121857765e9SRajeshwari Shinde MAX77686_REG_PMIC_BBAT = 0x7e, 122857765e9SRajeshwari Shinde MAX77686_REG_PMIC_32KHZ, 123857765e9SRajeshwari Shinde 12452a3de5eSPrzemyslaw Marczak MAX77686_NUM_OF_REGS, 125857765e9SRajeshwari Shinde }; 126857765e9SRajeshwari Shinde 127857765e9SRajeshwari Shinde /* I2C device address for pmic max77686 */ 128857765e9SRajeshwari Shinde #define MAX77686_I2C_ADDR (0x12 >> 1) 12952a3de5eSPrzemyslaw Marczak #define MAX77686_LDO_NUM 26 13052a3de5eSPrzemyslaw Marczak #define MAX77686_BUCK_NUM 9 13152a3de5eSPrzemyslaw Marczak 13252a3de5eSPrzemyslaw Marczak /* Drivers name */ 13352a3de5eSPrzemyslaw Marczak #define MAX77686_LDO_DRIVER "max77686_ldo" 13452a3de5eSPrzemyslaw Marczak #define MAX77686_BUCK_DRIVER "max77686_buck" 135857765e9SRajeshwari Shinde 136857765e9SRajeshwari Shinde enum { 137857765e9SRajeshwari Shinde REG_DISABLE = 0, 138857765e9SRajeshwari Shinde REG_ENABLE 139857765e9SRajeshwari Shinde }; 140857765e9SRajeshwari Shinde 141857765e9SRajeshwari Shinde enum { 142857765e9SRajeshwari Shinde LDO_OFF = 0, 143857765e9SRajeshwari Shinde LDO_ON, 144857765e9SRajeshwari Shinde 145857765e9SRajeshwari Shinde DIS_LDO = (0x00 << 6), 146857765e9SRajeshwari Shinde EN_LDO = (0x3 << 6), 147857765e9SRajeshwari Shinde }; 148857765e9SRajeshwari Shinde 149812d7576SPiotr Wilczek enum { 150812d7576SPiotr Wilczek OPMODE_OFF = 0, 151812d7576SPiotr Wilczek OPMODE_LPM, 1521757df46SPrzemyslaw Marczak OPMODE_STANDBY, 1531757df46SPrzemyslaw Marczak OPMODE_STANDBY_LPM, 154812d7576SPiotr Wilczek OPMODE_ON, 155812d7576SPiotr Wilczek }; 156812d7576SPiotr Wilczek 1571757df46SPrzemyslaw Marczak #ifdef CONFIG_POWER 158812d7576SPiotr Wilczek int max77686_set_ldo_voltage(struct pmic *p, int ldo, ulong uV); 159812d7576SPiotr Wilczek int max77686_set_ldo_mode(struct pmic *p, int ldo, char opmode); 1607e46be8aSSuriyan Ramasami int max77686_set_buck_voltage(struct pmic *p, int buck, ulong uV); 161812d7576SPiotr Wilczek int max77686_set_buck_mode(struct pmic *p, int buck, char opmode); 1621757df46SPrzemyslaw Marczak #endif 163812d7576SPiotr Wilczek 164812d7576SPiotr Wilczek #define MAX77686_LDO_VOLT_MAX_HEX 0x3f 165812d7576SPiotr Wilczek #define MAX77686_LDO_VOLT_MASK 0x3f 166812d7576SPiotr Wilczek #define MAX77686_LDO_MODE_MASK 0xc0 167812d7576SPiotr Wilczek #define MAX77686_LDO_MODE_OFF (0x00 << 0x06) 1681757df46SPrzemyslaw Marczak #define MAX77686_LDO_MODE_LPM (0x01 << 0x06) 169812d7576SPiotr Wilczek #define MAX77686_LDO_MODE_STANDBY (0x01 << 0x06) 1701757df46SPrzemyslaw Marczak #define MAX77686_LDO_MODE_STANDBY_LPM (0x02 << 0x06) 171812d7576SPiotr Wilczek #define MAX77686_LDO_MODE_ON (0x03 << 0x06) 1721757df46SPrzemyslaw Marczak #define MAX77686_BUCK234_VOLT_MAX_HEX 0xff 1731757df46SPrzemyslaw Marczak #define MAX77686_BUCK234_VOLT_MASK 0xff 1747e46be8aSSuriyan Ramasami #define MAX77686_BUCK_VOLT_MAX_HEX 0x3f 1757e46be8aSSuriyan Ramasami #define MAX77686_BUCK_VOLT_MASK 0x3f 176812d7576SPiotr Wilczek #define MAX77686_BUCK_MODE_MASK 0x03 177812d7576SPiotr Wilczek #define MAX77686_BUCK_MODE_SHIFT_1 0x00 178812d7576SPiotr Wilczek #define MAX77686_BUCK_MODE_SHIFT_2 0x04 179812d7576SPiotr Wilczek #define MAX77686_BUCK_MODE_OFF 0x00 180812d7576SPiotr Wilczek #define MAX77686_BUCK_MODE_STANDBY 0x01 181812d7576SPiotr Wilczek #define MAX77686_BUCK_MODE_LPM 0x02 182812d7576SPiotr Wilczek #define MAX77686_BUCK_MODE_ON 0x03 183812d7576SPiotr Wilczek 1841757df46SPrzemyslaw Marczak /* For regulator hex<->volt conversion */ 1851757df46SPrzemyslaw Marczak #define MAX77686_LDO_UV_MIN 800000 /* Minimum LDO uV value */ 1861757df46SPrzemyslaw Marczak #define MAX77686_LDO_UV_LSTEP 25000 /* uV lower value step */ 1871757df46SPrzemyslaw Marczak #define MAX77686_LDO_UV_HSTEP 50000 /* uV higher value step */ 1881757df46SPrzemyslaw Marczak #define MAX77686_BUCK_UV_LMIN 600000 /* Lower minimun BUCK value */ 1891757df46SPrzemyslaw Marczak #define MAX77686_BUCK_UV_HMIN 750000 /* Higher minimun BUCK value */ 1901757df46SPrzemyslaw Marczak #define MAX77686_BUCK_UV_LSTEP 12500 /* uV lower value step */ 1911757df46SPrzemyslaw Marczak #define MAX77686_BUCK_UV_HSTEP 50000 /* uV higher value step */ 1921757df46SPrzemyslaw Marczak 193b278c409SRajeshwari Shinde /* Buck1 1 volt value */ 194b278c409SRajeshwari Shinde #define MAX77686_BUCK1OUT_1V 0x5 1952955d600SBernie Thompson /* Buck1 1.05 volt value */ 1962955d600SBernie Thompson #define MAX77686_BUCK1OUT_1_05V 0x6 197b278c409SRajeshwari Shinde #define MAX77686_BUCK1CTRL_EN (3 << 0) 198b278c409SRajeshwari Shinde /* Buck2 1.3 volt value */ 199b278c409SRajeshwari Shinde #define MAX77686_BUCK2DVS1_1_3V 0x38 200b278c409SRajeshwari Shinde #define MAX77686_BUCK2CTRL_ON (1 << 4) 201b278c409SRajeshwari Shinde /* Buck3 1.0125 volt value */ 202b278c409SRajeshwari Shinde #define MAX77686_BUCK3DVS1_1_0125V 0x21 203b278c409SRajeshwari Shinde #define MAX77686_BUCK3CTRL_ON (1 << 4) 204b278c409SRajeshwari Shinde /* Buck4 1.2 volt value */ 205b278c409SRajeshwari Shinde #define MAX77686_BUCK4DVS1_1_2V 0x30 206b278c409SRajeshwari Shinde #define MAX77686_BUCK4CTRL_ON (1 << 4) 207b278c409SRajeshwari Shinde /* LDO2 1.5 volt value */ 208b278c409SRajeshwari Shinde #define MAX77686_LD02CTRL1_1_5V 0x1c 209b278c409SRajeshwari Shinde /* LDO3 1.8 volt value */ 210b278c409SRajeshwari Shinde #define MAX77686_LD03CTRL1_1_8V 0x14 211b278c409SRajeshwari Shinde /* LDO5 1.8 volt value */ 212b278c409SRajeshwari Shinde #define MAX77686_LD05CTRL1_1_8V 0x14 213b278c409SRajeshwari Shinde /* LDO10 1.8 volt value */ 214b278c409SRajeshwari Shinde #define MAX77686_LD10CTRL1_1_8V 0x14 215b278c409SRajeshwari Shinde /* 216b278c409SRajeshwari Shinde * MAX77686_REG_PMIC_32KHZ set to 32KH CP 217b278c409SRajeshwari Shinde * output is activated 218b278c409SRajeshwari Shinde */ 219b278c409SRajeshwari Shinde #define MAX77686_32KHCP_EN (1 << 1) 220b278c409SRajeshwari Shinde /* 221b278c409SRajeshwari Shinde * MAX77686_REG_PMIC_BBAT set to 222b278c409SRajeshwari Shinde * Back up batery charger on and 223b278c409SRajeshwari Shinde * limit voltage setting to 3.5v 224b278c409SRajeshwari Shinde */ 225b278c409SRajeshwari Shinde #define MAX77686_BBCHOSTEN (1 << 0) 226b278c409SRajeshwari Shinde #define MAX77686_BBCVS_3_5V (3 << 3) 227857765e9SRajeshwari Shinde #endif /* __MAX77686_PMIC_H_ */ 228