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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-bd71815.c1 // SPDX-License-Identifier: GPL-2.0
8 * Author: yanglsh@embest-tech.com
18 #include <linux/mfd/rohm-bd71815.h>
33 ret = regmap_read(bd71815->regmap, BD71815_REG_GPO, &val); in bd71815gpo_get()
37 return (val >> offset) & 1; in bd71815gpo_get()
49 ret = regmap_set_bits(bd71815->regmap, BD71815_REG_GPO, bit); in bd71815gpo_set()
51 ret = regmap_clear_bits(bd71815->regmap, BD71815_REG_GPO, bit); in bd71815gpo_set()
54 dev_warn(bd71815->dev, "failed to toggle GPO\n"); in bd71815gpo_set()
58 unsigned long config) in bd71815_gpio_set_config() argument
62 switch (pinconf_to_config_param(config)) { in bd71815_gpio_set_config()
[all …]
H A Dgpio-vx855.c1 // SPDX-License-Identifier: GPL-2.0+
23 * GPO 0...12 General Purpose Output
24 * GPIO 0...14 General Purpose I/O (Open-Drain)
45 return 1 << i; in gpi_i_bit()
47 return 1 << (i + 14); in gpi_i_bit()
53 return 1 << i; in gpo_o_bit()
55 return 1 << (i + 14); in gpo_o_bit()
61 return 1 << (i + 10); in gpio_i_bit()
63 return 1 << (i + 14); in gpio_i_bit()
69 return 1 << (i + 11); in gpio_o_bit()
[all …]
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 config GPIOLIB_FASTPATH_LIMIT
29 config OF_GPIO
34 config GPIO_ACPI
38 config GPIOLIB_IRQCHIP
42 config OF_GPIO_MM_GPIOCHIP
47 this symbol, but new drivers should use the generic gpio-regmap
50 config DEBUG_GPIO
57 non-sleeping contexts. They can make bitbanged serial protocols
61 config GPIO_SYSFS
[all …]
H A Dgpio-tn48m.c1 // SPDX-License-Identifier: GPL-2.0-only
19 TN48M_GP0 = 1,
44 struct gpio_regmap_config config = {}; in tn48m_gpio_probe() local
49 if (!pdev->dev.parent) in tn48m_gpio_probe()
50 return -ENODEV; in tn48m_gpio_probe()
52 gpio_config = device_get_match_data(&pdev->dev); in tn48m_gpio_probe()
54 return -ENODEV; in tn48m_gpio_probe()
56 ret = device_property_read_u32(&pdev->dev, "reg", &base); in tn48m_gpio_probe()
60 regmap = dev_get_regmap(pdev->dev.parent, NULL); in tn48m_gpio_probe()
62 return -ENODEV; in tn48m_gpio_probe()
[all …]
H A Dgpio-sl28cpld.c1 // SPDX-License-Identifier: GPL-2.0-only
25 /* input-only flavor */
28 /* output-only flavor */
32 SL28CPLD_GPIO = 1,
39 REGMAP_IRQ_REG_LINE(1, 8),
50 struct gpio_regmap_config *config) in sl28cpld_gpio_irq_init() argument
54 struct device *dev = &pdev->dev; in sl28cpld_gpio_irq_init()
57 if (!device_property_read_bool(dev, "interrupt-controller")) in sl28cpld_gpio_irq_init()
66 return -ENOMEM; in sl28cpld_gpio_irq_init()
68 irq_chip->name = "sl28cpld-gpio-irq"; in sl28cpld_gpio_irq_init()
[all …]
H A Dgpio-lp873x.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
4 * Keerthy <j-keerthy@ti.com>
35 return -EINVAL; in lp873x_gpio_direction_input()
44 return regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, in lp873x_gpio_direction_output()
54 ret = regmap_read(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, &val); in lp873x_gpio_get()
66 regmap_update_bits(gpio->lp873->regmap, LP873X_REG_GPO_CTRL, in lp873x_gpio_set()
78 /* No MUX Set up Needed for GPO */ in lp873x_gpio_request()
80 case 1: in lp873x_gpio_request()
82 ret = regmap_update_bits(gpio->lp873->regmap, LP873X_REG_CONFIG, in lp873x_gpio_request()
[all …]
H A Dgpio-tps65218.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * This driver is based on the gpio-tps65912 implementation.
26 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_get()
30 ret = regmap_read(tps65218->regmap, TPS65218_REG_ENABLE2, &val); in tps65218_gpio_get()
41 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_set()
64 return -EPERM; in tps65218_gpio_input()
70 struct tps65218 *tps65218 = tps65218_gpio->tps65218; in tps65218_gpio_request()
74 dev_err(gc->parent, "can't work as open source\n"); in tps65218_gpio_request()
75 return -EINVAL; in tps65218_gpio_request()
81 dev_err(gc->parent, "GPO1 works only as open drain\n"); in tps65218_gpio_request()
[all …]
/openbmc/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-mvebu.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
13 * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
29 * struct mvebu_mpp_ctrl - describe a mpp control
53 unsigned long *config);
55 unsigned long config);
62 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
64 * @name: ctrl setting name, e.g. uart2, spi0 - unique per mpp_mode
67 * @flags: (private) flags to store gpi/gpo/gpio capabilities
77 * If name is one of "gpi", "gpo", "gpio" gpio capabilities are
[all …]
H A Dpinctrl-mvebu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
24 #include "pinctrl-mvebu.h"
59 unsigned int pid, unsigned long *config) in mvebu_mmio_mpp_ctrl_get() argument
64 *config = (readl(data->base + off) >> shift) & MVEBU_MPP_MASK; in mvebu_mmio_mpp_ctrl_get()
70 unsigned int pid, unsigned long config) in mvebu_mmio_mpp_ctrl_set() argument
76 reg = readl(data->base + off) & ~(MVEBU_MPP_MASK << shift); in mvebu_mmio_mpp_ctrl_set()
77 writel(reg | (config << shift), data->base + off); in mvebu_mmio_mpp_ctrl_set()
86 for (n = 0; n < pctl->num_groups; n++) { in mvebu_pinctrl_find_group_by_pid()
87 if (pid >= pctl->groups[n].pins[0] && in mvebu_pinctrl_find_group_by_pid()
[all …]
/openbmc/linux/drivers/pinctrl/nuvoton/
H A Dpinctrl-npcm8xx.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/pinctrl/pinconf-generic.h>
123 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_set()
125 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_set()
133 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_clr()
135 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_clr()
143 ioread32(bank->base + NPCM8XX_GP_N_DIN), in npcmgpio_dbg_show()
144 ioread32(bank->base + NPCM8XX_GP_N_DOUT), in npcmgpio_dbg_show()
145 ioread32(bank->base + NPCM8XX_GP_N_IEM), in npcmgpio_dbg_show()
146 ioread32(bank->base + NPCM8XX_GP_N_OE)); in npcmgpio_dbg_show()
[all …]
H A Dpinctrl-npcm7xx.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2016-2018 Nuvoton Technology corporation.
21 #include <linux/pinctrl/pinconf-generic.h>
51 #define NPCM7XX_GP_N_PU 0x1c /* Pull-up */
52 #define NPCM7XX_GP_N_PD 0x20 /* Pull-down */
110 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_set()
115 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_set()
124 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_clr()
129 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_clr()
136 seq_printf(s, "-- module %d [gpio%d - %d]\n", in npcmgpio_dbg_show()
[all …]
/openbmc/linux/sound/soc/codecs/
H A Dtlv320adcx140.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
41 "ti,gpo-config-1",
42 "ti,gpo-config-2",
43 "ti,gpo-config-3",
44 "ti,gpo-config-4",
163 /* Digital Volume control. From -100 to 27 dB in 0.5 dB steps */
164 static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10050, 50, 0);
166 /* ADC gain. From 0 to 42 dB in 1 dB steps */
169 /* DRE Level. From -12 dB to -66 dB in 1 dB steps */
[all …]
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu11_driver_if_sienna_cichlid.h53 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)
54 #define MAX_SMNCLK_DPM_LEVEL (NUM_SMNCLK_DPM_LEVELS - 1)
55 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)
56 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)
57 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)
58 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)
59 #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)
60 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)
61 #define MAX_PIXCLK_DPM_LEVEL (NUM_PIXCLK_DPM_LEVELS - 1)
62 #define MAX_PHYCLK_DPM_LEVEL (NUM_PHYCLK_DPM_LEVELS - 1)
[all …]
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-c200-v2.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Device Tree file for Ctera C200-V2
8 /dts-v1/;
10 #include "armada-370.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/leds/common.h>
18 compatible = "ctera,c200-v2", "marvell,armada370", "marvell,armada-370-xp";
22 stdout-path = "serial0:115200n8";
[all …]
H A Darmada-370-dlink-dns327l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for D-Link DNS-327L
12 /dts-v1/;
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include "armada-370.dtsi"
19 model = "D-Link DNS-327L";
22 "marvell,armada-370-xp";
25 stdout-path = &uart0;
38 internal-regs {
[all …]
H A Ddove.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/interrupt-controller/irq.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
12 interrupt-parent = <&intc>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "marvell,pj4a", "marvell,sheeva-v7";
27 next-level-cache = <&l2>;
[all …]
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
35 marvell,function = "gpo";
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
[all …]
/openbmc/linux/drivers/hid/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 config HID
22 most commonly used to refer to the USB-HID specification, but other
27 removed from the HID bus by the transport-layer drivers, such as
36 config HID_BATTERY_STRENGTH
45 config HIDRAW
58 to work on raw hid events when they want to, and avoid using transport-specific
63 config UHID
64 tristate "User-space I/O driver support for HID subsystem"
67 Say Y here if you want to provide HID I/O Drivers from user-space.
[all …]
/openbmc/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dsubr.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * Copyright (c) 2003 - 2005 Chelsio Communications, Inc. *
40 * t1_wait_op_done - wait until an operation is completed
43 * @mask: a single-bit field within @reg that indicates completion
49 * up to @attempts times. Returns %0 if the operation completes and %1
55 while (1) { in t1_wait_op_done()
56 u32 val = readl(adapter->regs + reg) & mask; in t1_wait_op_done()
60 if (--attempts == 0) in t1_wait_op_done()
61 return 1; in t1_wait_op_done()
76 writel(addr, adapter->regs + A_TPI_ADDR); in __t1_tpi_write()
[all …]
/openbmc/linux/drivers/media/usb/em28xx/
H A Dem28xx-reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * em28xx-reg.h - Register definitions for em28xx driver
8 #define EM_GPIO_1 ((unsigned char)BIT(1))
17 #define EM_GPO_1 ((unsigned char)BIT(1))
47 #define EM28XX_CHIPCFG2_TS_REQ_INTERVAL_MASK 0x0c /* bits 3-2 */
52 #define EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK 0x03 /* bits 0-1 */
58 /* GPIO/GPO registers */
59 #define EM2880_R04_GPO 0x04 /* em2880-em2883 only */
60 #define EM2820_R08_GPIO_CTRL 0x08 /* em2820-em2873/83 only */
61 #define EM2820_R09_GPIO_STATE 0x09 /* em2820-em2873/83 only */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dkirkwood-synology.dtsi1 // SPDX-License-Identifier: GPL-2.0
12 pinctrl: pin-controller@10000 {
13 pmx_alarmled_12: pmx-alarmled-12 {
18 pmx_fanctrl_15: pmx-fanctrl-15 {
23 pmx_fanctrl_16: pmx-fanctrl-16 {
28 pmx_fanctrl_17: pmx-fanctrl-17 {
33 pmx_fanalarm_18: pmx-fanalarm-18 {
35 marvell,function = "gpo";
38 pmx_hddled_20: pmx-hddled-20 {
43 pmx_hddled_21: pmx-hddled-21 {
[all …]
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Ds3c64xx-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
12 #include "s3c64xx-pinctrl.h"
19 gpa: gpa-gpio-bank {
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
23 #interrupt-cells = <2>;
26 gpb: gpb-gpio-bank {
[all …]
/openbmc/linux/drivers/mfd/
H A Dtwl6040.c1 // SPDX-License-Identifier: GPL-2.0-only
27 #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
79 TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
101 ret = regmap_read(twl6040->regmap, reg, &val); in twl6040_reg_read()
113 ret = regmap_write(twl6040->regmap, reg, val); in twl6040_reg_write()
121 return regmap_update_bits(twl6040->regmap, reg, mask, mask); in twl6040_set_bits()
127 return regmap_update_bits(twl6040->regmap, reg, mask, 0); in twl6040_clear_bits()
131 /* twl6040 codec manual power-up sequence */
137 /* enable high-side LDO, reference system and internal oscillator */ in twl6040_power_up_manual()
151 /* enable low-side LDO */ in twl6040_power_up_manual()
[all …]
/openbmc/linux/arch/arm/mach-s3c/
H A Dgpio-samsung.c1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
11 // Samsung - GPIOlib support
31 #include "regs-gpio.h"
32 #include "gpio-samsung.h"
35 #include "gpio-core.h"
36 #include "gpio-cfg.h"
37 #include "gpio-cfg-helpers.h"
43 void __iomem *reg = chip->base + 0x08; in samsung_gpio_setpull_updown()
58 void __iomem *reg = chip->base + 0x08; in samsung_gpio_getpull_updown()
[all …]

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