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/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-platform-intel-pmc6 The file exposes "Extended Test Mode Register 3" global
7 reset bits. The bits are used during an Intel platform
8 manufacturing process to indicate that consequent reset
9 of the platform is a "global reset". This type of reset
13 Display global reset setting bits for PMC.
15 * bit 31 - global reset is locked
16 * bit 20 - global reset is set
19 a platform "global reset" upon consequent platform reset,
21 The "global reset bit" should be locked on a production
22 system and the file is in read-only mode.
/openbmc/linux/Documentation/devicetree/bindings/reset/
H A Dqcom,pdc-global.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PDC Global
10 - Sibi Sankar <quic_sibis@quicinc.com>
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
19 - description: on SC7180 SoCs the following compatibles must be specified
21 - const: "qcom,sc7180-pdc-global"
22 - const: "qcom,sdm845-pdc-global"
[all …]
H A Dintel,rcu-gw.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/intel,rcu-gw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: System Reset Controller on Intel Gateway SoCs
10 - Dilip Kota <eswara.kota@linux.intel.com>
15 - intel,rcu-lgm
16 - intel,rcu-xrx200
19 description: Reset controller registers.
22 intel,global-reset:
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/
H A Dguts.txt1 * Global Utilities Block
3 The global utilities block controls power management, I/O device
4 enabling, power-on-reset configuration monitoring, general-purpose
10 - compatible : Should define the compatible device type for
11 global-utilities.
13 "fsl,qoriq-device-config-1.0"
14 "fsl,qoriq-device-config-2.0"
15 "fsl,<chip>-device-config"
16 "fsl,<chip>-guts"
17 - reg : Offset and length of the register set for the device.
[all …]
/openbmc/u-boot/arch/mips/mach-mscc/
H A Dreset.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
25 /* Reset CPU only - still executing _here_. but from cache */ in _machine_restart()
33 /* Prevent VCore-III from being reset with a global reset */ in _machine_restart()
36 /* Do global reset */ in _machine_restart()
42 /* Power down DDR for clean DDR re-training */ in _machine_restart()
51 /* Reset VCore-III, only. */ in _machine_restart()
57 /* Make sure VCore is NOT protected from reset */ in _machine_restart()
60 /* Change to SPI bitbang for SPI reset workaround... */ in _machine_restart()
64 /* Do the global reset */ in _machine_restart()
/openbmc/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/
H A Dhw_atl_llh.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2014-2019 aQuantia Corporation
5 * Copyright (C) 2019-2020 Marvell International Ltd.
19 /* set temperature sense reset */
37 /* global */
39 /* set global microprocessor semaphore */
43 /* get global microprocessor semaphore */
46 /* set global register reset disable */
49 /* set soft reset */
52 /* get soft reset */
[all …]
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dselftest_hangcheck.c1 // SPDX-License-Identifier: MIT
47 h->gt = gt; in hang_init()
49 h->ctx = kernel_context(gt->i915, NULL); in hang_init()
50 if (IS_ERR(h->ctx)) in hang_init()
51 return PTR_ERR(h->ctx); in hang_init()
53 GEM_BUG_ON(i915_gem_context_is_bannable(h->ctx)); in hang_init()
55 h->hws = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
56 if (IS_ERR(h->hws)) { in hang_init()
57 err = PTR_ERR(h->hws); in hang_init()
61 h->obj = i915_gem_object_create_internal(gt->i915, PAGE_SIZE); in hang_init()
[all …]
H A Dintel_reset_types.h1 /* SPDX-License-Identifier: MIT */
15 * flags: Control various stages of the GPU reset
17 * #I915_RESET_BACKOFF - When we start a global reset, we need to
19 * any global resources that may be clobber by the reset (such as
22 * #I915_RESET_ENGINE[num_engines] - Since the driver doesn't need to
23 * acquire the struct_mutex to reset an engine, we need an explicit
24 * flag to prevent two concurrent reset attempts in the same engine.
28 * #I915_WEDGED - If reset fails and we can no longer use the GPU,
31 * aborted (with -EIO reported to userspace) if set.
33 * #I915_WEDGED_ON_INIT - If we fail to initialize the GPU we can no
[all …]
/openbmc/webui-vue/src/components/AppNavigation/
H A DAppNavigationMixin.js1 import IconDashboard from '@carbon/icons-vue/es/dashboard/16';
2 import IconTextLinkAnalysis from '@carbon/icons-vue/es/text-link--analysis/16';
3 import IconDataCheck from '@carbon/icons-vue/es/data--check/16';
4 import IconSettingsAdjust from '@carbon/icons-vue/es/settings--adjust/16';
5 import IconSettings from '@carbon/icons-vue/es/settings/16';
6 import IconSecurity from '@carbon/icons-vue/es/security/16';
7 import IconChevronUp from '@carbon/icons-vue/es/chevron--up/16';
8 import IconDataBase from '@carbon/icons-vue/es/data--base--alt/16';
33 label: i18n.global.t('appNavigation.overview'),
39 label: i18n.global.t('appNavigation.logs'),
[all …]
/openbmc/webui-vue/src/env/components/AppNavigation/
H A Dibm.js1 import IconDashboard from '@carbon/icons-vue/es/dashboard/16';
2 import IconTextLinkAnalysis from '@carbon/icons-vue/es/text-link--analysis/16';
3 import IconDataCheck from '@carbon/icons-vue/es/data--check/16';
4 import IconSettingsAdjust from '@carbon/icons-vue/es/settings--adjust/16';
5 import IconSettings from '@carbon/icons-vue/es/settings/16';
6 import IconSecurity from '@carbon/icons-vue/es/security/16';
7 import IconChevronUp from '@carbon/icons-vue/es/chevron--up/16';
8 import IconDataBase from '@carbon/icons-vue/es/data--base--alt/16';
27 label: i18n.global.t('appNavigation.overview'),
33 label: i18n.global.t('appNavigation.logs'),
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-stih407-usb.txt7 - compatible : should be "st,stih407-usb2-phy"
8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe…
9 - resets : list of phandle and reset specifier pairs. There should be two entries, one
11 - reset-names : list of reset signal names. Should be "global" and "port"
12 See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
13 See: Documentation/devicetree/bindings/reset/reset.txt
18 compatible = "st,stih407-usb2-phy";
19 #phy-cells = <0>;
23 reset-names = "global", "port";
/openbmc/u-boot/doc/device-tree-bindings/phy/
H A Dphy-stih407-usb.txt7 - compatible : should be "st,stih407-usb2-phy"
8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe…
9 - resets : list of phandle and reset specifier pairs. There should be two entries, one
11 - reset-names : list of reset signal names. Should be "global" and "port"
12 See: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt
13 See: Documentation/devicetree/bindings/reset/reset.txt
18 compatible = "st,stih407-usb2-phy";
19 #phy-cells = <0>;
23 reset-names = "global", "port";
/openbmc/u-boot/drivers/phy/
H A Dsti_usb_phy.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
13 #include <generic-phy.h>
16 #include <reset-uclass.h>
47 ret = reset_deassert(&phy->global_ctl); in sti_usb_phy_deassert()
49 pr_err("PHY global deassert failed: %d", ret); in sti_usb_phy_deassert()
53 ret = reset_deassert(&phy->port_ctl); in sti_usb_phy_deassert()
62 struct udevice *dev = usb_phy->dev; in sti_usb_phy_init()
67 reg = (void __iomem *)phy->regmap->ranges[0].start + phy->ctrl; in sti_usb_phy_init()
72 reg = (void __iomem *)phy->regmap->ranges[0].start + phy->param; in sti_usb_phy_init()
[all …]
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dlowlevel_init.S1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * SoC-specific setup info
15 /* get address for global reset register */
18 /* force reset */
28 ldr r1, rstctl @ get addr for global reset
32 str r3, [r1] @ force reset
/openbmc/webui-vue/src/views/Operations/FactoryReset/
H A DFactoryResetModal.vue2 <b-modal
3 id="modal-reset"
6 title-tag="h2"
9 <p class="mb-2">
12 <ul v-if="resetType == 'resetBios'" class="pl-3 mb-4">
13 <li class="mt-1 mb-1">
16 <li class="mt-1 mb-1">
20 <ul v-else-if="resetType == 'resetToDefaults'" class="pl-3 mb-4">
21 <li class="mt-1 mb-1">
24 <li class="mt-1 mb-1">
[all …]
/openbmc/openbmc-test-automation/data/
H A Dboot_table_x86.json37 "method": "Run External IPMI Standard Command power on -N 10 -R 1",
92 "method": "Run External IPMI Standard Command power off -N 10 -R 1",
110 "method": "Run External IPMI Standard Command power soft -N 10 -R 1",
155 …"method": "Set Global Variable ${PDU_TYPE} pdu ; Set Global Variable ${PDU_IP} ${PDU_HOST} ; P…
198 "method": "Redfish BMC Reset Operation",
227 "method": "Redfish BMC Reset Operation",
249 …"method": "Set Global Variable ${PDU_TYPE} pdu ; Set Global Variable ${PDU_IP} ${PDU_HOST} ; P…
264 …"method": "Set Global Variable ${PDU_TYPE} pdu ; Set Global Variable ${PDU_IP} ${PDU_HOST} ; P…
267 "IPMI MC Reset Warm (run)": {
286 "method": "Run External IPMI Standard Command mc reset warm -N 10 -R 1 ; Printn",
[all …]
/openbmc/u-boot/arch/x86/cpu/ivybridge/
H A Dearly_me.c1 // SPDX-License-Identifier: GPL-2.0
21 [ME_HFS_ACK_RESET] = "Non-power cycle reset",
22 [ME_HFS_ACK_PWR_CYCLE] = "Power cycle reset",
26 [ME_HFS_ACK_GBL_RESET] = "Global Reset",
39 for (count = ME_RETRY; count > 0; --count) { in intel_early_me_init()
47 return -EBUSY; in intel_early_me_init()
54 return -EBADF; in intel_early_me_init()
73 return -EINVAL; in intel_early_me_uma_size()
82 /* Clear CF9 Without Resume Well Reset Enable */ in set_global_reset()
85 /* CF9GR indicates a Global Reset */ in set_global_reset()
[all …]
/openbmc/linux/drivers/phy/st/
H A Dphy-stih407-usb.c1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/reset.h>
44 reset_control_deassert(phy_dev->rstc); in stih407_usb2_pico_ctrl()
46 return regmap_update_bits(phy_dev->regmap, phy_dev->ctrl, in stih407_usb2_pico_ctrl()
58 ret = regmap_update_bits(phy_dev->regmap, in stih407_usb2_init_port()
59 phy_dev->param, in stih407_usb2_init_port()
65 return reset_control_deassert(phy_dev->rstport); in stih407_usb2_init_port()
73 * Only port reset is asserted, phy global reset is kept untouched in stih407_usb2_exit_port()
74 * as other ports may still be active. When all ports are in reset in stih407_usb2_exit_port()
77 * reset (like here) or global reset should be equivalent. in stih407_usb2_exit_port()
[all …]
/openbmc/webui-vue/src/router/
H A Droutes.js52 title: i18n.global.t('appPageTitle.login'),
56 path: '/change-password',
57 name: 'change-password',
60 title: i18n.global.t('appPageTitle.changePassword'),
74 path: 'serial-over-lan-console',
75 name: 'serial-over-lan-console',
78 title: i18n.global.t('appPageTitle.serialOverLan'),
83 name: 'kvm-console',
86 title: i18n.global.t('appPageTitle.kvm'),
103 title: i18n.global.t('appPageTitle.overview'),
[all …]
/openbmc/webui-vue/src/components/Global/
H A DTableDateFilter.vue2 <b-row class="mb-2">
3 <b-col class="d-sm-flex">
4 <b-form-group
5 :label="$t('global.table.fromDate')"
6 label-for="input-from-date"
7 class="mr-3 my-0 w-100"
9 <b-input-group>
10 <b-form-input
11 id="input-from-date"
12 v-model="fromDate"
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Common Properties
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
14 Common bindings for Qualcomm global clock control module providing the
18 '#clock-cells':
21 '#reset-cells':
24 '#power-domain-cells':
[all …]
H A Dqcom,mmcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Multimedia Clock & Reset Controller
10 - Jeffrey Hugo <quic_jhugo@quicinc.com>
11 - Taniya Das <quic_tdas@quicinc.com>
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8226
23 - qcom,mmcc-msm8660
[all …]
H A Dqcom,gcc-msm8916.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller on MSM8916 and MSM8939
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
14 Qualcomm global clock control module provides the clocks, resets and power
18 include/dt-bindings/clock/qcom,gcc-msm8916.h
19 include/dt-bindings/clock/qcom,gcc-msm8939.h
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/imx/
H A Dfsl,imx93-src.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX93 System Reset Controller
10 - Peng Fan <peng.fan@nxp.com>
13 The System Reset Controller (SRC) is responsible for the generation of
14 all the system reset signals and boot argument latching.
17 - Deals with all global system reset sources from other modules,
18 and generates global system reset.
[all …]
/openbmc/linux/drivers/clk/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
104 tristate "APQ8084 Global Clock Controller"
108 Support for the global clock controller on apq8084 devices.
143 tristate "IPQ4019 Global Clock Controller"
145 Support for the global clock controller on ipq4019 devices.
150 tristate "IPQ5018 Global Clock Controller"
153 Support for global clock controller on ipq5018 devices.
158 tristate "IPQ5332 Global Clock Controller"
161 Support for the global clock controller on ipq5332 devices.
166 tristate "IPQ6018 Global Clock Controller"
[all …]

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