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/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dgeneric-xhci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-xhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB xHCI Controller
10 - Mathias Nyman <mathias.nyman@intel.com>
13 - $ref: usb-xhci.yaml#
18 - description: Generic xHCI device
19 const: generic-xhci
20 - description: Armada 37xx/375/38x/8k SoCs
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H A Dusb-xhci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-xhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic USB xHCI Controller
10 - Mathias Nyman <mathias.nyman@intel.com>
13 - $ref: usb-hcd.yaml#
16 usb2-lpm-disable:
20 usb3-lpm-capable:
24 quirk-broken-port-ped:
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/openbmc/u-boot/doc/device-tree-bindings/usb/
H A Dmarvell.xhci-usb.txt4 It uses the same properties as a generic XHCI host controller
7 - compatible: should be one or more of:
8 - "marvell,armada3700-xhci", "generic-xhci" for Armada 37xx SoCs
9 - "marvell,armada-8k-xhci", "generic-xhci" for Armada A8K SoCs
10 - reg: should contain address and length of the standard XHCI
12 - interrupts: one XHCI interrupt should be described here.
15 - clocks: phandle to system controller clock driving this unit
16 - vbus-supply : If present, specifies the fixed regulator to be turned on
21 compatible = "marvell,armada-8k-xhci",
22 "generic-xhci";
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/openbmc/linux/drivers/usb/host/
H A Dxhci-dbgcap.c1 // SPDX-License-Identifier: GPL-2.0
3 * xhci-dbgcap.c - xHCI debug capability support
9 #include <linux/dma-mapping.h>
13 #include "xhci.h"
14 #include "xhci-trace.h"
15 #include "xhci-dbgcap.h"
21 dma_free_coherent(dev, ctx->size, ctx->bytes, ctx->dma); in dbc_free_ctx()
31 if (ring->first_seg && ring->first_seg->trbs) { in dbc_ring_free()
33 ring->first_seg->trbs, in dbc_ring_free()
34 ring->first_seg->dma); in dbc_ring_free()
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H A Dxhci-ring.c1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
26 * until you reach a non-link TRB.
57 #include <linux/dma-mapping.h>
58 #include "xhci.h"
59 #include "xhci-trace.h"
61 static int queue_command(struct xhci_hcd *xhci, struct xhci_command *cmd,
74 if (!seg || !trb || trb < seg->trbs) in xhci_trb_virt_to_dma()
77 segment_offset = trb - seg->trbs; in xhci_trb_virt_to_dma()
80 return seg->dma + (segment_offset * sizeof(*trb)); in xhci_trb_virt_to_dma()
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
11 The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role
21 tristate "xHCI HCD (USB 3.0) support"
24 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
28 module will be called xhci-hcd.
32 bool "xHCI support for debug capability"
35 Say 'Y' to enable the support for the xHCI debug capability. Make
36 sure that your xHCI host supports the extended debug capability and
37 you want a TTY serial device based on the xHCI debug capability
47 tristate "Support for additional Renesas xHCI controller with firmware"
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H A Dxhci-debugfs.c1 // SPDX-License-Identifier: GPL-2.0
3 * xhci-debugfs.c - xHCI debugfs interface
13 #include "xhci.h"
14 #include "xhci-debugfs.h"
86 static struct xhci_regset *xhci_debugfs_alloc_regset(struct xhci_hcd *xhci) in xhci_debugfs_alloc_regset() argument
98 INIT_LIST_HEAD(&regset->list); in xhci_debugfs_alloc_regset()
99 list_add_tail(&regset->list, &xhci->regset_list); in xhci_debugfs_alloc_regset()
109 list_del(&regset->list); in xhci_debugfs_free_regset()
114 static void xhci_debugfs_regset(struct xhci_hcd *xhci, u32 base, in xhci_debugfs_regset() argument
122 struct usb_hcd *hcd = xhci_to_hcd(xhci); in xhci_debugfs_regset()
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H A Dxhci-plat.c1 // SPDX-License-Identifier: GPL-2.0
3 * xhci-plat.c - xHCI host controller driver platform Bus Glue.
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com
8 * A lot of code borrowed from the Linux xHCI driver.
12 #include <linux/dma-mapping.h>
24 #include "xhci.h"
25 #include "xhci-plat.h"
26 #include "xhci-mvebu.h"
43 if (priv->plat_start) in xhci_priv_plat_start()
44 priv->plat_start(hcd); in xhci_priv_plat_start()
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H A Dxhci.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * xHCI host controller driver
19 #include <linux/io-64-nonatomic-lo-hi.h>
20 #include <linux/io-64-nonatomic-hi-lo.h>
22 /* Code sharing between pci-quirks and xhci hcd */
23 #include "xhci-ext-caps.h"
24 #include "pci-quirks.h"
26 #include "xhci-port.h"
27 #include "xhci-caps.h"
32 /* xHCI PCI Configuration Registers */
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H A Dxhci-mem.c1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
16 #include <linux/dma-mapping.h>
18 #include "xhci.h"
19 #include "xhci-trace.h"
20 #include "xhci-debugfs.h"
23 * Allocates a generic ring segment from the ring pool, sets the dma address,
29 static struct xhci_segment *xhci_segment_alloc(struct xhci_hcd *xhci, in xhci_segment_alloc() argument
37 struct device *dev = xhci_to_hcd(xhci)->self.sysdev; in xhci_segment_alloc()
43 seg->trbs = dma_pool_zalloc(xhci->segment_pool, flags, &dma); in xhci_segment_alloc()
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H A Dxhci.c1 // SPDX-License-Identifier: GPL-2.0
3 * xHCI host controller driver
20 #include <linux/dma-mapping.h>
22 #include "xhci.h"
23 #include "xhci-trace.h"
24 #include "xhci-debugfs.h"
25 #include "xhci-dbgcap.h"
43 struct xhci_segment *seg = ring->first_seg; in td_on_ring()
45 if (!td || !td->start_seg) in td_on_ring()
48 if (seg == td->start_seg) in td_on_ring()
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/openbmc/u-boot/drivers/usb/host/
H A DKconfig10 bool "xHCI HCD (USB 3.0) support"
12 ---help---
13 The eXtensible Host Controller Interface (xHCI) is standard for USB 3.0
25 bool "DesignWare USB3 DRD Generic OF Simple Glue Layer"
43 bool "Support for PCI-based xHCI USB controller"
47 Enables support for the PCI-based xHCI controller.
50 bool "Support for Rockchip on-chip xHCI USB controller"
56 Enables support for the on-chip xHCI controller on Rockchip SoCs.
67 bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
71 Enables support for the on-chip xHCI controller on STMicroelectronics
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0+
3 # (C) Copyright 2000-2007
7 obj-y += usb-uclass.o
8 obj-$(CONFIG_SANDBOX) += usb-sandbox.o
12 obj-$(CONFIG_USB_OHCI_NEW) += ohci-hcd.o
13 obj-$(CONFIG_USB_ATMEL) += ohci-at91.o
14 obj-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
15 obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
16 obj-$(CONFIG_USB_SL811HS) += sl811-hcd.o
17 obj-$(CONFIG_USB_OHCI_EP93XX) += ohci-ep93xx.o
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H A Dxhci-ring.c1 // SPDX-License-Identifier: GPL-2.0+
3 * USB HOST XHCI Controller stack
5 * Based on xHCI host controller driver in linux-kernel
22 #include "xhci.h"
38 if (ring == ctrl->event_ring) in last_trb()
39 return trb == &seg->trbs[TRBS_PER_SEGMENT]; in last_trb()
41 return TRB_TYPE_LINK_LE32(trb->link.control); in last_trb()
59 if (ring == ctrl->event_ring) in last_trb_on_last_seg()
60 return ((trb == &seg->trbs[TRBS_PER_SEGMENT]) && in last_trb_on_last_seg()
61 (seg->next == ring->first_seg)); in last_trb_on_last_seg()
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H A Dxhci-zynqmp.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Zynq USB HOST xHCI Controller
9 * This file was reused from Freescale USB xHCI
19 #include "xhci.h"
22 /* Default to the ZYNQMP XHCI defines */
72 ret = dwc3_core_init(zynqmp_xhci->dwc3_reg); in zynqmp_xhci_core_init()
78 /* We are hard-coding DWC3 core to Host Mode */ in zynqmp_xhci_core_init()
79 dwc3_set_mode(zynqmp_xhci->dwc3_reg, DWC3_GCTL_PRTCAP_HOST); in zynqmp_xhci_core_init()
101 ctx->hcd = (struct xhci_hccr *)plat->hcd_base; in xhci_usb_probe()
102 ctx->dwc3_reg = (struct dwc3 *)((char *)(ctx->hcd) + DWC3_REG_OFFSET); in xhci_usb_probe()
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H A Dxhci-dwc3.c1 // SPDX-License-Identifier: GPL-2.0+
13 #include <generic-phy.h>
15 #include <dwc3-uboot.h>
17 #include "xhci.h"
29 clrsetbits_le32(&dwc3_reg->g_ctl, in dwc3_set_mode()
37 setbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); in dwc3_phy_reset()
40 setbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); in dwc3_phy_reset()
45 clrbits_le32(&dwc3_reg->g_usb3pipectl[0], DWC3_GUSB3PIPECTL_PHYSOFTRST); in dwc3_phy_reset()
48 clrbits_le32(&dwc3_reg->g_usb2phycfg, DWC3_GUSB2PHYCFG_PHYSOFTRST); in dwc3_phy_reset()
54 setbits_le32(&dwc3_reg->g_ctl, DWC3_GCTL_CORESOFTRESET); in dwc3_core_soft_reset()
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/openbmc/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray-usb.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
6 compatible = "simple-bus";
7 #address-cells = <2>;
8 #size-cells = <2>;
13 * to 40-bit
15 dma-ranges = <0 0 0 0 0x100 0x0>;
17 usbphy0: usb-phy@0 {
18 compatible = "brcm,sr-usb-combo-phy";
20 #phy-cells = <1>;
25 compatible = "generic-xhci";
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/openbmc/qemu/docs/system/arm/
H A Dsbsa.rst1 Arm Server Base System Architecture Reference board (``sbsa-ref``)
4 The ``sbsa-ref`` board intends to look like real hardware (while the ``virt``
5 board is a generic board platform that doesn't match any real hardware).
9 - `Base System Architecture <https://developer.arm.com/documentation/den0094/>`__ (BSA)
10 - `Server Base System Architecture <https://developer.arm.com/documentation/den0029/>`__ (SBSA)
21 The ``sbsa-ref`` board supports:
23 - A configurable number of AArch64 CPUs
24 - GIC version 3
25 - System bus AHCI controller
26 - System bus XHCI controller
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/openbmc/u-boot/doc/driver-model/
H A Dusb-info.txt5 ------------
9 understand how things work with USB in U-Boot when driver model is enabled.
13 -----------------------------
21 Support for EHCI and XHCI
22 -------------------------
24 So far OHCI is not supported. Both EHCI and XHCI drivers should be declared
28 { .compatible = "nvidia,tegra20-ehci", .data = USB_CTLR_T20 },
29 { .compatible = "nvidia,tegra30-ehci", .data = USB_CTLR_T30 },
30 { .compatible = "nvidia,tegra114-ehci", .data = USB_CTLR_T114 },
54 most cases, since they are all EHCI-compatible. For EHCI there are also some
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/openbmc/qemu/docs/
H A Dmultiseat.txt6 ------------
12 ./configure --enable-sdl
16 ./configure --enable-gtk
21 qemu -accel kvm -usb $memory $disk $whatever \
22 -display [ sdl | gtk ] \
23 -vga std \
24 -device usb-tablet
27 standard ps/2 keyboard (implicitly there) and the usb-tablet. Now the
30 -device pci-bridge,addr=12.0,chassis_nr=2,id=head.2 \
31 -device secondary-vga,bus=head.2,addr=02.0,id=video.2 \
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/openbmc/u-boot/arch/arm/dts/
H A Darmada-cp110-slave.dtsi4 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/comphy/comphy_data.h>
50 cp110-slave {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 compatible = "simple-bus";
54 interrupt-parent = <&gic>;
57 config-space {
58 #address-cells = <1>;
59 #size-cells = <1>;
[all …]
H A Darmada-cp110-master.dtsi4 * This file is dual-licensed: you can use it either under the terms
47 #include <dt-bindings/comphy/comphy_data.h>
50 cp110-master {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 compatible = "simple-bus";
54 interrupt-parent = <&gic>;
57 config-space {
58 #address-cells = <1>;
59 #size-cells = <1>;
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/openbmc/qemu/tests/qtest/fuzz/
H A Dgeneric_fuzz_configs.h2 * Generic Virtual-Device Fuzzing Target Configs
10 * See the COPYING file in the top-level directory.
23 g_autofree char *tmpdir = g_dir_make_tmp("qemu-fuzz.XXXXXX", NULL); in generic_fuzzer_virtio_9p_args()
26 return g_strdup_printf("-machine q35 -nodefaults " in generic_fuzzer_virtio_9p_args()
27 "-device virtio-9p,fsdev=hshare,mount_tag=hshare " in generic_fuzzer_virtio_9p_args()
28 "-fsdev local,id=hshare,path=%s,security_model=mapped-xattr," in generic_fuzzer_virtio_9p_args()
34 .name = "virtio-net-pci-slirp",
35 .args = "-M q35 -nodefaults "
36 "-device virtio-net,netdev=net0 -netdev user,id=net0",
39 .name = "virtio-blk",
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/openbmc/openbmc/poky/meta/conf/machine/include/riscv/
H A Dqemuriscv.inc1 PREFERRED_PROVIDER_virtual/bootloader ?= "u-boot"
4 require conf/machine/include/riscv/tune-riscv.inc
18 MACHINE_EXTRA_RRECOMMENDS += " kernel-modules"
21 RISCV_SBI_PLAT ?= "generic"
22 RISCV_SBI_PAYLOAD ?= "${KERNEL_IMAGETYPE}-${MACHINE}.bin"
28 QB_SMP ?= "-smp 4"
30 QB_MACHINE = "-machine virt"
32 QB_TAP_OPT = "-netdev tap,id=net0,ifname=@TAP@,script=no,downscript=no"
33 QB_NETWORK_DEVICE = "-device virtio-net-device,netdev=net0,mac=@MAC@"
34 QB_ROOTFS_OPT = "-drive id=disk0,file=@ROOTFS@,if=none,format=raw -device virtio-blk-device,drive=d…
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/openbmc/qemu/hw/i386/
H A Dmicrovm-dt.c19 * ----------------------------------------------------------------------
37 #include "hw/char/serial-isa.h"
41 #include "hw/virtio/virtio-mmio.h"
42 #include "hw/usb/xhci.h"
44 #include "microvm-dt.h"
54 irq -= IO_APIC_SECONDARY_IRQBASE; in dt_add_microvm_irq()
58 qemu_fdt_setprop_cell(mms->fdt, nodename, "interrupt-parent", in dt_add_microvm_irq()
59 mms->ioapic_phandle[index]); in dt_add_microvm_irq()
60 qemu_fdt_setprop_cells(mms->fdt, nodename, "interrupts", irq, 0); in dt_add_microvm_irq()
66 VirtioBusState *mmio_virtio_bus = &mmio->bus; in dt_add_virtio()
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