Lines Matching +full:generic +full:- +full:xhci
19 * ----------------------------------------------------------------------
37 #include "hw/char/serial-isa.h"
41 #include "hw/virtio/virtio-mmio.h"
42 #include "hw/usb/xhci.h"
44 #include "microvm-dt.h"
54 irq -= IO_APIC_SECONDARY_IRQBASE; in dt_add_microvm_irq()
58 qemu_fdt_setprop_cell(mms->fdt, nodename, "interrupt-parent", in dt_add_microvm_irq()
59 mms->ioapic_phandle[index]); in dt_add_microvm_irq()
60 qemu_fdt_setprop_cells(mms->fdt, nodename, "interrupts", irq, 0); in dt_add_microvm_irq()
66 VirtioBusState *mmio_virtio_bus = &mmio->bus; in dt_add_virtio()
67 BusState *mmio_bus = &mmio_virtio_bus->parent_obj; in dt_add_virtio()
70 if (QTAILQ_EMPTY(&mmio_bus->children)) { in dt_add_virtio()
74 hwaddr base = dev->mmio[0].addr; in dt_add_virtio()
76 unsigned index = (base - VIRTIO_MMIO_BASE) / size; in dt_add_virtio()
77 uint32_t irq = mms->virtio_irq_base + index; in dt_add_virtio()
80 qemu_fdt_add_subnode(mms->fdt, nodename); in dt_add_virtio()
81 qemu_fdt_setprop_string(mms->fdt, nodename, "compatible", "virtio,mmio"); in dt_add_virtio()
82 qemu_fdt_setprop_sized_cells(mms->fdt, nodename, "reg", 2, base, 2, size); in dt_add_virtio()
83 qemu_fdt_setprop(mms->fdt, nodename, "dma-coherent", NULL, 0); in dt_add_virtio()
90 const char compat[] = "generic-xhci"; in dt_add_xhci()
97 qemu_fdt_add_subnode(mms->fdt, nodename); in dt_add_xhci()
98 qemu_fdt_setprop(mms->fdt, nodename, "compatible", compat, sizeof(compat)); in dt_add_xhci()
99 qemu_fdt_setprop_sized_cells(mms->fdt, nodename, "reg", 2, base, 2, size); in dt_add_xhci()
100 qemu_fdt_setprop(mms->fdt, nodename, "dma-coherent", NULL, 0); in dt_add_xhci()
112 qemu_fdt_add_subnode(mms->fdt, nodename); in dt_add_pcie()
113 qemu_fdt_setprop_string(mms->fdt, nodename, in dt_add_pcie()
114 "compatible", "pci-host-ecam-generic"); in dt_add_pcie()
115 qemu_fdt_setprop_string(mms->fdt, nodename, "device_type", "pci"); in dt_add_pcie()
116 qemu_fdt_setprop_cell(mms->fdt, nodename, "#address-cells", 3); in dt_add_pcie()
117 qemu_fdt_setprop_cell(mms->fdt, nodename, "#size-cells", 2); in dt_add_pcie()
118 qemu_fdt_setprop_cell(mms->fdt, nodename, "linux,pci-domain", 0); in dt_add_pcie()
119 qemu_fdt_setprop(mms->fdt, nodename, "dma-coherent", NULL, 0); in dt_add_pcie()
121 qemu_fdt_setprop_sized_cells(mms->fdt, nodename, "reg", in dt_add_pcie()
123 if (mms->gpex.mmio64.size) { in dt_add_pcie()
124 qemu_fdt_setprop_sized_cells(mms->fdt, nodename, "ranges", in dt_add_pcie()
127 2, mms->gpex.mmio32.base, in dt_add_pcie()
128 2, mms->gpex.mmio32.base, in dt_add_pcie()
129 2, mms->gpex.mmio32.size, in dt_add_pcie()
132 2, mms->gpex.mmio64.base, in dt_add_pcie()
133 2, mms->gpex.mmio64.base, in dt_add_pcie()
134 2, mms->gpex.mmio64.size); in dt_add_pcie()
136 qemu_fdt_setprop_sized_cells(mms->fdt, nodename, "ranges", in dt_add_pcie()
139 2, mms->gpex.mmio32.base, in dt_add_pcie()
140 2, mms->gpex.mmio32.base, in dt_add_pcie()
141 2, mms->gpex.mmio32.size); in dt_add_pcie()
145 qemu_fdt_setprop_cells(mms->fdt, nodename, "bus-range", 0, in dt_add_pcie()
146 nr_pcie_buses - 1); in dt_add_pcie()
153 hwaddr base = dev->mmio[0].addr; in dt_add_ioapic()
171 qemu_fdt_add_subnode(mms->fdt, nodename); in dt_add_ioapic()
172 qemu_fdt_setprop_string(mms->fdt, nodename, in dt_add_ioapic()
173 "compatible", "intel,ce4100-ioapic"); in dt_add_ioapic()
174 qemu_fdt_setprop(mms->fdt, nodename, "interrupt-controller", NULL, 0); in dt_add_ioapic()
175 qemu_fdt_setprop_cell(mms->fdt, nodename, "#interrupt-cells", 0x2); in dt_add_ioapic()
176 qemu_fdt_setprop_cell(mms->fdt, nodename, "#address-cells", 0x2); in dt_add_ioapic()
177 qemu_fdt_setprop_sized_cells(mms->fdt, nodename, "reg", in dt_add_ioapic()
180 ph = qemu_fdt_alloc_phandle(mms->fdt); in dt_add_ioapic()
181 qemu_fdt_setprop_cell(mms->fdt, nodename, "phandle", ph); in dt_add_ioapic()
182 qemu_fdt_setprop_cell(mms->fdt, nodename, "linux,phandle", ph); in dt_add_ioapic()
183 mms->ioapic_phandle[index] = ph; in dt_add_ioapic()
197 qemu_fdt_add_subnode(mms->fdt, nodename); in dt_add_isa_serial()
198 qemu_fdt_setprop(mms->fdt, nodename, "compatible", compat, sizeof(compat)); in dt_add_isa_serial()
199 qemu_fdt_setprop_sized_cells(mms->fdt, nodename, "reg", 2, base, 2, size); in dt_add_isa_serial()
203 qemu_fdt_setprop_string(mms->fdt, "/chosen", "stdout-path", nodename); in dt_add_isa_serial()
218 qemu_fdt_add_subnode(mms->fdt, nodename); in dt_add_isa_rtc()
219 qemu_fdt_setprop(mms->fdt, nodename, "compatible", compat, sizeof(compat)); in dt_add_isa_rtc()
220 qemu_fdt_setprop_sized_cells(mms->fdt, nodename, "reg", 2, base, 2, size); in dt_add_isa_rtc()
231 QTAILQ_FOREACH(kid, &bus->children, sibling) { in dt_setup_isa_bus()
232 DeviceState *dev = kid->child; in dt_setup_isa_bus()
263 QTAILQ_FOREACH(kid, &bus->children, sibling) { in dt_setup_sys_bus()
264 DeviceState *dev = kid->child; in dt_setup_sys_bus()
274 QTAILQ_FOREACH(kid, &bus->children, sibling) { in dt_setup_sys_bus()
275 DeviceState *dev = kid->child; in dt_setup_sys_bus()
284 /* xhci */ in dt_setup_sys_bus()
299 obj = object_dynamic_cast(OBJECT(dev), "isabus-bridge"); in dt_setup_sys_bus()
322 mms->fdt = create_device_tree(&size); in dt_setup_microvm()
325 qemu_fdt_setprop_string(mms->fdt, "/", "compatible", "linux,microvm"); in dt_setup_microvm()
326 qemu_fdt_setprop_cell(mms->fdt, "/", "#address-cells", 0x2); in dt_setup_microvm()
327 qemu_fdt_setprop_cell(mms->fdt, "/", "#size-cells", 0x2); in dt_setup_microvm()
329 qemu_fdt_add_subnode(mms->fdt, "/chosen"); in dt_setup_microvm()
336 fw_cfg_add_file(x86ms->fw_cfg, "etc/fdt", mms->fdt, size); in dt_setup_microvm()
340 if (!g_file_set_contents("microvm.fdt", mms->fdt, size, NULL)) { in dt_setup_microvm()
344 int ret = system("dtc -I dtb -O dts microvm.fdt"); in dt_setup_microvm()