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/openbmc/pldm/host-bmc/dbus/
H A Dpcie_device.hpp17 using Generations = sdbusplus::common::xyz::openbmc_project::inventory::item:: typedef
18 PCIeSlot::Generations;
44 Generations generationInUse() const override;
47 Generations generationInUse(Generations value) override;
H A Dpcie_device.cpp8 auto PCIeDevice::generationInUse() const -> Generations in generationInUse()
14 auto PCIeDevice::generationInUse(Generations value) -> Generations in generationInUse()
H A Dpcie_slot.cpp8 auto PCIeSlot::generation() const -> Generations in generation()
14 auto PCIeSlot::generation(Generations value) -> Generations in generation()
H A Dpcie_slot.hpp34 Generations generation() const override;
37 Generations generation(Generations value) override;
/openbmc/linux/Documentation/mm/
H A Dmultigen_lru.rst24 group of pages with similar access recency. Generations establish a
39 recency, are similar. With generations as a common frame of reference,
44 Again, with generations as a common frame of reference, this becomes
82 Evictable pages are divided into multiple generations for each
94 at most ``MAX_NR_GENS`` generations. The gen counter stores a value
100 generations, tiers do not have dedicated ``lrugen->folios[]``. In
101 contrast to moving across generations, which requires the LRU lock,
114 The aging produces young generations. Given an ``lruvec``, it
130 The eviction consumes old generations. Given an ``lruvec``, it
218 The PID controller uses generations rather than the wall clock as the
[all …]
/openbmc/openbmc/meta-ibm/meta-genesis3/recipes-phosphor/inventory/static-inventory/
H A Dstatic-inventory.yaml1158 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1178 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1198 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1218 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1238 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1258 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1278 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1298 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1318 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1338 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
[all …]
/openbmc/bmcweb/redfish-core/include/utils/
H A Dpcie_util.hpp110 "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen1") in redfishPcieGenerationFromDbus()
115 "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen2") in redfishPcieGenerationFromDbus()
120 "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3") in redfishPcieGenerationFromDbus()
125 "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen4") in redfishPcieGenerationFromDbus()
130 "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen5") in redfishPcieGenerationFromDbus()
136 "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Unknown") in redfishPcieGenerationFromDbus()
/openbmc/openbmc/meta-ibm/meta-sbp1/recipes-phosphor/inventory/static-inventory/
H A Dstatic-inventory.yaml1526 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1546 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1566 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1586 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1606 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1626 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1646 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1666 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1686 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
1706 value: "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"
[all …]
/openbmc/linux/Documentation/gpu/
H A Dtegra.rst15 The drm/tegra driver supports NVIDIA Tegra SoC generations since Tegra20. It
65 Tegra SoC generations, up until Tegra186 which introduces several changes that
100 The type and number of supported outputs varies between Tegra SoC generations.
101 All generations support at least HDMI. While earlier generations supported the
102 very simple RGB interfaces (one per display controller), recent generations no
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/Inventory/Item/
H A DPCIeSlot.interface.yaml7 type: enum[self.Generations]
29 - name: Generations
31 Possible PCIe generations
H A DPCIeDevice.interface.yaml12 type: enum[xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations]
17 type: enum[xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations]
/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Dxusb-padctl.h10 * The type of PHY varies between SoC generations. Typically there are XUSB,
11 * PCIe and SATA PHYs, though not all generations support all of them. The
/openbmc/linux/Documentation/driver-api/surface_aggregator/
H A Doverview.rst11 with the following generations.
39 on newer generations, less devices are declared in ACPI, making them a bit
51 5th and later generations, communication takes place via a USART serial
/openbmc/pldm/oem/ibm/libpldmresponder/
H A Dfile_io_type_pcie.cpp29 {0x00, "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen1"},
30 {0x01, "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen2"},
31 {0x02, "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen3"},
32 {0x03, "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen4"},
33 {0x04, "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Gen5"},
34 {0x10, "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Unknown"},
35 {0xFF, "xyz.openbmc_project.Inventory.Item.PCIeSlot.Generations.Unknown"}};
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra234-pinmux-common.yaml27 # for all chip generations. In this case, however, we want the per-SoC
29 # allowed, since not all pinmux generations support the same sets of
/openbmc/linux/fs/btrfs/
H A Dlru_cache.h22 * Entries with the same key and different generations are stored in a
24 * of different generations.
/openbmc/u-boot/drivers/pci/
H A DKconfig95 Enable support for the PCIe controller found on some generations of
106 which can be used on some generations of Xilinx FPGAs.
/openbmc/linux/Documentation/admin-guide/mm/
H A Dmultigen_lru.rst92 evicted generations in this file.
134 certain time interval to create new generations, and it ranks the
147 generations less than or equal to ``min_gen_nr``.
/openbmc/linux/Documentation/hwmon/
H A Dadm1021.rst149 Previous generations of the Xeon processor (based on Pentium II/III)
150 didn't have these sensors. Next generations of Xeon processors (533 MHz
/openbmc/linux/drivers/platform/x86/
H A Dapple-gmux.c385 * MacBook Pro generations, MBP5 2008/09 and MBP6 2010. This is done by an
389 * The following MacBook Pro generations replaced the external DP port with a
399 * interrupt on hotplug. On generations which cannot switch external ports,
401 * The ability to switch AUX on these generations could be used to improve
406 * Our switching policy for the external port is that on those generations
413 * On all newer generations, the external port can only be driven by the
614 * MBP5 2008/09 it's GPIO pin 22 of the Nvidia MCP79, on following generations
/openbmc/openbmc/poky/meta/recipes-core/busybox/files/
H A Dsyslog-startup.conf10 #ROTATEGENS=3 # keep X generations of rotated logs
/openbmc/linux/drivers/net/dsa/mv88e6xxx/
H A Ddevlink.c304 /* The ATU entry varies between mv88e6xxx chipset generations. Define
306 * mv88e6xxx generations
429 * The VTU entry format varies between chipset generations, the
513 * The STU entry format varies between chipset generations. Peridot
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dnvidia,tegra20-ictlr.txt14 Tegra generations later than Tegra30 the compatible value should
/openbmc/linux/arch/loongarch/include/asm/
H A Dxor.h53 * appropriate to revisit this after one or two more uarch generations.
/openbmc/linux/arch/openrisc/include/asm/
H A Delf.h56 For the moment, we have only optimizations for the Intel generations,

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