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/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,xsphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek XS-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The XS-PHY controller supports physical layer functionality for USB3.1
18 ----------------------------------
45 pattern: "^xs-phy@[0-9a-f]+$"
49 - enum:
50 - mediatek,mt3611-xsphy
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H A Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
67 pattern: "^t-phy(@[0-9a-f]+)?$"
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/openbmc/linux/drivers/phy/mediatek/
H A Dphy-mtk-xsphy.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <dt-bindings/phy/phy.h>
19 #include "phy-mtk-io.h"
94 /* u2 eye diagram */
112 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate()
118 if (inst->eye_src) in u2_phy_slew_rate_calibrate()
149 tmp = xsphy->src_ref_clk * xsphy->src_coef; in u2_phy_slew_rate_calibrate()
156 dev_dbg(xsphy->dev, "phy.%d, fm_out:%d, calib:%d (clk:%d, coef:%d)\n", in u2_phy_slew_rate_calibrate()
157 inst->index, fm_out, calib_val, in u2_phy_slew_rate_calibrate()
158 xsphy->src_ref_clk, xsphy->src_coef); in u2_phy_slew_rate_calibrate()
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H A Dphy-mtk-tphy.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/phy/phy.h>
15 #include <linux/nvmem-consumer.h>
22 #include "phy-mtk-io.h"
24 /* version V1 sub-banks offset base address */
35 /* version V2/V3 sub-banks offset base address */
216 /* CDR Charge Pump P-path current adjustment */
235 /* TX driver tail current control for 0dB de-empahsis mdoe for Gen1 speed */
244 /* I-path capacitance adjustment for Gen1 */
372 [U3P_EFUSE_TX_IMP] = "tx-imp",
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/openbmc/hiomapd/vpnor/
H A Dffs.h1 /* SPDX-License-Identifier: Apache-2.0 */
8 /* There are two structures outlined here - one that represents the PNOR
9 * partition table (or header) - this appears first in the PNOR image.
11 * of another structure - which represents the partition.
14 * https://github.com/open-power/hostboot/blob/master/src/usr/pnor/ffs.h */
32 * whether a partition is ECC protected, is read-only, is preserved across
40 …* [1] https://github.com/open-power/hostboot/blob/9acfce99596f12dcc60952f8506a77e542609cbf/src/usr…
69 * @name: Name of the partition - a null terminated string
70 * @base: The offset in the PNOR, in block-size (1 block = 4KB),
80 * @checksum: Partition checksum (includes all words above) - the
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/openbmc/phosphor-mboxd/vpnor/
H A Dpnor_partition_defs.h1 /* SPDX-License-Identifier: Apache-2.0 */
8 /* There are two structures outlined here - one that represents the PNOR
9 * partition table (or header) - this appears first in the PNOR image.
11 * of another structure - which represents the partition.
14 * https://github.com/open-power/hostboot/blob/master/src/usr/pnor/ffs.h */
32 * whether a partition is ECC protected, is read-only, is preserved across
40 …* [1] https://github.com/open-power/hostboot/blob/9acfce99596f12dcc60952f8506a77e542609cbf/src/usr…
69 * @name: Name of the partition - a null terminated string
70 * @base: The offset in the PNOR, in block-size (1 block = 4KB),
80 * @checksum: Partition checksum (includes all words above) - the
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/openbmc/linux/drivers/phy/
H A Dphy-xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene Multi-purpose PHY driver
10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes.
19 * -----------------
20 * | Internal | |------|
21 * | Ref PLL CMU |----| | ------------- ---------
22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes|
23 * | | | | ---------
24 * External Clock ------| | -------------
25 * |------|
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/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-d4xx.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-meta-fmt-d4xx:
15 Intel D4xx (D435, D455 and others) cameras include per-frame metadata in their UVC
37 .. flat-table:: D4xx metadata
39 :header-rows: 1
40 :stub-columns: 0
42 * - **Field**
43 - **Description**
44 * - :cspan:`1` *Depth Control*
45 * - __u32 ID
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/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/css/
H A Dfont-awesome.min.css4 * -------------------------------------------------------
6 * can be found at: http://fortawesome.github.com/Font-Awesome/
9 * -------------------------------------------------------
10 * - The Font Awesome font is licensed under the SIL Open Font License - http://scripts.sil.org/OFL
11 * - Font Awesome CSS, LESS, and SASS files are licensed under the MIT License -
12 * http://opensource.org/licenses/mit-license.html
13 …* - The Font Awesome pictograms are licensed under the CC BY 3.0 License - http://creativecommons…
14 * - Attribution is no longer required in Font Awesome 3.0, but much appreciated:
15 * "Font Awesome by Dave Gandy - http://fortawesome.github.com/Font-Awesome"
18 * -------------------------------------------------------
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H A Dbootstrap.min.css3 * Copyright 2011-2015 Twitter, Inc.
5 …-family:sans-serif;-webkit-text-size-adjust:100%;-ms-text-size-adjust:100%}body{margin:0}article,a…
H A Dbootstrap.css3 * Copyright 2011-2015 Twitter, Inc.
8 font-family: sans-serif;
9 -webkit-text-size-adjust: 100%;
10 -ms-text-size-adjust: 100%;
34 display: inline-block;
35 vertical-align: baseline;
46 background-color: transparent;
53 border-bottom: 1px dotted;
57 font-weight: bold;
60 font-style: italic;
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H A Dbootstrap.css.map1 …-prefixes.less","less/mixins/tab-focus.less","less/mixins/image.less","less/type.less","less/mixin…
/openbmc/linux/drivers/phy/hisilicon/
H A Dphy-hi3670-pcie.c1 // SPDX-License-Identifier: GPL-2.0
171 writel(val, phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_writel()
176 return readl(phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_readl()
193 writel(val, phy->base + reg); in kirin_apb_natural_phy_writel()
199 return readl(phy->base + reg); in kirin_apb_natural_phy_readl()
206 regmap_read(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, &val); in hi3670_pcie_phy_oe_enable()
212 regmap_write(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, val); in hi3670_pcie_phy_oe_enable()
217 struct device *dev = phy->dev; in hi3670_pcie_get_eyeparam()
221 np = dev->of_node; in hi3670_pcie_get_eyeparam()
223 ret = of_property_read_u32_array(np, "hisilicon,eye-diagram-param", in hi3670_pcie_get_eyeparam()
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/openbmc/linux/fs/nfs/
H A Dwrite.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #include <linux/backing-dev.h>
86 INIT_LIST_HEAD(&p->pages); in nfs_commitdata_alloc()
108 p->rw_mode = FMODE_WRITE; in nfs_writehdr_alloc()
125 ioc->complete = complete; in nfs_io_completion_init()
126 ioc->data = data; in nfs_io_completion_init()
127 kref_init(&ioc->refcount); in nfs_io_completion_init()
134 ioc->complete(ioc->data); in nfs_io_completion_release()
141 kref_get(&ioc->refcount); in nfs_io_completion_get()
147 kref_put(&ioc->refcount, nfs_io_completion_release); in nfs_io_completion_put()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddce_calcs.c38 * This file is gcc-parseable HW gospel, coming straight from HW engineers.
42 * remain as-is as it provides us with a guarantee from HW that it is correct.
141 yclk[low] = vbios->low_yclk; in calculate_bandwidth()
142 yclk[mid] = vbios->mid_yclk; in calculate_bandwidth()
143 yclk[high] = vbios->high_yclk; in calculate_bandwidth()
144 sclk[s_low] = vbios->low_sclk; in calculate_bandwidth()
145 sclk[s_mid1] = vbios->mid1_sclk; in calculate_bandwidth()
146 sclk[s_mid2] = vbios->mid2_sclk; in calculate_bandwidth()
147 sclk[s_mid3] = vbios->mid3_sclk; in calculate_bandwidth()
148 sclk[s_mid4] = vbios->mid4_sclk; in calculate_bandwidth()
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/openbmc/openbmc/poky/bitbake/lib/bb/tests/fetch-testdata/apple/cups/
H A Dreleases10 <meta charset="utf-8">
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21 …-7mtunHqp/Bw0ND9akjJME8XCh0WPm3HAXOSeX7skL0qGAhpdfzkQvYcujYcwNPTpWKeKMFUGZGtvnEkcczFgwQ==" rel="st…
22 …-CmoegizWCUR1jC94Y2eukVQIFxJ9GxYerz9q7dBwImLlx8ODwYkXAMIhCfTnA45Ep6++rcO/ZtKVLvFBM8dapA==" rel="st…
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/openbmc/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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