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/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3566-soquartz-blade.dts58 * i2c1 is exposed on CM1 / Module1A
68 * i2c2 is exposed on CM1 / Module1A - to PI40
77 * i2c3 is exposed on CM1 / Module1A - to PI40
86 * i2c4 is exposed on CM2 / Module1B - to PI40
95 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
136 * saradc is exposed on CM1 / Module1A - to J2
150 * spi3 is exposed on CM1 / Module1A - to PI40
162 * uart2 is exposed on CM1 / Module1A - to PI40
171 * uart7 is exposed on CM1 / Module1A - to PI40
H A Drk3566-soquartz-cm4.dts54 * i2c1 is exposed on CM1 / Module1A
72 * i2c2 is exposed on CM1 / Module1A - to PI40
81 * i2c3 is exposed on CM1 / Module1A - to PI40
90 * i2c4 is exposed on CM2 / Module1B - to PI40
99 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
134 * saradc is exposed on CM1 / Module1A - to J2
148 * spi3 is exposed on CM1 / Module1A - to PI40
160 * uart2 is exposed on CM1 / Module1A - to PI40
169 * uart7 is exposed on CM1 / Module1A - to PI40
H A Drk3566-soquartz-model-a.dts77 * i2c1 is exposed on CM1 / Module1A
95 * i2c2 is exposed on CM1 / Module1A - to PI40
104 * i2c3 is exposed on CM1 / Module1A - to PI40
113 * i2c4 is exposed on CM2 / Module1B - to PI40
122 * i2s1_8ch is exposed on CM1 / Module1A - to PI40
161 * saradc is exposed on CM1 / Module1A - to J2
180 * spi3 is exposed on CM1 / Module1A - to PI40
192 * uart2 is exposed on CM1 / Module1A - to PI40
201 * uart7 is exposed on CM1 / Module1A - to PI40
H A Drk3566-soquartz.dtsi414 * i2c1 is exposed on CM1 / Module1A
423 * i2c2 is exposed on CM1 / Module1A
434 * i2c3 is exposed on CM1 / Module1A
443 * i2c4 is exposed on CM2 / Module1B
458 * i2s1_8ch is exposed on CM1 / Module1A
557 * saradc is exposed on CM1 / Module1A
602 * spi3 is exposed on CM1 / Module1A
638 * uart2 is exposed on CM1 / Module1A
647 * uart7 is exposed on CM1 / Module1A
/openbmc/qemu/target/s390x/
H A Dcpu_features_def.h.inc6 * - _NAME: Feature name exposed to the user.
9 * - _DESC: Feature description, exposed to the user.
22 /* Features exposed via the STFL(E) instruction. */
119 /* Features exposed via SCLP SCCB Byte 80 - 98 (bit numbers relative to byte-80) */
125 /* Features exposed via SCLP SCCB Byte 116 - 119 (bit numbers relative to byte-116) */
131 /* Features exposed via SCLP SCCB Facilities byte 134 (bit numbers relative to byte-134) */
134 /* Features exposed via SCLP CPU info. */
144 * Features exposed via no feature bit (but e.g., instruction sensing)
151 /* Features exposed via the PLO instruction. */
177 /* Features exposed via the PTFF instruction. */
[all …]
H A Dcpu_features.h51 const char *name; /* name exposed to the user */
52 const char *desc; /* description exposed to the user */
76 const char *name; /* name exposed to the user */
77 const char *desc; /* description exposed to the user */
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun7i-a20-olimex-som204-evb.dts134 /* Exposed to UEXT1 */
145 /* Exposed to UEXT2 */
266 /* Exposed to UEXT1 */
274 /* Exposed to UEXT2 */
295 /* Exposed to UEXT1 */
302 /* Exposed to UEXT2 */
/openbmc/u-boot/arch/arm/dts/
H A Dsun7i-a20-olimex-som204-evb.dts144 /* Exposed to UEXT1 */
157 /* Exposed to UEXT2 */
274 /* Exposed to UEXT1 */
282 /* Exposed to UEXT2 */
303 /* Exposed to UEXT1 */
310 /* Exposed to UEXT2 */
/openbmc/linux/Documentation/admin-guide/perf/
H A Dqcom_l3_pmu.rst7 by all cores within a socket. Each slice is exposed as a separate uncore perf
18 exposed via the "event" format attribute. In addition to the 32bit physical
20 counter chaining. This feature is exposed via the "lc" (long counter) format
/openbmc/linux/Documentation/admin-guide/gpio/
H A Dgpio-mockup.rst7 chips for testing purposes. The lines exposed by these chips can be accessed
23 parameter is the number of lines exposed by the chip.
34 GPIO lines exposed by it should be named.
H A Dgpio-sim.rst7 chips for testing purposes. The lines exposed by these chips can be accessed
18 values of exposed attributes. Once the chip is instantiated, this hierarchy
47 the number of lines exposed by this bank.
123 directory for each exposed line
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Daspeed-lpc.yaml26 * An LPC Host Interface Controller manages functions exposed to the host such
35 configuration, therefore the host portion of the controller is exposed as a
65 The LPC Host Interface Controller manages functions exposed to the host such as
89 …description: The SPI flash controller containing the flash to be exposed over the LPC to AHB mappi…
H A Dx-powers,ac100.yaml35 Name of the 4M_adda clock exposed by the codec
66 Name of the cko1, cko2 and cko3 clocks exposed by the codec
/openbmc/entity-manager/docs/
H A Dentity_manager_dbus_api.md21 Configurations are components that are exposed when an entity is added to the
23 exposed when the front panel is detected.
60 Properties will contain all non-objects (simple types) exposed by the JSON.
/openbmc/linux/include/linux/
H A Dmemory.h92 /* These states are exposed to userspace as text strings in sysfs */
93 #define MEM_ONLINE (1<<0) /* exposed to userspace */
94 #define MEM_GOING_OFFLINE (1<<1) /* exposed to userspace */
95 #define MEM_OFFLINE (1<<2) /* exposed to userspace */
H A Dfs_types.h24 * exposed to user via getdents(2), readdir(3)
54 * so whiteout dirents are exposed to user as DT_CHR.
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-cros-ec25 This attribute is exposed by the CrOS EC sensors driver and
26 represents the sensor ID as exposed by the EC. This ID is used
/openbmc/linux/Documentation/sound/hd-audio/
H A Drealtek-pc-beep.rst7 route audio between pins but aren't themselves exposed as HDA widgets. As far
35 by h and S bits. Does not affect the level of 1Ah exposed to other widgets.
39 by h and S bits. Does not affect the level of 1Ah exposed to other widgets.
86 This particular register, exposed at coefficient 0x36 and named in commits from
/openbmc/qemu/docs/system/
H A Dsecurity.rst96 necessary for QEMU but are not exposed to guests. A guest that escapes into
148 commands exposed will instruct QEMU to access content on the host file system
161 over which the monitor console is exposed. It needs to have protection against
166 The general recommendation is that the monitor console should be exposed over
/openbmc/linux/drivers/misc/mei/
H A Dhw-txe-regs.h124 * and it is also exposed in the SeC memory space.
138 * and it is also exposed in the SeC memory space.
194 * This register is both an ICR to SeC and it is also exposed
204 * This register is both an ICR to SeC and it is also exposed
/openbmc/linux/drivers/net/ethernet/intel/ice/
H A Dice_vf_lib_private.h11 * Functions which may be used by other files should be exposed as part of
14 * Functions in this file are exposed only when CONFIG_PCI_IOV is enabled, and
/openbmc/linux/rust/bindings/
H A Dlib.rs37 // When both a directly exposed symbol and a helper exists for the same function,
38 // the directly exposed symbol is preferred and the helper becomes dead code, so
/openbmc/linux/drivers/media/platform/renesas/vsp1/
H A Dvsp1_drm.h21 * struct vsp1_drm_pipeline - State for the API exposed to the DRM driver
50 * struct vsp1_drm - State for the API exposed to the DRM driver
/openbmc/linux/rust/alloc/collections/
H A Dmod.rs73 reason = "Uncertain how much info should be exposed",
85 reason = "Uncertain how much info should be exposed",
113 reason = "Uncertain how much info should be exposed",
/openbmc/phosphor-dbus-interfaces/yaml/xyz/openbmc_project/MCTP/
H A DREADME.md8 The supported MCTP message types in an endpoint are exposed by the
36 network ID then it is exposed on the D-Bus. The D-Bus object path is

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