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/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dtruly,nt35597.txt1 Truly model NT35597 DSI display driver
7 - compatible: should be "truly,nt35597-2K-display"
8 - vdda-supply: phandle of the regulator that provides the supply voltage
10 - vdispp-supply: phandle of the regulator that provides the supply voltage
12 - vdispn-supply: phandle of the regulator that provides the supply voltage
14 - reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
17 - mode-gpios: phandle of the gpio for choosing the mode of the display
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/msm/
H A Ddsi-controller-main.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI controller
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
15 - items:
16 - enum:
17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
[all …]
/openbmc/linux/drivers/gpu/drm/bridge/
H A Dti-sn65dsi83.c1 // SPDX-License-Identifier: GPL-2.0
6 * - SN65DSI83
7 * = 1x Single-link DSI ~ 1x Single-link LVDS
8 * - Supported
9 * - Single-link LVDS mode tested
10 * - SN65DSI84
11 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS
12 * - Supported
13 * - Dual-link LVDS mode tested
14 * - 2x Single-link LVDS mode unsupported
[all …]
H A Dtc358762.c1 // SPDX-License-Identifier: GPL-2.0
39 /* DSI layer registers */
40 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
49 #define LCDCTRL_EVTMODE BIT(5) /* Event mode */
50 #define LCDCTRL_RGB888 BIT(8) /* RGB888 mode */
66 /* Lane enable PPI and DSI register bits */
77 struct drm_display_mode mode; member
84 int ret = ctx->error; in tc358762_clear_error()
86 ctx->error = 0; in tc358762_clear_error()
92 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in tc358762_write() local
[all …]
H A Dtc358775.c1 // SPDX-License-Identifier: GPL-2.0
3 * TC358775 DSI to LVDS bridge driver
16 #include <linux/media-bus-format.h>
35 /* DSI D-PHY Layer Registers */
48 #define DFTMODE_CNTRL 0x0054 /* DFT Mode Control */
50 /* DSI PPI Layer Registers */
51 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */
58 #define PPI_TX_RX_TA 0x013C /* DSI Bus Turn Around timing parameters */
89 #define PPI_CLRSIPO 0x01E4 /* Clear SIPO values, Slave mode use only. */
92 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX function */
[all …]
H A Dlontium-lt9211.c1 // SPDX-License-Identifier: GPL-2.0
6 * 2xDSI/2xLVDS/1xDPI -> 2xDSI/2xLVDS/1xDPI
8 * 1xDSI -> 1xLVDS
17 #include <linux/media-bus-format.h>
40 /* DSI lane count - 0 means 4 lanes ; 1, 2, 3 means 1, 2, 3 lanes. */
47 struct mipi_dsi_device *dsi; member
106 return drm_bridge_attach(bridge->encoder, ctx->panel_bridge, in lt9211_attach()
107 &ctx->bridge, flags); in lt9211_attach()
116 ret = regmap_bulk_read(ctx->regmap, REG_CHIPID0, chipid, 3); in lt9211_read_chipid()
118 dev_err(ctx->dev, "Failed to read Chip ID: %d\n", ret); in lt9211_read_chipid()
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/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dsharp,lq101r1sx01.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <treding@nvidia.com>
13 This panel requires a dual-channel DSI host to operate. It supports two modes:
14 - left-right: each channel drives the left or right half of the screen
15 - even-odd: each channel drives the even or odd lines of the screen
17 Each of the DSI channels controls a separate DSI peripheral. The peripheral
18 driven by the first link (DSI-LINK1), left or even, is considered the primary
20 to the peripheral driven by the second link (DSI-LINK2, right or odd).
[all …]
H A Dnovatek,nt35950.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Novatek NT35950-based display panels
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 The nt35950 IC from Novatek is a Driver IC used to drive MIPI-DSI panels,
14 with Static RAM for content retention in command mode and also supports
15 video mode with VESA Frame Buffer Compression or Display Stream Compression
16 on single, or dual dsi port(s).
22 - $ref: panel-common.yaml#
[all …]
/openbmc/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_manager.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "dsi.h"
24 struct msm_dsi *dsi[DSI_MAX]; member
39 return msm_dsim_glb.dsi[id]; in dsi_mgr_get_dsi()
44 return msm_dsim_glb.dsi[(id + 1) % DSI_MAX]; in dsi_mgr_get_other_dsi()
51 /* We assume 2 dsi nodes have the same information of bonded dsi and in dsi_mgr_parse_of()
52 * sync-mode, and only one node specifies master in case of bonded mode. in dsi_mgr_parse_of()
54 if (!msm_dsim->is_bonded_dsi) in dsi_mgr_parse_of()
55 msm_dsim->is_bonded_dsi = of_property_read_bool(np, "qcom,dual-dsi-mode"); in dsi_mgr_parse_of()
57 if (msm_dsim->is_bonded_dsi) { in dsi_mgr_parse_of()
[all …]
/openbmc/linux/drivers/gpu/drm/panel/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
37 NT35596 1080x1920 video mode panel as found in some Asus
46 as found in the YLM RS-97 handheld gaming console.
49 tristate "Boe BF060Y8M-AJ0 panel"
54 Say Y here if you want to enable support for Boe BF060Y8M-AJ0
56 uses 24 bit RGB per pixel. It provides a MIPI DSI interface to
57 the host and backlight is controlled through DSI commands.
66 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
[all …]
H A Dpanel-truly-nt35597.c1 // SPDX-License-Identifier: GPL-2.0
64 struct mipi_dsi_device *dsi[2]; member
219 /* CMD mode(10) VDO mode(03) */
230 for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { in truly_dcs_write()
231 ret = mipi_dsi_dcs_write(ctx->dsi[i], command, NULL, 0); in truly_dcs_write()
233 dev_err(ctx->dev, "cmd 0x%x failed for dsi = %d\n", command, i); in truly_dcs_write()
247 for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { in truly_dcs_write_buf()
248 ret = mipi_dsi_dcs_write_buffer(ctx->dsi[i], buf, size); in truly_dcs_write_buf()
250 dev_err(ctx->dev, "failed to tx cmd [%d], err: %d\n", i, ret); in truly_dcs_write_buf()
262 for (i = 0; i < ARRAY_SIZE(ctx->supplies); i++) { in truly_35597_power_on()
[all …]
/openbmc/u-boot/arch/arm/mach-rockchip/rk3399/
H A DKconfig10 with full function and phisical connectors support like type-C ports,
11 usb2.0 host ports, LVDS, JTAG, MAC, SDcard, HDMI, USB-2-serial...
14 bool "Theobroma Systems RK3399-Q7 (Puma)"
16 The RK3399-Q7 (Puma) is a system-on-module (designed and
18 in a Qseven-compatible form-factor (running of a single 5V
19 supply and exposing its external interfaces on a MXM-230
22 Key features of the RK3399-Q7 include:
23 * on-module USB 3.0 hub (2x USB 3.0 host + 1x USB 2.0 host)
24 * USB 3.0 dual-role
25 * on-module Micrel KSZ9031 GbE PHY
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dsi.h35 /* Dual Link support */
54 /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */
56 u16 ports; /* VLV DSI */
57 u16 phys; /* ICL DSI */
60 /* if true, use HS mode, otherwise LP */
66 /* Video mode or command mode */
69 /* number of DSI lanes */
76 * video mode pixel format
148 return container_of(&encoder->base, struct intel_dsi, base.base); in enc_to_intel_dsi()
153 return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE; in is_vid_mode()
[all …]
H A Dintel_dsi_vbt.c119 /* ICL DSI Display GPIO Pins */
135 * If single link DSI is being used on any port, the VBT sequence block in intel_dsi_seq_port_to_port()
139 if (hweight8(intel_dsi->ports) == 1) in intel_dsi_seq_port_to_port()
140 return ffs(intel_dsi->ports) - 1; in intel_dsi_seq_port_to_port()
143 if (intel_dsi->ports & BIT(PORT_B)) in intel_dsi_seq_port_to_port()
145 else if (intel_dsi->ports & BIT(PORT_C)) in intel_dsi_seq_port_to_port()
155 struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev); in mipi_exec_send_packet()
161 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet()
173 if (drm_WARN_ON(&dev_priv->drm, !intel_dsi->dsi_hosts[port])) in mipi_exec_send_packet()
176 dsi_device = intel_dsi->dsi_hosts[port]->device; in mipi_exec_send_packet()
[all …]
H A Dicl_dsi.c71 drm_err(&dev_priv->drm, "DSI header credits not released\n"); in wait_for_header_credits()
83 drm_err(&dev_priv->drm, "DSI payload credits not released\n"); in wait_for_payload_credits()
100 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in wait_for_cmds_dispatched_to_panel()
102 struct mipi_dsi_device *dsi; in wait_for_cmds_dispatched_to_panel() local
108 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
115 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
116 dsi = intel_dsi->dsi_host in wait_for_cmds_dispatched_to_panel()
1132 struct mipi_dsi_device *dsi; gen11_dsi_powerup_panel() local
1441 gen11_dsi_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode) gen11_dsi_mode_valid() argument
1763 gen11_dsi_host_attach(struct mipi_dsi_host * host,struct mipi_dsi_device * dsi) gen11_dsi_host_attach() argument
1769 gen11_dsi_host_detach(struct mipi_dsi_host * host,struct mipi_dsi_device * dsi) gen11_dsi_host_detach() argument
[all...]
H A Dvlv_dsi.c87 struct drm_encoder *encoder = &intel_dsi->base.base; in vlv_dsi_wait_for_fifo_empty()
88 struct drm_device *dev = encoder->dev; in vlv_dsi_wait_for_fifo_empty()
97 drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
109 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
125 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
134 struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; in intel_dsi_host_transfer()
136 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer()
149 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
165 drm_err(&dev_priv->drm, in intel_dsi_host_transfer()
172 if (msg->rx_len) { in intel_dsi_host_transfer()
[all …]
/openbmc/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-mipi-dsi.c1 // SPDX-License-Identifier: GPL-2.0+
7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
193 #define N_LANES(n) (((n) - 1) & 0x3)
226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
265 struct dw_mipi_dsi *master; /* dual-dsi master ptr */
[all …]
/openbmc/linux/drivers/gpu/drm/rockchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 This driver provides kernel mode setting and buffer
67 bool "Rockchip specific extensions for Synopsys DW MIPI DSI"
71 for the Synopsys DesignWare dsi driver. If you want to
72 enable MIPI DSI on RK3288 or RK3399 based SoC, you should
89 support LVDS, rgb, dual LVDS output mode. say Y to enable its
H A Ddw-mipi-dsi-rockchip.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Chris Zhong <zyw@rock-chips.com>
6 * Nickey Yang <nickey.yang@rock-chips.com>
41 #define N_LANES(n) ((((n) - 1) & 0x3) << 0)
93 #define INPUT_DIVIDER(val) (((val) - 1) & 0x7f)
96 #define LOOP_DIV_LOW_SEL(val) (((val) - 1) & 0x1f)
97 #define LOOP_DIV_HIGH_SEL(val) ((((val) - 1) >> 5) & 0xf)
264 /* dual-channel */
355 return -EINVAL; in max_mbps_to_parameter()
358 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm8250-xiaomi-elish-common.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/arm/qcom,ids.h>
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
19 /delete-node/ &adsp_mem;
20 /delete-node/ &cdsp_secure_heap;
21 /delete-node/ &slpi_mem;
22 /delete-node/ &spss_mem;
23 /delete-node/ &xbl_aop_mem;
26 classis-type = "tablet";
[all …]
H A Dsdm845-mtp.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
18 chassis-type = "handset";
25 stdout-path = "serial0:115200n8";
28 vph_pwr: vph-pwr-regulator {
29 compatible = "regulator-fixed";
30 regulator-name = "vph_pwr";
31 regulator-min-microvolt = <3700000>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32f469-disco.dts2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f469-pinctrl.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
55 model = "STMicroelectronics STM32F469i-DISCO board";
56 compatible = "st,stm32f469i-disco", "st,stm32f469";
[all …]
/openbmc/linux/Documentation/arch/arm/stm32/
H A Dstm32f769-overview.rst6 ------------
8 The STM32F769 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support*2
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C*4, SPI*6, CAN*3 busses support
[all …]
/openbmc/linux/Documentation/gpu/
H A Ddrm-kms-helpers.rst2 Mode Setting Helper Functions
27 for handling panel-related information and logic. Plus then a big set of
28 helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally
39 .. kernel-doc:: include/drm/drm_modeset_helper_vtables.h
42 .. kernel-doc:: include/drm/drm_modeset_helper_vtables.h
51 --------
53 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
57 ---------------------------------------
59 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
63 --------------------------
[all …]
/openbmc/linux/drivers/gpu/drm/tegra/
H A Ddsi.c1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "dsi.h"
30 #include "mipi-phy.h"
81 /* for ganged-mode support */
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument
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