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/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dsc.c36 static void dpu_hw_dsc_disable(struct dpu_hw_dsc *dsc) in dpu_hw_dsc_disable() argument
38 struct dpu_hw_blk_reg_map *c = &dsc->hw; in dpu_hw_dsc_disable()
44 struct drm_dsc_config *dsc, in dpu_hw_dsc_config() argument
59 slice_last_group_size = (dsc->slice_width + 2) % 3; in dpu_hw_dsc_config()
64 data |= (dsc->bits_per_pixel << 8); in dpu_hw_dsc_config()
65 data |= (dsc->block_pred_enable << 7); in dpu_hw_dsc_config()
66 data |= (dsc->line_buf_depth << 3); in dpu_hw_dsc_config()
67 data |= (dsc->simple_422 << 2); in dpu_hw_dsc_config()
68 data |= (dsc->convert_rgb << 1); in dpu_hw_dsc_config()
69 data |= dsc->bits_per_component; in dpu_hw_dsc_config()
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H A Ddpu_hw_dsc_1_2.c86 struct drm_dsc_config *dsc, in dpu_hw_dsc_config_1_2() argument
97 if (!hw_dsc || !dsc) in dpu_hw_dsc_config_1_2()
110 num_active_slice_per_enc = dsc->slice_count; in dpu_hw_dsc_config_1_2()
112 num_active_slice_per_enc = dsc->slice_count / 2; in dpu_hw_dsc_config_1_2()
127 data = (dsc->dsc_version_minor & 0xf) << 28; in dpu_hw_dsc_config_1_2()
128 if (dsc->dsc_version_minor == 0x2) { in dpu_hw_dsc_config_1_2()
129 if (dsc->native_422) in dpu_hw_dsc_config_1_2()
131 if (dsc->native_420) in dpu_hw_dsc_config_1_2()
135 bpp = dsc->bits_per_pixel; in dpu_hw_dsc_config_1_2()
139 if (dsc->native_422 || dsc->native_420) in dpu_hw_dsc_config_1_2()
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H A Ddpu_hw_dsc.h19 * struct dpu_hw_dsc_ops - interface to the dsc hardware driver functions
24 * dsc_disable - disable dsc
25 * @hw_dsc: Pointer to dsc context
30 * dsc_config - configures dsc encoder
31 * @hw_dsc: Pointer to dsc context
32 * @dsc: panel dsc parameters
33 * @mode: dsc topology mode to be set
37 struct drm_dsc_config *dsc,
43 * @hw_dsc: Pointer to dsc context
44 * @dsc: panel dsc parameters
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dsc.c30 #include "dsc/dscc_types.h"
31 #include "dsc/rc_calc.h"
33 static void dsc_write_to_registers(struct display_stream_compressor *dsc, const struct dsc_reg_valu…
36 static void dsc2_read_state(struct display_stream_compressor *dsc, struct dcn_dsc_state *s);
37 static bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *ds…
38 static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
40 static void dsc2_enable(struct display_stream_compressor *dsc, int opp_pipe);
41 static void dsc2_disable(struct display_stream_compressor *dsc);
42 static void dsc2_disconnect(struct display_stream_compressor *dsc);
66 dsc->ctx->logger
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/openbmc/linux/drivers/gpu/drm/msm/
H A Dmsm_dsc_helper.h5 * Helper methods for MSM-specific DSC calculations that are common between timing engine,
17 * @dsc: Pointer to drm dsc config struct
21 static inline u32 msm_dsc_get_slices_per_intf(const struct drm_dsc_config *dsc, u32 intf_width) in msm_dsc_get_slices_per_intf() argument
23 return DIV_ROUND_UP(intf_width, dsc->slice_width); in msm_dsc_get_slices_per_intf()
28 * @dsc: Pointer to drm dsc config struct
33 static inline u32 msm_dsc_get_bytes_per_line(const struct drm_dsc_config *dsc) in msm_dsc_get_bytes_per_line() argument
35 return dsc->slice_count * dsc->slice_chunk_size; in msm_dsc_get_bytes_per_line()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Ddsc.h36 /* Input parameters for configuring DSC from the outside of DSC */
47 /* Output parameters for configuring DSC-related part of OPTC */
69 /* DSC encoder capabilities
70 * They differ from the DPCD DSC caps because they are based on AMD DSC encoder caps.
76 uint8_t NUM_SLICES_3 : 1; /* This one is not per DSC spec, but our encoder supports it */
99 void (*dsc_read_state)(struct display_stream_compressor *dsc, struct dcn_dsc_state *s);
100 …bool (*dsc_validate_stream)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cf…
101 void (*dsc_set_config)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
103 bool (*dsc_get_packed_pps)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
105 void (*dsc_enable)(struct display_stream_compressor *dsc, int opp_pipe);
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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc.c49 /* There's no pipe A DSC engine on ICL */ in is_pipe_dsc()
69 * We are using the method provided in DSC 1.2a C-Model in codec_main.c
70 * Above method use a common formula to derive values for any combination of DSC
92 * According to DSC 1.2 spec in Section 4.1 if native_420 is set: in calculate_rc_params()
244 struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config; in intel_dsc_compute_params()
245 u16 compressed_bpp = pipe_config->dsc.compressed_bpp; in intel_dsc_compute_params()
251 pipe_config->dsc.slice_count); in intel_dsc_compute_params()
261 * According to DSC 1.2 specs if colorspace is YCbCr then convert_rgb is 0 in intel_dsc_compute_params()
280 * According to DSC 1.2 specs in Section 4.1 if native_420 is set in intel_dsc_compute_params()
355 int num_vdsc_instances = (crtc_state->dsc.dsc_split) ? 2 : 1; in intel_dsc_get_num_vdsc_instances()
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H A Dintel_dp_mst.c51 bool dsc) in intel_dp_mst_check_constraints() argument
53 if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) <= 13 && dsc) { in intel_dp_mst_check_constraints()
76 bool dsc) in intel_dp_mst_find_vcpi_slots_for_bpp() argument
107 ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state, dsc); in intel_dp_mst_find_vcpi_slots_for_bpp()
139 if (!dsc) in intel_dp_mst_find_vcpi_slots_for_bpp()
142 crtc_state->dsc.compressed_bpp = bpp; in intel_dp_mst_find_vcpi_slots_for_bpp()
143 drm_dbg_kms(&i915->drm, "Got %d slots for pipe bpp %d dsc %d\n", slots, bpp, dsc); in intel_dp_mst_find_vcpi_slots_for_bpp()
196 /* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */ in intel_dp_dsc_mst_compute_link_config()
208 drm_dbg_kms(&i915->drm, "DSC Source supported min bpp %d max bpp %d\n", in intel_dp_dsc_mst_compute_link_config()
221 drm_dbg_kms(&i915->drm, "DSC Sink supported min bpp %d max bpp %d\n", in intel_dp_dsc_mst_compute_link_config()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dsc/
H A Ddc_dsc.c28 #include "dsc.h"
35 /* default DSC policy target bitrate limit is 16bpp */
38 /* default DSC policy enables DSC only when needed */
63 if (!timing->flags.DSC) { in apply_128b_132b_stream_overhead()
94 if (timing->flags.DSC) in dc_bandwidth_in_kbps_from_timing()
162 const struct display_stream_compressor *dsc,
198 dm_error("%s: DPCD DSC buffer size not recognized.\n", __func__); in dsc_buff_block_size_from_dpcd()
214 dm_error("%s: DPCD DSC buffer depth not recognized.\n", __func__); in dsc_line_buff_depth_from_dpcd()
274 dm_error("%s: DPCD DSC throughput mode not recognized.\n", __func__); in dsc_throughput_from_dpcd()
305 dm_error("%s: DPCD DSC bits-per-pixel increment not recognized.\n", __func__); in dsc_bpp_increment_div_from_dpcd()
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H A DMakefile3 # Makefile for the 'dsc' sub-component of DAL.
4 DSC = dc_dsc.o rc_calc.o rc_calc_dpi.o macro
6 AMD_DAL_DSC = $(addprefix $(AMDDALPATH)/dc/dsc/,$(DSC))
H A Drc_calc.c30 * @rc: DC internal DSC parameters
31 * @pps: DRM struct with all required DSC values
33 * This function expects a drm_dsc_config data struct with all the required DSC
35 * computes some of the DSC values.
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c54 #include "dsc.h"
97 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in update_dsc_on_stream() local
102 ASSERT(dsc); in update_dsc_on_stream()
111 /* Enable DSC hw block */ in update_dsc_on_stream()
121 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
122 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
124 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res.dsc; in update_dsc_on_stream()
135 /* Enable DSC in OPTC */ in update_dsc_on_stream()
136 DC_LOG_DSC("Setting optc DSC config for tg instance %d:", pipe_ctx->stream_res.tg->inst); in update_dsc_on_stream()
142 /* disable DSC in OPTC */ in update_dsc_on_stream()
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/openbmc/linux/Documentation/devicetree/bindings/display/mediatek/
H A Dmediatek,dsc.yaml4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dsc.yaml#
7 title: mediatek display DSC controller
14 The DSC standard is a specification of the algorithms used for
17 video bit stream. DSC is designed for real-time systems with
24 - mediatek,mt8195-disp-dsc
34 - description: DSC Wrapper Clock
73 compatible = "mediatek,mt8195-disp-dsc";
/openbmc/openbmc/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/
H A D0001-Patch-in-the-paths-to-the-SBSA-test-suite.patch9 ShellPkg/ShellPkg.dsc | 3 +++
12 diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc
14 --- a/ShellPkg/ShellPkg.dsc
15 +++ b/ShellPkg/ShellPkg.dsc
17 !include MdePkg/MdeLibs.dsc.inc
/openbmc/linux/drivers/gpu/drm/panel/
H A Dpanel-visionox-r66451.c196 if (!dsi->dsc) { in visionox_r66451_enable()
197 dev_err(&dsi->dev, "DSC not attached to DSI\n"); in visionox_r66451_enable()
201 drm_dsc_pps_payload_pack(&pps, dsi->dsc); in visionox_r66451_enable()
298 struct drm_dsc_config *dsc; in visionox_r66451_probe() local
305 dsc = devm_kzalloc(dev, sizeof(*dsc), GFP_KERNEL); in visionox_r66451_probe()
306 if (!dsc) in visionox_r66451_probe()
309 /* Set DSC params */ in visionox_r66451_probe()
310 dsc->dsc_version_major = 0x1; in visionox_r66451_probe()
311 dsc->dsc_version_minor = 0x2; in visionox_r66451_probe()
313 dsc->slice_height = 20; in visionox_r66451_probe()
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/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_debugfs.c36 #include "dsc.h"
1113 * Disable dsc passthrough, i.e.,: have dsc decoding at converver, not external RX
1115 * Enable dsc passthrough, i.e.,: have dsc passthrough to external RX
1244 /* function: Read link's DSC & FEC capabilities
1287 * enable DSC on the sink device or on MST branch in dp_dsc_fec_support_show()
1430 /* function: read DSC status on the connector
1433 * returns current status of DSC clock on the connector.
1442 * 1 - means that DSC is currently enabled
1443 * 0 - means that DSC is disabled
1451 struct display_stream_compressor *dsc; in dp_dsc_clock_en_read() local
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/openbmc/linux/include/drm/display/
H A Ddrm_dsc.h13 /* VESA Display Stream Compression DSC 1.2 constants */
21 /* DSC Rate Control Constants */
27 /* DSC PPS constants and macros */
48 * struct drm_dsc_rc_range_parameters - DSC Rate Control range parameters
50 * This defines different rate control parameters used by the DSC engine
70 * struct drm_dsc_config - Parameters required to configure DSC
92 * @slice_count: Number fo slices per line used by the DSC encoder
242 * @dsc_version_minor: DSC minor version
246 * @dsc_version_major: DSC major version
279 * The VESA DSC standard defines picture parameter set (PPS) which display
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H A Ddrm_dsc_helper.h15 DRM_DSC_1_1_PRE_SCR, /* legacy params from DSC 1.1 */
28 u8 drm_dsc_initial_scale_value(const struct drm_dsc_config *dsc);
29 u32 drm_dsc_flatness_det_thresh(const struct drm_dsc_config *dsc);
/openbmc/qemu/roms/
H A Dedk2-build.config41 conf = OvmfPkg/OvmfPkgIa32.dsc
51 conf = OvmfPkg/OvmfPkgIa32.dsc
64 conf = OvmfPkg/OvmfPkgX64.dsc
73 conf = OvmfPkg/OvmfPkgX64.dsc
83 conf = OvmfPkg/Microvm/MicrovmX64.dsc
95 conf = ArmVirtPkg/ArmVirtQemu.dsc
112 conf = ArmVirtPkg/ArmVirtQemu.dsc
126 conf = OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
139 conf = OvmfPkg/LoongArchVirt/LoongArchVirtQemu.dsc
/openbmc/openbmc/meta-arm/meta-arm/recipes-bsp/uefi/files/
H A D0001-Platform-StMmRpmb-Fix-build.patch12 .../PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc | 3 +++
17 …aloneMmPkg/PlatformStandaloneMmRpmb.dsc b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformSt…
19 --- a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
20 +++ b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
/openbmc/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c38 static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc_config *dsc);
163 struct drm_dsc_config *dsc; member
533 const struct drm_dsc_config *dsc) in dsi_adjust_pclk_for_compression() argument
535 int new_hdisplay = DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bpp_int(dsc), in dsi_adjust_pclk_for_compression()
536 dsc->bits_per_component * 3); in dsi_adjust_pclk_for_compression()
544 const struct drm_dsc_config *dsc, bool is_bonded_dsi) in dsi_get_pclk_rate() argument
550 if (dsc) in dsi_get_pclk_rate()
551 pclk_rate = dsi_adjust_pclk_for_compression(mode, dsc); in dsi_get_pclk_rate()
571 unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi); in dsi_byte_clk_get_rate()
590 msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi); in dsi_calc_pclk()
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/openbmc/u-boot/fs/yaffs2/
H A Dyaffsfs.c2791 static void yaffsfs_SetDirRewound(struct yaffsfs_DirSearchContxt *dsc) in yaffsfs_SetDirRewound() argument
2793 if (dsc && in yaffsfs_SetDirRewound()
2794 dsc->dirObj && in yaffsfs_SetDirRewound()
2795 dsc->dirObj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) { in yaffsfs_SetDirRewound()
2797 dsc->offset = 0; in yaffsfs_SetDirRewound()
2799 if (list_empty(&dsc->dirObj->variant.dir_variant.children)) in yaffsfs_SetDirRewound()
2800 dsc->nextReturn = NULL; in yaffsfs_SetDirRewound()
2802 dsc->nextReturn = in yaffsfs_SetDirRewound()
2803 list_entry(dsc->dirObj->variant.dir_variant. in yaffsfs_SetDirRewound()
2811 static void yaffsfs_DirAdvance(struct yaffsfs_DirSearchContxt *dsc) in yaffsfs_DirAdvance() argument
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/openbmc/qemu/tests/uefi-test-tools/
H A Duefi-test-build.config8 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
18 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
28 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
38 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
48 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
/openbmc/linux/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c55 #include "dsc.h"
737 static void dsc_optc_config_log(struct display_stream_compressor *dsc, in dsc_optc_config_log() argument
744 DC_LOGGER_INIT(dsc->ctx->logger); in dsc_optc_config_log()
746 /* 7 fractional digits decimal precision for bytes per pixel is enough because DSC in dsc_optc_config_log()
772 /* The stream with these settings can be sent (unblanked) only after DSC was enabled on RX first,
777 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in link_set_dsc_on_stream() local
781 DC_LOGGER_INIT(dsc->ctx->logger); in link_set_dsc_on_stream()
791 /* Enable DSC hw block */ in link_set_dsc_on_stream()
801 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in link_set_dsc_on_stream()
802 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in link_set_dsc_on_stream()
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/openbmc/openbmc/meta-arm/meta-arm/recipes-bsp/uefi/
H A Dedk2-firmware_%.bbappend3 EDK2_PLATFORM_DSC:qemuarm64-secureboot = "ArmVirtPkg/ArmVirtQemu.dsc"
8 EDK2_PLATFORM_DSC:qemuarm64 = "ArmVirtPkg/ArmVirtQemu.dsc"
13 EDK2_PLATFORM_DSC:qemuarm = "ArmVirtPkg/ArmVirtQemu.dsc"

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