1c110cfd1SVinod Koul /* SPDX-License-Identifier: GPL-2.0-only */
2*8c4094b2SKuogee Hsieh /*
3*8c4094b2SKuogee Hsieh * Copyright (c) 2020-2022, Linaro Limited
4*8c4094b2SKuogee Hsieh * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved
5*8c4094b2SKuogee Hsieh */
6c110cfd1SVinod Koul
7c110cfd1SVinod Koul #ifndef _DPU_HW_DSC_H
8c110cfd1SVinod Koul #define _DPU_HW_DSC_H
9c110cfd1SVinod Koul
10f83493f7SDave Airlie #include <drm/display/drm_dsc.h>
11c110cfd1SVinod Koul
12c110cfd1SVinod Koul #define DSC_MODE_SPLIT_PANEL BIT(0)
13c110cfd1SVinod Koul #define DSC_MODE_MULTIPLEX BIT(1)
14c110cfd1SVinod Koul #define DSC_MODE_VIDEO BIT(2)
15c110cfd1SVinod Koul
16c110cfd1SVinod Koul struct dpu_hw_dsc;
17c110cfd1SVinod Koul
18c110cfd1SVinod Koul /**
19c110cfd1SVinod Koul * struct dpu_hw_dsc_ops - interface to the dsc hardware driver functions
20c110cfd1SVinod Koul * Assumption is these functions will be called after clocks are enabled
21c110cfd1SVinod Koul */
22c110cfd1SVinod Koul struct dpu_hw_dsc_ops {
23c110cfd1SVinod Koul /**
24c110cfd1SVinod Koul * dsc_disable - disable dsc
25c110cfd1SVinod Koul * @hw_dsc: Pointer to dsc context
26c110cfd1SVinod Koul */
27c110cfd1SVinod Koul void (*dsc_disable)(struct dpu_hw_dsc *hw_dsc);
28c110cfd1SVinod Koul
29c110cfd1SVinod Koul /**
30c110cfd1SVinod Koul * dsc_config - configures dsc encoder
31c110cfd1SVinod Koul * @hw_dsc: Pointer to dsc context
32c110cfd1SVinod Koul * @dsc: panel dsc parameters
33c110cfd1SVinod Koul * @mode: dsc topology mode to be set
34c110cfd1SVinod Koul * @initial_lines: amount of initial lines to be used
35c110cfd1SVinod Koul */
36c110cfd1SVinod Koul void (*dsc_config)(struct dpu_hw_dsc *hw_dsc,
3746dd0c06SDmitry Baryshkov struct drm_dsc_config *dsc,
38c110cfd1SVinod Koul u32 mode,
39c110cfd1SVinod Koul u32 initial_lines);
40c110cfd1SVinod Koul
41c110cfd1SVinod Koul /**
42c110cfd1SVinod Koul * dsc_config_thresh - programs panel thresholds
43c110cfd1SVinod Koul * @hw_dsc: Pointer to dsc context
44c110cfd1SVinod Koul * @dsc: panel dsc parameters
45c110cfd1SVinod Koul */
46c110cfd1SVinod Koul void (*dsc_config_thresh)(struct dpu_hw_dsc *hw_dsc,
4746dd0c06SDmitry Baryshkov struct drm_dsc_config *dsc);
487aa6f1a1SMarijn Suijten
497aa6f1a1SMarijn Suijten void (*dsc_bind_pingpong_blk)(struct dpu_hw_dsc *hw_dsc,
507aa6f1a1SMarijn Suijten enum dpu_pingpong pp);
51c110cfd1SVinod Koul };
52c110cfd1SVinod Koul
53c110cfd1SVinod Koul struct dpu_hw_dsc {
54c110cfd1SVinod Koul struct dpu_hw_blk base;
55c110cfd1SVinod Koul struct dpu_hw_blk_reg_map hw;
56c110cfd1SVinod Koul
57c110cfd1SVinod Koul /* dsc */
58c110cfd1SVinod Koul enum dpu_dsc idx;
59c110cfd1SVinod Koul const struct dpu_dsc_cfg *caps;
60c110cfd1SVinod Koul
61c110cfd1SVinod Koul /* ops */
62c110cfd1SVinod Koul struct dpu_hw_dsc_ops ops;
63c110cfd1SVinod Koul };
64c110cfd1SVinod Koul
65c110cfd1SVinod Koul /**
66babdb815SMarijn Suijten * dpu_hw_dsc_init() - Initializes the DSC hw driver object.
67babdb815SMarijn Suijten * @cfg: DSC catalog entry for which driver object is required
68c110cfd1SVinod Koul * @addr: Mapped register io address of MDP
69babdb815SMarijn Suijten * Return: Error code or allocated dpu_hw_dsc context
70c110cfd1SVinod Koul */
71babdb815SMarijn Suijten struct dpu_hw_dsc *dpu_hw_dsc_init(const struct dpu_dsc_cfg *cfg,
72babdb815SMarijn Suijten void __iomem *addr);
73c110cfd1SVinod Koul
74c110cfd1SVinod Koul /**
75*8c4094b2SKuogee Hsieh * dpu_hw_dsc_init_1_2() - initializes the v1.2 DSC hw driver object
76*8c4094b2SKuogee Hsieh * @cfg: DSC catalog entry for which driver object is required
77*8c4094b2SKuogee Hsieh * @addr: Mapped register io address of MDP
78*8c4094b2SKuogee Hsieh * Returns: Error code or allocated dpu_hw_dsc context
79*8c4094b2SKuogee Hsieh */
80*8c4094b2SKuogee Hsieh struct dpu_hw_dsc *dpu_hw_dsc_init_1_2(const struct dpu_dsc_cfg *cfg,
81*8c4094b2SKuogee Hsieh void __iomem *addr);
82*8c4094b2SKuogee Hsieh
83*8c4094b2SKuogee Hsieh /**
84c110cfd1SVinod Koul * dpu_hw_dsc_destroy - destroys dsc driver context
85c110cfd1SVinod Koul * @dsc: Pointer to dsc driver context returned by dpu_hw_dsc_init
86c110cfd1SVinod Koul */
87c110cfd1SVinod Koul void dpu_hw_dsc_destroy(struct dpu_hw_dsc *dsc);
88c110cfd1SVinod Koul
to_dpu_hw_dsc(struct dpu_hw_blk * hw)89c110cfd1SVinod Koul static inline struct dpu_hw_dsc *to_dpu_hw_dsc(struct dpu_hw_blk *hw)
90c110cfd1SVinod Koul {
91c110cfd1SVinod Koul return container_of(hw, struct dpu_hw_dsc, base);
92c110cfd1SVinod Koul }
93c110cfd1SVinod Koul
94c110cfd1SVinod Koul #endif /* _DPU_HW_DSC_H */
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