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/openbmc/openbmc/meta-phosphor/conf/distro/include/
H A Dphosphor-defaults.inc60 # The phosphor-ipmi-fru application is data-driven and requires an input
64 # The phosphor-ipmi-fru application is data-driven and requires an input
71 # The phosphor-ipmi-fru application is data-driven and requires an input
84 # The phosphor-host-ipmid application is data-driven.
86 # The phosphor-host-ipmid application is data-driven and requires an input
93 # The phosphor-host-ipmid application is data-driven and requires an input
102 # The phosphor-led-manager application is data-driven and requires an input
109 # The phosphor-logging application has a data driven plugin that adds FRU
118 # The phosphor-fan-presence application is data driven and requires an input
125 # The phosphor-fan-control application is data driven and requires a YAML file
/openbmc/linux/drivers/gpio/
H A Dgpio-stp-xway.c22 * 3 groups of 8 bits can be driven. The hardware is able to allow the DSL modem
58 /* 2 groups of 3 bits can be driven by the phys */
86 u8 dsl; /* the 2 LSBs can be driven by the dsl core */
87 u8 phy1; /* 3 bits can be driven by phy1 */
88 u8 phy2; /* 3 bits can be driven by phy2 */
89 u8 phy3; /* 3 bits can be driven by phy3 */
90 u8 phy4; /* 3 bits can be driven by phy4 */
91 u8 reserved; /* mask out the hw driven bits in gpio_request */
149 * We mask out the HW driven pins
156 dev_err(gc->parent, "GPIO %d is driven by hardware\n", gpio); in xway_stp_request()
[all …]
/openbmc/qemu/include/hw/gpio/
H A Dnrf51_gpio.h8 * Level 0: Input externally driven LOW
9 * Level 1: Input externally driven HIGH
12 * Level 0: Driven LOW
13 * Level 1: Driven HIGH
/openbmc/openpower-vpd-parser/
H A DREADME.md13 This is a build-time YAML driven application that parses the OpenPower VPD
35 Making the application runtime JSON driven allows us to support multiple systems
41 1. The long-term goal is to completely do away with the build time YAML driven
43 VPD parser applications into a single runtime JSON driven application.
/openbmc/u-boot/drivers/video/
H A Dam335x-fb.h11 * 0 = lcd_lp and lcd_fp are driven on
14 * 1 = lcd_lp and lcd_fp are driven
21 * 0 = lcd_lp and lcd_fp are driven on
24 * 1 = lcd_lp and lcd_fp are driven on
/openbmc/linux/Documentation/devicetree/bindings/power/reset/
H A Dgpio-restart.yaml17 'open-source' is not found, the GPIO line will be driven in the inactive state. Otherwise its
18 not driven until the restart is initiated.
21 is configured as an output, and driven active, triggering a level triggered reset condition.
25 inactive-delay, the GPIO is driven active again. After a delay specified by wait-delay, the
/openbmc/linux/drivers/leds/rgb/
H A DKconfig12 and driven by a controller that doesn't have multi-color support.
18 tristate "PWM driven multi-color LED Support"
21 This option enables support for PWM driven monochrome LEDs that are
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pxaregs/pxaregs-1.14/
H A Dpxaregs.c176 { "PGSR_SS0", 0x40F00020, 0, 0x00000001, 'd', "PM GPIO pin 0 is driven to 1 during sleep" },
177 { "PGSR_SS1", 0x40F00020, 1, 0x00000001, 'd', "PM GPIO pin 1 is driven to 1 during sleep" },
178 { "PGSR_SS2", 0x40F00020, 2, 0x00000001, 'd', "PM GPIO pin 2 is driven to 1 during sleep" },
179 { "PGSR_SS3", 0x40F00020, 3, 0x00000001, 'd', "PM GPIO pin 3 is driven to 1 during sleep" },
180 { "PGSR_SS4", 0x40F00020, 4, 0x00000001, 'd', "PM GPIO pin 4 is driven to 1 during sleep" },
181 { "PGSR_SS5", 0x40F00020, 5, 0x00000001, 'd', "PM GPIO pin 5 is driven to 1 during sleep" },
182 { "PGSR_SS6", 0x40F00020, 6, 0x00000001, 'd', "PM GPIO pin 6 is driven to 1 during sleep" },
183 { "PGSR_SS7", 0x40F00020, 7, 0x00000001, 'd', "PM GPIO pin 7 is driven to 1 during sleep" },
184 { "PGSR_SS8", 0x40F00020, 8, 0x00000001, 'd', "PM GPIO pin 8 is driven to 1 during sleep" },
185 { "PGSR_SS9", 0x40F00020, 9, 0x00000001, 'd', "PM GPIO pin 9 is driven to 1 during sleep" },
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/
H A Dtruly,nt35597.txt20 - ports: This device has two video ports driven by two DSIs. Their connections
23 - port@0: DSI input port driven by master DSI
24 - port@1: DSI input port driven by secondary DSI
/openbmc/linux/Documentation/driver-api/thermal/
H A Dnouveau_thermal.rst75 Your fan can be driven in different modes:
78 * 1: The fan can be driven in manual (use pwm1 to change the speed);
79 * 2; The fan is driven automatically depending on the temperature.
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Drenesas,rza1-ports.yaml83 "software IO driven" mode to be specified. To do so use the generic
90 controller driver internally, while software driven IO direction has to
171 * Configure TIOC0A as software driven input
181 * Configure TIOC0B as software driven output
/openbmc/linux/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_gpio.c111 * So (A) is grounded, output is driven by (EN = 0) in dal_hw_gpio_set_value()
150 * program the pin as GPIO, mask out signal driven by HW */ in dal_hw_gpio_config_mode()
156 * program the pin as GPIO, mask out signal driven by HW */ in dal_hw_gpio_config_mode()
167 /* program the pin as tri-state, pin is driven by HW */ in dal_hw_gpio_config_mode()
/openbmc/linux/Documentation/driver-api/gpio/
H A Dintro.rst49 options about how that value is driven, so that for example only one
50 value might be driven, supporting "wire-OR" and similar schemes for the
95 level is actually driven), or "open source" (where only the high signal level is
96 driven) signaling. That term applies to CMOS transistors; "open collector" is
/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/
H A Dpython3-robotframework_7.2.bb3 testing and acceptance test-driven development (ATDD). It has easy-to-use\
4 tabular test data syntax and it utilizes the keyword-driven testing approach.\
/openbmc/linux/include/linux/
H A Dleds-regulator.h3 * leds-regulator.h - platform data structure for regulator driven LEDs.
18 * If you have several regulator driven LEDs, you can append a numerical id to
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-timers.yaml11 - advanced-control timers consist of a 16-bit auto-reload counter driven
15 driven by a programmable prescaler and PWM outputs.
16 - basic timers consist of a 16-bit auto-reload counter driven by a
/openbmc/linux/Documentation/hwmon/
H A Dtc654.rst32 Setting pwm1_mode to 1 will cause the pwm output to be driven based on
34 driven based on the Vin input.
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-venice-gw72xx-0x-rs422.dtso7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
H A Dimx8mm-venice-gw72xx-0x-rs485.dtso7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
H A Dimx8mm-venice-gw73xx-0x-rs485.dtso7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
H A Dimx8mm-venice-gw73xx-0x-rs422.dtso7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
/openbmc/linux/Documentation/devicetree/bindings/input/
H A Dgpio-matrix-keypad.txt1 * GPIO driven matrix keypad device tree bindings
3 GPIO driven matrix keypad is used to interface a SoC with a matrix keypad.
/openbmc/linux/Documentation/sound/soc/
H A Dclocking.rst12 Every audio subsystem is driven by a master clock (sometimes referred to as MCLK
24 The Digital Audio Interface is usually driven by a Bit Clock (often referred to
/openbmc/qemu/hw/gpio/
H A Dnpcm7xx_gpio.c97 /* Calculate level of each pin driven by GPIO controller. */ in npcm7xx_gpio_update_pins()
103 * If a pin is driven to opposite levels by the GPIO controller and the in npcm7xx_gpio_update_pins()
116 /* Set pins to externally driven level. */ in npcm7xx_gpio_update_pins()
118 /* Set internally driven pins, ignoring any conflicts. */ in npcm7xx_gpio_update_pins()
122 /* Pins not driven, pulled up or pulled down are undefined */ in npcm7xx_gpio_update_pins()
/openbmc/linux/Documentation/peci/
H A Dpeci.rst30 bit with a driven, rising edge from an idle near zero volts. The
31 duration of the signal driven high allows to determine whether the bit

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