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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dmrvl,pxa-ssp.txt5 - compatible: Must be one of
6 mrvl,pxa25x-ssp
7 mvrl,pxa25x-nssp
8 mrvl,pxa27x-ssp
9 mrvl,pxa3xx-ssp
10 mvrl,pxa168-ssp
11 mrvl,pxa910-ssp
12 mrvl,ce4100-ssp
14 - reg: The memory base
15 - dmas: Two dma phandles, one for rx, one for tx
[all …]
/openbmc/linux/arch/riscv/boot/dts/allwinner/
H A Dsunxi-d1s-t113.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ or MIT)
2 // Copyright (C) 2021-2022 Samuel Holland <samuel@sholland.org>
4 #include <dt-bindings/clock/sun6i-rtc.h>
5 #include <dt-bindings/clock/sun8i-de2.h>
6 #include <dt-bindings/clock/sun8i-tcon-top.h>
7 #include <dt-bindings/clock/sun20i-d1-ccu.h>
8 #include <dt-bindings/clock/sun20i-d1-r-ccu.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/sun8i-de2.h>
11 #include <dt-bindings/reset/sun20i-d1-ccu.h>
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsam9x60.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 #address-cells = <1>;
[all …]
H A Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/dma/at91.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/mfd/at91-usart.h>
19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
[all …]
H A Dsama5d2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
9 #include <dt-bindings/dma/at91.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/at91.h>
12 #include <dt-bindings/mfd/at91-usart.h>
13 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
20 interrupt-parent = <&aic>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-dbx5x0.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/ste-db8500-clkout.h>
9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h>
10 #include <dt-bindings/mfd/dbx500-prcmu.h>
11 #include <dt-bindings/arm/ux500_pm_domains.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/thermal/thermal.h>
16 #address-cells = <1>;
[all …]
H A Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dfsl,edma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/fsl,edma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 memory-mapped registers. channels are split into two groups, called
12 DMAMUX0 and DMAMUX1, specific DMA request source can only be multiplexed
16 - Peng Fan <peng.fan@nxp.com>
21 - enum:
22 - fsl,vf610-edma
23 - fsl,imx7ulp-edma
[all …]
H A Drenesas,rz-dmac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller
10 - Biju Das <biju.das.jz@bp.renesas.com>
13 - $ref: dma-controller.yaml#
18 - enum:
19 - renesas,r9a07g043-dmac # RZ/G2UL
20 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
[all …]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77965.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-N (R8A77965) SoC
11 #include <dt-bindings/clock/r8a77965-cpg-mssr.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/r8a77965-sysc.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
[all …]
H A Dr8a774a1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774a1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774a1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
[all …]
H A Dr8a774b1.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
11 #include <dt-bindings/power/r8a774b1-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <0>;
[all …]
H A Dr8a77961.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a77961-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a77961-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
[all …]
H A Dr8a77960.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a7796-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7796-sysc.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
[all …]
H A Dr8a77951.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H3 (R8A77951) SoC
8 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a7795-sysc.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <0>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dda8xx-usb.txt3 For DA8xx/OMAP-L1x/AM17xx/AM18xx platforms.
7 - compatible : Should be set to "ti,da830-musb".
9 - reg: Offset and length of the USB controller register set.
11 - interrupts: The USB interrupt number.
13 - interrupt-names: Should be set to "mc".
15 - dr_mode: The USB operation mode. Should be one of "host", "peripheral" or "otg".
17 - phys: Phandle for the PHY device
19 - phy-names: Should be "usb-phy"
21 - dmas: specifies the dma channels
23 - dma-names: specifies the names of the channels. Use "rxN" for receive
[all …]
H A Dam33xx-usb.txt3 - compatible: ti,am33xx-usb
4 - reg: offset and length of the usbss register sets
5 - ti,hwmods : must be "usb_otg_hs"
9 node and its PHY node are optional. The DMA node is also optional.
13 - compatible: ti,am335x-usb-ctrl-module
14 - reg: offset and length of the "USB control registers" in the "Control
17 - reg-names: "phy_ctrl" for the "USB control registers" and "wakeup" for
22 compatible: ti,am335x-usb-phy
25 reg-names: phy
31 - compatible: ti,musb-am33xx
[all …]
/openbmc/linux/Documentation/devicetree/bindings/crypto/
H A Domap-des.txt5 - compatible : Should contain "ti,omap4-des"
6 - ti,hwmods: Name of the hwmod associated with the DES module
7 - reg : Offset and length of the register set for the module
8 - interrupts : the interrupt-specifier for the DES module
9 - clocks : A phandle to the functional clock node of the DES module
10 corresponding to each entry in clock-names
11 - clock-names : Name of the functional clock, should be "fck"
14 - dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
15 Documentation/devicetree/bindings/dma/dma.txt
16 Each entry corresponds to an entry in dma-names
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dingenic,mmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: mmc-controller.yaml#
18 - enum:
19 - ingenic,jz4740-mmc
20 - ingenic,jz4725b-mmc
21 - ingenic,jz4760-mmc
22 - ingenic,jz4775-mmc
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dsunxi-h3-h5.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun8i-de2.h>
44 #include <dt-bindings/clock/sun8i-h3-ccu.h>
45 #include <dt-bindings/clock/sun8i-r-ccu.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/reset/sun8i-de2.h>
48 #include <dt-bindings/reset/sun8i-h3-ccu.h>
49 #include <dt-bindings/reset/sun8i-r-ccu.h>
52 interrupt-parent = <&gic>;
53 #address-cells = <1>;
[all …]
H A Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2015, Xilinx, Inc.
17 #address-cells = <2>;
18 #size-cells = <2>;
21 #address-cells = <1>;
22 #size-cells = <0>;
25 compatible = "arm,cortex-a53", "arm,armv8";
27 enable-method = "psci";
28 operating-points-v2 = <&cpu_opp_table>;
30 cpu-idle-states = <&CPU_SLEEP_0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun6i-a31.dtsi4 * Maxime Ripard <maxime.ripard@free-electrons.com>
6 * This file is dual-licensed: you can use it either under the terms
45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
48 #include <dt-bindings/clock/sun6i-a31-ccu.h>
49 #include <dt-bindings/clock/sun6i-rtc.h>
50 #include <dt-bindings/reset/sun6i-a31-ccu.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <1>;
[all …]
H A Dsunxi-h3-h5.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/sun6i-rtc.h>
44 #include <dt-bindings/clock/sun8i-de2.h>
45 #include <dt-bindings/clock/sun8i-h3-ccu.h>
46 #include <dt-bindings/clock/sun8i-r-ccu.h>
47 #include <dt-bindings/interrupt-controller/arm-gic.h>
48 #include <dt-bindings/reset/sun8i-de2.h>
49 #include <dt-bindings/reset/sun8i-h3-ccu.h>
50 #include <dt-bindings/reset/sun8i-r-ccu.h>
53 interrupt-parent = <&gic>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dadi,axi-spdif-tx.txt1 ADI AXI-SPDIF controller
4 - compatible : Must be "adi,axi-spdif-tx-1.00.a"
5 - reg : Must contain SPDIF core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
9 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
11 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
12 the core. The core expects one dma channel for transmit.
13 - dma-names : Must be "tx"
15 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
17 * resource-names.txt
[all …]
/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
24 #address-cells = <2>;
25 #size-cells = <2>;
[all …]

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