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/openbmc/bmcweb/
H A Dmeson.options20 'vm-websocket',
29 'redfish-use-3-digit-messageid',
31 value: 'disabled',
36 removed Q2-2025''',
44 # removing it, it has been disabled to try to give those that use it the
47 # 'vm-nbdproxy',
49 # value: 'disabled',
[all...]
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779a0.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V3U (R8A779A0) SoC
8 #include <dt-bindings/clock/r8a779a0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779a0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 /* External CAN clock - to be overridden by boards that provide it */
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
[all …]
H A Dcondor-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Condor board with R-Car V3H
8 #include <dt-bindings/gpio/gpio.h>
23 stdout-path = "serial0:115200n8";
27 d1_8v: regulator-2 {
28 compatible = "regulator-fixed";
29 regulator-name = "D1.8V";
30 regulator-min-microvolt = <1800000>;
31 regulator-max-microvolt = <1800000>;
32 regulator-boot-on;
[all …]
H A Dr8a779g0.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 * Device Tree Source for the R-Car V4H (R8A779G0) SoC
8 #include <dt-bindings/clock/r8a779g0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779g0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 /* External Audio clock - to be overridden by boards that provide it */
19 compatible = "fixed-clock";
20 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-7000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2011 - 2014 Xilinx
7 #address-cells = <1>;
8 #size-cells = <1>;
9 compatible = "xlnx,zynq-7000";
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,cortex-a9";
20 clock-latency = <1000>;
21 cpu0-supply = <&regulator_vccpint>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dsmsc,usb3503.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SMSC USB3503 High-Speed Hub Controller
10 - Dongjin Kim <tobetter@gmail.com>
15 - smsc,usb3503
16 - smsc,usb3503a
17 - smsc,usb3803
22 connect-gpios:
27 intn-gpios:
[all …]
H A Dusb251xb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip USB 2.0 Hi-Speed Hub Controller
10 - Richard Leitner <richard.leitner@skidata.com>
15 - microchip,usb2422
16 - microchip,usb2512b
17 - microchip,usb2512bi
18 - microchip,usb2513b
19 - microchip,usb2513bi
[all …]
/openbmc/u-boot/doc/
H A DREADME.t1040-l2switch6 VSC9953 is an 8-port Gigabit Ethernet switch supports the following features:
7 - 8192 MAC addresses
8 - Static Address provisioning
9 - Dynamic learning of MAC addresses and aging
10 - 4096 VLANs
11 - Independent and shared VLAN learning (IVL, SVL)
12 - Policing with storm control and MC/BC protection
13 - IPv4 and IPv6 multicast
14 - Jumbo frames (9.6 KB)
15 - Access Control List
[all …]
/openbmc/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-helper.c7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
36 #include <asm/octeon/cvmx-config.h>
38 #include <asm/octeon/cvmx-fpa.h>
39 #include <asm/octeon/cvmx-pip.h>
40 #include <asm/octeon/cvmx-pko.h>
41 #include <asm/octeon/cvmx-ipd.h>
42 #include <asm/octeon/cvmx-spi.h>
43 #include <asm/octeon/cvmx-helper.h>
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/power/qcom-rpmpd.h>
10 #include <dt-bindings/gpio/gpio.h>
13 interrupt-parent = <&intc>;
15 qcom,msm-id = <292 0x0>;
[all …]
H A Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
H A Dsm8250.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
9 #include <dt-bindings/clock/qcom,gpucc-sm8250.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
12 #include <dt-bindings/clock/qcom,sm8250-lpass-audiocc.h>
13 #include <dt-bindings/dma/qcom-gpi.h>
14 #include <dt-bindings/gpio/gpio.h>
[all …]
H A Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
[all …]
H A Dsc7280.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/clock/qcom,camcc-sc7280.h>
8 #include <dt-bindings/clock/qcom,dispcc-sc7280.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h>
11 #include <dt-bindings/clock/qcom,lpassaudiocc-sc7280.h>
12 #include <dt-bindings/clock/qcom,lpasscorecc-sc7280.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sc7280.h>
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
H A Dnvidia,tegra194-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/openbmc/linux/drivers/bus/
H A Darm-cci.c17 #include <linux/arm-cci.h>
49 {.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 { .compatible = "arm,cci-500", },
53 { .compatible = "arm,cci-550", },
59 OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME "ARM-CCI"
[all …]
/openbmc/linux/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
17 status = "disabled";
19 frame-number = <1>;
31 #mbox-cells = <1>;
[all …]
/openbmc/linux/drivers/net/ethernet/mscc/
H A Docelot_mm.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Hardware library for MAC Merge Layer and Frame Preemption on TSN-capable
6 * Copyright 2022-2023 NXP
28 return "DISABLED"; in mm_verify_state_to_string()
54 struct ocelot_port *ocelot_port = ocelot->ports[port]; in ocelot_port_update_active_preemptible_tcs()
55 struct ocelot_mm_state *mm = &ocelot->mm[port]; in ocelot_port_update_active_preemptible_tcs()
58 lockdep_assert_held(&ocelot->fwd_domain_lock); in ocelot_port_update_active_preemptible_tcs()
65 if ((ocelot_port->phy_mode != PHY_INTERFACE_MODE_QSGMII || in ocelot_port_update_active_preemptible_tcs()
66 ocelot_port->speed == SPEED_1000) && mm->tx_active) in ocelot_port_update_active_preemptible_tcs()
67 val = mm->preemptible_tcs; in ocelot_port_update_active_preemptible_tcs()
[all …]
/openbmc/bmcweb/config/
H A Dmeson.build6 'basic-auth',
7 'cookie-auth',
8 'experimental-http2',
9 'experimental-redfish-dbus-log-subscription',
10 'experimental-redfish-multi-compute
[all...]
/openbmc/linux/Documentation/networking/device_drivers/ethernet/freescale/dpaa2/
H A Dswitch-driver.rst1 .. SPDX-License-Identifier: GPL-2.0
16 interface. Traffic switched between ports is offloaded into the hardware.
18 The DPSW can have ports connected to DPNIs or to DPMACs for external access.
24 [dpaa2-eth] [dpaa2-eth] [ dpaa2-switch ]
30 | ---------- | [DPMAC] [DPMAC]
31 ------------------------------- | |
38 The dpaa2-switch driver probes on DPSW devices found on the fsl-mc bus. These
40 file - DataPath Layout (DPL) - or at runtime using the DPAA2 object APIs
43 At the moment, the dpaa2-switch driver imposes the following restrictions on
47 interfaces. This is necessary so that separation of switch ports can be
[all …]
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
H A Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/clock/qcom,lcc-msm8960.h>
6 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]

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