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/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-zc1751-xm015-dc1.dts3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
16 model = "ZynqMP zc1751-xm015-dc1 RevA";
110 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zc1254-revA.dts50 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zc1275-revA.dts50 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zc1275-revB.dts51 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zc1232-revA.dts50 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zc1751-xm018-dc4.dts189 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zcu104-revC.dts185 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zcu104-revA.dts178 spi-max-frequency = <108000000>; /* Based on DC1 spec */
/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-zc1751-xm015-dc1.dts3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1
20 model = "ZynqMP zc1751-xm015-dc1 RevA";
360 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zc1254-revA.dts50 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A Dzynqmp-zc1232-revA.dts49 spi-max-frequency = <108000000>; /* Based on DC1 spec */
H A DMakefile5 dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-zc1751-xm015-dc1.dtb
H A Dzynqmp-zc1751-xm018-dc4.dts178 spi-max-frequency = <108000000>; /* Based on DC1 spec */
/openbmc/qemu/hw/arm/
H A Dstellaris.c57 uint32_t dc1; member
93 uint32_t dc1; member
183 case 0x010: /* DC1 */ in ssys_read()
184 return s->dc1; in ssys_read()
447 DEFINE_PROP_UINT32("dc1", ssys_state, dc1, 0),
1093 qdev_prop_set_uint32(ssys_dev, "dc1", board->dc1); in stellaris_init()
1117 if (board->dc1 & (1 << 16)) { in stellaris_init()
1146 if (board->dc1 & (1 << 3)) { /* watchdog present */ in stellaris_init()
/openbmc/qemu/target/m68k/
H A Dop_helper.c755 uint32_t Dc1 = extract32(regs, 9, 3); in HELPER() local
759 int16_t c1 = env->dregs[Dc1]; in HELPER()
781 env->dregs[Dc1] = deposit32(env->dregs[Dc1], 0, 16, l1); in HELPER()
788 uint32_t Dc1 = extract32(regs, 9, 3); in do_cas2l() local
792 uint32_t c1 = env->dregs[Dc1]; in do_cas2l()
843 env->dregs[Dc1] = l1; in do_cas2l()
/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dfeiyang,fy07024di26a30d.yaml24 description: analog regulator dc1 switch
/openbmc/u-boot/configs/
H A Dxilinx_zynqmp_zc1751_xm015_dc1_defconfig43 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1"
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-connectivity/smstools3/smstools3/
H A Dscripts_no_bash.patch35 index 46e2756..2826dc1 100755
/openbmc/linux/drivers/staging/fbtft/
H A Dfb_ili9320.c85 /* DC1[2:0], DC0[2:0], VC[2:0] */ in init_display()
100 /* R11h=0x0031 at VCI=3.3V DC1[2:0], DC0[2:0], VC[2:0] */ in init_display()
H A Dfb_ili9325.c111 write_reg(par, 0x0011, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */ in init_display()
117 write_reg(par, 0x0011, 0x220 | vc); /* DC1[2:0], DC0[2:0], VC[2:0] */ in init_display()
/openbmc/linux/drivers/pmdomain/imx/
H A Dscu-pd.c231 { "dc1", IMX_SC_R_DC_1, 1, false, 0 },
232 { "dc1-pll", IMX_SC_R_DC_1_PLL_0, 2, true, 0 },
233 { "dc1-video", IMX_SC_R_DC_1_VIDEO0, 2, true, 0 },
/openbmc/linux/arch/s390/kernel/
H A Debcdic.c26 /*10 DLE DC1 DC2 DC3 DC4 NAK SYN ETB */
98 /* 0x10 DLE DC1 DC2 DC3 -RES -NL BS -POC
175 /*10 DLE DC1 DC2 DC3 DC4 NAK SYN ETB */
247 /* 0x10 DLE DC1 DC2 DC3 -RES -NL BS -POC
/openbmc/linux/include/media/
H A Dv4l2-jpeg.h119 * @huffman_tables: references to four Huffman tables in DC0, DC1, AC0, AC1
/openbmc/linux/drivers/regulator/
H A Drc5t583-regulator.c84 RC5T583_REG(DC1, DC1CTL, 0, DC1CTL, 1, 0x7F, 700, 1500, 12500, 14),
/openbmc/linux/include/linux/mfd/wm831x/
H A Dregulator.h300 * R16470 (0x4056) - DC1 Control 1
324 * R16471 (0x4057) - DC1 Control 2
348 * R16472 (0x4058) - DC1 ON Config
361 * R16473 (0x4059) - DC1 SLEEP Control
374 * R16474 (0x405A) - DC1 DVS Control

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