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/openbmc/u-boot/drivers/axi/
H A Dihs_axi.c1 // SPDX-License-Identifier: GPL-2.0+
16 * struct ihs_axi_regs - Structure for the register map of a IHS AXI device
18 * error during transfer, transfer complete, etc.)
22 * @address_lsb: Least significant 16-bit word of the address of a
23 * device to transfer data from/to
24 * @address_msb: Most significant 16-bit word of the address of a
25 * device to transfer data from/to
26 * @write_data_lsb: Least significant 16-bit word of the data to be
28 * @write_data_msb: Most significant 16-bit word of the data to be
30 * @read_data_lsb: Least significant 16-bit word of the data read
[all …]
/openbmc/linux/Documentation/driver-api/dmaengine/
H A Dprovider.rst20 DMA-eligible devices to the controller itself. Whenever the device
21 will want to start a transfer, it will assert a DMA request (DRQ) by
25 parameter: the transfer size. At each clock cycle, it would transfer a
26 byte of data from one buffer to another, until the transfer size has
31 cycle. For example, we may want to transfer as much data as the
34 that requires data to be written exactly 16 or 24 bits at a time. This
36 parameter called the transfer width.
44 transfer into smaller sub-transfers.
47 that involve a single contiguous block of data. However, some of the
48 transfers we usually have are not, and want to copy data from
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/openbmc/linux/Documentation/mhi/
H A Dmhi.rst1 .. SPDX-License-Identifier: GPL-2.0
17 modem protocols, such as IP data packets, modem control messages, and
19 protocol provides data acknowledgment feature and manages the power state of the
26 ----
47 Data structures
48 ---------------
50 All data structures used by MHI are in the host system memory. Using the
51 physical interface, the device accesses those data structures. MHI data
52 structures and data buffers in the host system memory regions are mapped for
56 context data array.
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H A Dtopology.rst1 .. SPDX-License-Identifier: GPL-2.0
11 --------------
16 It is however not involved in the actual data transfer as the data transfer
30 ----------
33 for bi-directional communication. Once MHI is in powered on state, the MHI
43 ----------
46 driver sends and receives the upper-layer protocol packets like IP packets,
57 * Prepares the device for transfer by calling mhi_prepare_for_transfer.
58 * Initiates data transfer by calling mhi_queue_transfer.
59 * Once the data transfer is finished, calls mhi_unprepare_from_transfer to
[all …]
/openbmc/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2x00crypto.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
21 switch (key->cipher) { in rt2x00crypto_key_to_cipher()
40 struct ieee80211_key_conf *hw_key = tx_info->control.hw_key; in rt2x00crypto_create_tx_descriptor()
45 __set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags); in rt2x00crypto_create_tx_descriptor()
47 txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key); in rt2x00crypto_create_tx_descriptor()
49 if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE) in rt2x00crypto_create_tx_descriptor()
50 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags); in rt2x00crypto_create_tx_descriptor()
52 txdesc->key_idx = hw_key->hw_key_idx; in rt2x00crypto_create_tx_descriptor()
53 txdesc->iv_offset = txdesc->header_length; in rt2x00crypto_create_tx_descriptor()
[all …]
/openbmc/linux/drivers/mtd/devices/
H A Dmchp23k256.c1 // SPDX-License-Identifier: GPL-2.0-only
51 for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8) in mchp23k256_addr2cmd()
57 return 1 + flash->caps->addr_width; in mchp23k256_cmdsz()
64 struct spi_transfer transfer[2] = {}; in mchp23k256_write() local
76 transfer[0].tx_buf = command; in mchp23k256_write()
77 transfer[0].len = cmd_len; in mchp23k256_write()
78 spi_message_add_tail(&transfer[0], &message); in mchp23k256_write()
80 transfer[1].tx_buf = buf; in mchp23k256_write()
81 transfer[1].len = len; in mchp23k256_write()
82 spi_message_add_tail(&transfer[1], &message); in mchp23k256_write()
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/openbmc/libpldm/include/libpldm/
H A Dfru.h1 /* SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later */
88 uint32_t fru_table_maximum_size; //!< The size of the largest FRU Record data
91 //!< Record Data structures
93 uint32_t checksum; //!< The integrity checksum on the FRU Record Table data
155 * Structure representing the FRU record data format
171 * @param[in] instance_id - Message's instance id
172 * @param[in,out] msg - Message will be written to this
173 * @param[in] payload_length - Length of the request message payload
182 /** @brief Decode GetFruRecordTable response data
188 * protocol layer error and all the out-parameters are invalid.
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/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
28 protocols. The transport protocols determine the method of data transmission
33 - Data-transfer: Each transfer is made of one or more words, using one or more
36 - Doorbell: Each transfer is made up of single bit flag, using any one of the
38 and the entire window shall be used in doorbell protocol. Optionally, data
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
175 #define STM32_SPI_MASTER_MODE(stm32_spi) (!(stm32_spi)->device_mode)
176 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
200 * @rx: SPI RX data register
201 * @tx: SPI TX data register
219 * struct stm32_spi_cfg - stm32 compatible configuration data
230 * number of data (if driver has this functionality)
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H A Dspi-mpc52xx.c1 // SPDX-License-Identifier: GPL-2.0-only
30 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
63 /* Driver internal data */
83 /* Details of current transfer (length, and buffer pointers) */
85 struct spi_transfer *transfer; /* current transfer */ member
86 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
103 if (ms->gpio_cs_count > 0) { in mpc52xx_spi_chipsel()
104 cs = spi_get_chipselect(ms->message->spi, 0); in mpc52xx_spi_chipsel()
105 gpiod_set_value(ms->gpio_cs[cs], value); in mpc52xx_spi_chipsel()
107 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08); in mpc52xx_spi_chipsel()
[all …]
H A Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
17 #include <linux/spi/spi-mem.h>
21 #include "spi-dw.h"
64 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
65 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
67 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
68 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
69 dws->regset.base = dws->regs; in dw_spi_debugfs_init()
70 debugfs_create_regset32("registers", 0400, dws->debugfs, &dws->regset); in dw_spi_debugfs_init()
[all …]
H A Dspi-stm32-qspi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/dma-mapping.h>
23 #include <linux/spi/spi-mem.h>
93 #define STM32_AUTOSUSPEND_DELAY -1
134 cr = readl_relaxed(qspi->io_base + QSPI_CR); in stm32_qspi_irq()
135 sr = readl_relaxed(qspi->io_base + QSPI_SR); in stm32_qspi_irq()
140 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
141 complete(&qspi->match_completion); in stm32_qspi_irq()
149 writel_relaxed(cr, qspi->io_base + QSPI_CR); in stm32_qspi_irq()
[all …]
/openbmc/linux/Documentation/networking/
H A Dplip.rst1 .. SPDX-License-Identifier: GPL-2.0
14 -----------------
17 This device interface allows a point-to-point connection between two
25 printer port. PLIP is a non-standard, but [can use] uses the standard
26 LapLink null-printer cable [can also work in turbo mode, with a PLIP
62 -------------------
72 PLIP driver is signaled whenever data is sent to it via the cable, such that
73 when no data is available, the driver isn't being used.
77 On these machines, the PLIP driver can be used in IRQ-less mode, where
78 the PLIP driver would constantly poll the parallel port for data waiting,
[all …]
/openbmc/linux/include/linux/spi/
H A Dspi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later
33 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
39 * struct spi_statistics - statistics for spi transfers
40 * @syncp: seqcount to protect members in this struct for per-cpu update
41 * on 32-bit systems
43 * @messages: number of spi-messages handled
59 * transfer bytes histogram
92 u64_stats_update_begin(&__lstats->syncp); \
93 u64_stats_add(&__lstats->field, count); \
94 u64_stats_update_end(&__lstats->syncp); \
[all …]
/openbmc/linux/drivers/i3c/master/mipi-i3c-hci/
H A Dxfer_mode_rate.h1 /* SPDX-License-Identifier: BSD-3-Clause */
7 * Transfer Mode/Rate Table definitions as found in extended capability
16 * Master Transfer Mode Table Fixed Indexes.
23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
29 * Transfer Mode Table Entry Bits Definitions
38 * Master Data Transfer Rate Selector Values.
44 * Data Transfer Rate Table. Indicated are typical rates. The actual
45 * rates may vary slightly and are also specified in the Data Transfer
[all …]
/openbmc/linux/fs/ntfs/
H A Dmst.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mst.c - NTFS multi sector transfer protection handling code. Part of the
4 * Linux-NTFS project.
6 * Copyright (c) 2001-2004 Anton Altaparmakov
12 * post_read_mst_fixup - deprotect multi sector transfer protected data
13 * @b: pointer to the data to deprotect
16 * Perform the necessary post read multi sector transfer fixup and detect the
17 * presence of incomplete multi sector transfers. - In that case, overwrite the
21 * Return 0 on success and -EINVAL on error ("BAAD" magic will be present).
34 usa_ofs = le16_to_cpu(b->usa_ofs); in post_read_mst_fixup()
[all …]
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_spi.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * [origin: Linux kernel include/asm-arm/arch-at91/at91_spi.h]
20 u32 rdr; /* 0x08 Receive Data Register */
21 u32 tdr; /* 0x0C Transmit Data Register */
27 u32 csr[4]; /* 0x30 Chip Select Register 0-3 */
38 #define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */
52 #define AT91_SPI_RDR 0x08 /* Receive Data Register */
53 #define AT91_SPI_RD (0xffff << 0) /* Receive Data */
56 #define AT91_SPI_TDR 0x0c /* Transmit Data Register */
57 #define AT91_SPI_TD (0xffff << 0) /* Transmit Data */
[all …]
/openbmc/linux/Documentation/arch/arm/stm32/
H A Dstm32-dma-mdma-chaining.rst1 .. SPDX-License-Identifier: GPL-2.0
4 STM32 DMA-MDMA chaining
9 ------------
11 This document describes the STM32 DMA-MDMA chaining feature. But before going
14 To offload data transfers from the CPU, STM32 microprocessors (MPUs) embed
28 STM32 DMA is mainly used to implement central data buffer storage (usually in
30 without the ability to generate convenient burst transfer ensuring the best
35 STM32 MDMA (Master DMA) is mainly used to manage direct data transfers between
36 RAM data buffers without CPU intervention. It can also be used in a
37 hierarchical structure that uses STM32 DMA as first level data buffer
[all …]
/openbmc/linux/arch/sh/drivers/pci/
H A Dpci-sh4.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #include "pci-sh7780.h"
10 #include "pci-sh7751.h"
40 #define SH4_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */
41 #define SH4_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */
45 #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
50 #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
54 #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
55 #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
57 #define SH4_PCICLR 0x120 /* Error Command/Data */
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
24 0x2: Source address pointer is incremented after each data transfer
25 0x3: Source address pointer is decremented after each data transfer
26 -bit 2-3: Destination increment mode
[all …]
/openbmc/linux/drivers/scsi/
H A Ddc395x.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 /* (SCSI chip set used Tekram ASIC TRM-S1040) */
175 /* cmd->result */
182 /* Inquiry Data format */
190 u8 RDF; /* AEN, TRMIOP, & response data format */
191 u8 AddLen; /* length of additional data */
217 /* Inquiry flag definitions (Inq data byte 7) */
221 #define SCSI_INQ_WBUS32 0x40 /* device supports 32 bit data xfers */
222 #define SCSI_INQ_WBUS16 0x20 /* device supports 16 bit data xfers */
250 #define SCSIXFERDONE 0x0800 /* SCSI SCSI transfer done */
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/openbmc/linux/drivers/char/xilinx_hwicap/
H A Dbuffer_icap.c24 * (c) Copyright 2003-2008 Xilinx Inc.
40 #define XHI_DEVICE_READ_ERROR -1
41 #define XHI_DEVICE_WRITE_ERROR -2
42 #define XHI_BUFFER_OVERFLOW_ERROR -3
47 /* Constants for checking transfer status */
53 /* Size of transfer, read & write */
57 /* Read not Configure, direction of transfer. Write only */
59 /* Indicates transfer complete. Read only */
73 * buffer_icap_get_status - Get the contents of the status register.
78 * D8 - cfgerr
[all …]
/openbmc/pldm/oem/ibm/libpldmresponder/
H A Dfile_io.hpp17 #include <phosphor-logging/lg2.hpp>
32 // The minimum data size of dma transfer in bytes
42 * Expose API to initiate transfer of data by DMA
44 * This class only exposes the public API transferDataHost to transfer data
51 /** @brief API to transfer data between BMC and host using DMA
53 * @param[in] path - pathname of the file to transfer data from or to
54 * @param[in] offset - offset in the file
55 * @param[in] length - length of the data to transfer
56 * @param[in] address - DMA address on the host
57 * @param[in] upstream - indicates direction of the transfer; true indicates
[all …]
/openbmc/linux/include/linux/hsi/
H A Dhsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
36 HSI_ARB_RR, /* Round-robin arbitration */
44 HSI_STATUS_COMPLETED, /* Message transfer is completed */
46 HSI_STATUS_PROCEEDING, /* Message transfer is ongoing */
48 HSI_STATUS_ERROR, /* Error when message transfer was ongoing */
58 * struct hsi_channel - channel resource used by the hsi clients
68 * struct hsi_config - Configuration for RX/TX HSI modules
90 * struct hsi_board_info - HSI client board info
96 * @platform_data: Platform related data
97 * @archdata: Architecture-dependent device data
[all …]
/openbmc/linux/drivers/usb/image/
H A Dmicrotek.c1 // SPDX-License-Identifier: GPL-2.0
5 * (C) Copyright 2000 Oliver Neukum <Oliver.Neukum@lrz.uni-muenchen.de>
7 * Parts shamelessly stolen from usb-storage and copyright by their
19 * commands and outgoing data are sent, and two input: 0x82 from which
20 * normal data is read from the scanner (in packets of maximum 32
36 * If there is data to receive:
38 * Read a lot of data from EP 0x83
40 * Read data from EP 0x82
42 * If there is data to transmit:
73 * 20000514 Fix reporting of non-existent devices to SCSI layer (john)
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