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/openbmc/qemu/tests/unit/
H A Dtest-thread-pool.c3 #include "block/thread-pool.h"
7 #include "qemu/error-report.h"
8 #include "qemu/main-loop.h"
11 static int active; variable
21 WorkerTestData *data = opaque; in worker_cb() local
22 return qatomic_fetch_inc(&data->n); in worker_cb()
27 WorkerTestData *data = opaque; in long_cb() local
28 if (qatomic_cmpxchg(&data->n, 0, 1) == 0) { in long_cb()
30 qatomic_or(&data->n, 2); in long_cb()
37 WorkerTestData *data = opaque; in done_cb() local
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H A Dtest-aio.c10 * See the COPYING.LIB file in the top-level directory.
18 #include "qemu/error-report.h"
19 #include "qemu/coroutine-core.h"
20 #include "qemu/main-loop.h"
27 int active; member
32 static void wait_until_inactive(EventNotifierTestData *data) in wait_until_inactive() argument
34 while (data->active > 0) { in wait_until_inactive()
58 BHTestData *data = opaque; in bh_test_cb() local
59 if (++data->n < data->max) { in bh_test_cb()
60 qemu_bh_schedule(data->bh); in bh_test_cb()
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/openbmc/linux/arch/mips/include/asm/octeon/
H A Dcvmx-spi.h7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
35 #include <asm/octeon/cvmx-gmxx-defs.h>
37 /* CSR typedefs have been moved to cvmx-csr-*.h */
62 /** Called for calendar data synchronization */
89 * can operate as a full duplex (both Tx and Rx data paths
90 * active) or as a halfplex (either the Tx data path is
91 * active or the Rx data path is active, but not both).
107 * can operate as a full duplex (both Tx and Rx data paths
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/openbmc/linux/drivers/gnss/
H A Dsirf.c1 // SPDX-License-Identifier: GPL-2.0
29 * If no data arrives for this time, we assume that the chip is off.
32 * low value. Also power saving settings (like send data only on movement)
47 bool active; member
58 static int sirf_serdev_open(struct sirf_data *data) in sirf_serdev_open() argument
62 mutex_lock(&data->serdev_mutex); in sirf_serdev_open()
63 if (++data->serdev_count == 1) { in sirf_serdev_open()
64 ret = serdev_device_open(data->serdev); in sirf_serdev_open()
66 data->serdev_count--; in sirf_serdev_open()
70 serdev_device_set_baudrate(data->serdev, data->speed); in sirf_serdev_open()
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/openbmc/linux/Documentation/devicetree/bindings/bus/
H A Dnvidia,tegra20-gmi.txt10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
20 - #size-cells: The number of cells used to represent the size of an address
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/openbmc/linux/drivers/acpi/
H A Dpci_link.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pci_link.c - ACPI PCI Interrupt Link Device Driver ($Revision: 34 $)
12 * for IRQ management (e.g. start()->_SRS).
52 * If a link is initialized, we never change its active and initialized
53 * later even the link is disable. Instead, we just repick the active irq
56 u32 active; /* Current IRQ */ member
75 static int sci_irq = -1, sci_penalty;
77 /* --------------------------------------------------------------------------
79 -------------------------------------------------------------------------- */
88 acpi_handle handle = link->device->handle; in acpi_pci_link_check_possible()
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/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 Video data pipelines usually consist of external devices, e.g. camera sensors,
16 video DMA engines and video data processors.
22 Data interfaces on all video devices are described by their child 'port' nodes.
23 Configuration of a port depends on other devices participating in the data
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H A Dallwinner,sun4i-a10-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
13 description: |-
20 - const: allwinner,sun4i-a10-csi1
21 - const: allwinner,sun7i-a20-csi0
22 - items:
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/openbmc/phosphor-mboxd/Documentation/
H A Dmbox_protocol.md7 http://www.apache.org/licenses/LICENSE-2.0
38 (the iLPC-to-AHB bridge) to directly manipulate the BMCs own flash controller.
58 system in some kind of data center, not only the host flash needs to be
71 "window" (which is the LPC -> AHB FW space mapping) that is either a read
76 actual flashing from the data in the RAM window.
78 The idea is to have the LPC FW space be routed to an active "window". That
118 The Autotools of this requires the autoconf-archive package for your
123 The Aspeed mailbox consists of 16 (8 bit) data registers see Layout for their
126 Interrupts can also be raised per write to each data register, for BMC and
128 each bit represents a data register and if an interrupt should fire on write.
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/openbmc/linux/drivers/media/platform/via/
H A Dvia-camera.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #define VCR_IC_EAV 0x0001 /* End of active video status */
8 #define VCR_IC_FBOTFLD 0x0004 /* "flipping" Bottom field is active */
9 #define VCR_IC_ACTBUF 0x0018 /* Active video buffer */
10 #define VCR_IC_VSYNC 0x0020 /* 0 = VB, 1 = active video */
11 #define VCR_IC_BOTFLD 0x0040 /* Bottom field is active */
13 #define VCR_IC_INTEN 0x0100 /* End of active video int. enable */
20 #define VCR_TSC_METHOD 0x00000c /* DMA method (non-functional) */
36 #define VCR_CI_HDMODE 0x00000040 /* CCIR656-16 hdr decode mode; 1=16b */
37 #define VCR_CI_BSWAP 0x00000080 /* Swap bytes (16-bit) */
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/openbmc/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-spi.c7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
34 #include <asm/octeon/cvmx-config.h>
36 #include <asm/octeon/cvmx-pko.h>
37 #include <asm/octeon/cvmx-spi.h>
39 #include <asm/octeon/cvmx-spxx-defs.h>
40 #include <asm/octeon/cvmx-stxx-defs.h>
41 #include <asm/octeon/cvmx-srxx-defs.h>
97 * can operate as a full duplex (both Tx and Rx data paths
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/openbmc/linux/drivers/hwtracing/stm/
H A Dheartbeat.c1 // SPDX-License-Identifier: GPL-2.0
25 struct stm_source_data data; member
27 unsigned int active; member
37 stm_source_write(&heartbeat->data, 0, str, sizeof str); in stm_heartbeat_hrtimer_handler()
38 if (heartbeat->active) in stm_heartbeat_hrtimer_handler()
41 return heartbeat->active ? HRTIMER_RESTART : HRTIMER_NORESTART; in stm_heartbeat_hrtimer_handler()
44 static int stm_heartbeat_link(struct stm_source_data *data) in stm_heartbeat_link() argument
47 container_of(data, struct stm_heartbeat, data); in stm_heartbeat_link()
49 heartbeat->active = 1; in stm_heartbeat_link()
50 hrtimer_start(&heartbeat->hrtimer, ms_to_ktime(interval_ms), in stm_heartbeat_link()
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/openbmc/u-boot/doc/device-tree-bindings/video/
H A Ddisplay-timing.txt1 display-timing bindings
4 display-timings node
5 --------------------
8 - none
11 - native-mode: The native mode for the display, in case multiple modes are
15 --------------
18 - hactive, vactive: display resolution
19 - hfront-porch, hback-porch, hsync-len: horizontal display timing parameters
21 vfront-porch, vback-porch, vsync-len: vertical display timing parameters in
23 - clock-frequency: display clock in Hz
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/openbmc/linux/drivers/net/wwan/iosm/
H A Diosm_ipc_pm.h1 /* SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2020-21 Intel Corporation.
9 /* Trigger the doorbell interrupt on cp to change the PM sleep/active status */
10 #define ipc_cp_irq_sleep_control(ipc_pcie, data) \ argument
11 ipc_doorbell_fire(ipc_pcie, IPC_DOORBELL_IRQ_SLEEP, data)
14 #define ipc_cp_irq_hpda_update(ipc_pcie, data) \ argument
15 ipc_doorbell_fire(ipc_pcie, IPC_DOORBELL_IRQ_HPDA, 0xFF & (data))
18 * union ipc_pm_cond - Conditions for D3 and the sleep message to CP.
35 * enum ipc_mem_host_pm_state - Possible states of the HOST SLEEP finite state
37 * @IPC_MEM_HOST_PM_ACTIVE: Host is active
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/openbmc/linux/arch/s390/appldata/
H A Dappldata_base.c1 // SPDX-License-Identifier: GPL-2.0
3 * Base infrastructure for Linux-z/VM Monitor Stream, Stage 1.
5 * data gathering modules.
99 static void appldata_timer_function(unsigned long data) in appldata_timer_function() argument
101 queue_work(appldata_wq, (struct work_struct *) data); in appldata_timer_function()
107 * call data gathering function for each (active) module
117 if (ops->active == 1) { in appldata_work_fn()
118 ops->callback(ops->data); in appldata_work_fn()
146 rc = -ENOMEM; in appldata_diag()
148 id->record_nr = record_nr; in appldata_diag()
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/openbmc/linux/Documentation/devicetree/bindings/display/panel/
H A Dpanel-timing.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Sam Ravnborg <sam@ravnborg.org>
14 There are different ways of describing the timing data of a panel. The
20 +-------+----------+-------------------------------------+----------+
24 +-------+----------+-------------------------------------+----------+
28 +-------+----------#######################################----------+
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/openbmc/phosphor-ipmi-flash/bmc/firmware-handler/
H A Dfirmware_handler.cpp8 * http://www.apache.org/licenses/LICENSE-2.0
19 #include "data.hpp"
25 #include <blobs-ipmid/blobs.hpp>
75 /* Check if the path is in our supported list (or active list). */
85 * list as "/flash/active/image", and if the hash has started,
86 * "/flash/active/hash" regardless of mechanism. This is done in the open
124 * Stat on an active file or hash will return information such as the size
125 * of the data cached, and any additional pertinent information. The
126 * blob_state on the active files will return the state of the update.
135 * but are not stat-able as-is. in stat()
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/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
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H A Dovti,ov772x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
20 - ovti,ov7720
21 - ovti,ov7725
29 reset-gpios:
31 Reference to the GPIO connected to the RSTB pin which is active low.
34 powerdown-gpios:
36 Reference to the GPIO connected to the PWDN pin which is active high.
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/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
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/openbmc/linux/drivers/xen/
H A Dpvcalls-front.c1 // SPDX-License-Identifier: GPL-2.0-or-later
18 #include "pvcalls-front.h"
66 struct pvcalls_data data; member
71 } active; member
74 * Socket status, needs to be 64-bit aligned due to the
82 * Internal state-machine flags.
85 * flags needs to be 64-bit aligned due to the test_and_*
104 dev_get_drvdata(&pvcalls_front_dev->dev) == NULL) in pvcalls_enter_sock()
105 return ERR_PTR(-ENOTCONN); in pvcalls_enter_sock()
107 map = (struct sock_mapping *)sock->sk->sk_send_head; in pvcalls_enter_sock()
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/openbmc/linux/include/media/i2c/
H A Dtvp7002.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
6 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
19 * struct tvp7002_config - Platform dependent data
21 * 0 - Data clocked out on rising edge of DATACLK signal
22 * 1 - Data clocked out on falling edge of DATACLK signal
24 * 0 - Active low HSYNC output, 1 - Active high HSYNC output
26 * 0 - Active low VSYNC output, 1 - Active high VSYNC output
27 *@fid_polarity: Active-high Field ID polarity.
28 * 0 - The field ID output is set to logic 1 for an odd field
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/openbmc/qemu/tests/qemu-iotests/
H A D234.out11 {"data": {"status": "setup"}, "event": "MIGRATION", "timestamp": {"microseconds": "USECS", "seconds…
12 {"data": {"status": "active"}, "event": "MIGRATION", "timestamp": {"microseconds": "USECS", "second…
13 {"data": {"status": "completed"}, "event": "MIGRATION", "timestamp": {"microseconds": "USECS", "sec…
14 {"data": {"status": "active"}, "event": "MIGRATION", "timestamp": {"microseconds": "USECS", "second…
15 {"data": {"status": "completed"}, "event": "MIGRATION", "timestamp": {"microseconds": "USECS", "sec…
20 Add a second parent to drive0-file...
22 Restart A with -incoming and second parent...
28 {"data": {"status": "setup"}, "event": "MIGRATION", "timestamp": {"microseconds": "USECS", "seconds…
29 {"data": {"status": "active"}, "event": "MIGRATION", "timestamp": {"microseconds": "USECS", "second…
30 {"data": {"status": "completed"}, "event": "MIGRATION", "timestamp": {"microseconds": "USECS", "sec…
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/openbmc/openpower-hw-diags/analyzer/plugins/
H A Dp10-tod-plugins.cpp16 /** Each chip is connected to two TOD topologies: active and backup. The values
22 ACTIVE = 0, enumerator
33 class Data class
36 Data() = default;
37 ~Data() = default;
38 Data(const Data&) = default;
39 Data(Data&&) = default;
40 Data& operator=(const Data&) = default;
41 Data& operator=(Data&&) = default;
50 /** The chips sourcing the clocks to non-MDMT chips with faults. */
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