/openbmc/linux/Documentation/devicetree/bindings/mfd/ |
H A D | google,cros-ec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Benson Leung <bleung@chromium.org> 11 - Guenter Roeck <groeck@chromium.org> 14 Google's ChromeOS EC is a microcontroller which talks to the AP and 16 The EC can be connected through various interfaces (I2C, SPI, and others) 22 - description: 23 For implementations of the EC connected through I2C. [all …]
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/openbmc/linux/Documentation/devicetree/bindings/regulator/ |
H A D | google,cros-ec-regulator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/regulator/google,cros-ec-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ChromeOS EC controlled voltage regulators 10 - Pi-Hsun Shih <pihsun@chromium.org> 13 Any property defined as part of the core regulator binding, defined in 14 regulator.yaml, can also be used. 17 - $ref: regulator.yaml# 21 const: google,cros-ec-regulator [all …]
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/openbmc/u-boot/arch/arm/dts/ |
H A D | rk3288-veyron-chromebook.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/clock/rockchip,rk808.h> 9 #include <dt-bindings/input/input.h> 10 #include "rk3288-veyron.dtsi" 19 gpio_keys: gpio-keys { 20 pinctrl-0 = <&pwr_key_h &ap_lid_int_l>; 25 linux,input-type = <5>; /* EV_SW */ 26 debounce-interval = <1>; 27 gpio-key,wakeup; 31 gpio-charger { [all …]
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H A D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * SAMSUNG/GOOGLE Peach-Pit board device tree source 9 /dts-v1/; 14 cpu-model = "Exynos5800"; 16 compatible = "google,pit-rev#", "google,pit", 20 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; 21 hwid = "PIT TEST A-A 7848"; 22 lazy-init = <1>; 33 compatible = "pwm-backlight"; 35 brightness-levels = <0 100 500 1000 1500 2000 2500 2800>; [all …]
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H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 14 u-boot,dm-pre-reloc; 15 stdout-path = "serial2:115200n8"; 16 u-boot,spl-boot-order = &spi_flash; 20 u-boot,spl-payload-offset = <0x40000>; 29 * - Rails that only connect to the EC (or devices that the EC talks to) 31 * - Rails _are_ included if the rails go to the AP even if the AP [all …]
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H A D | exynos5420-peach-pit.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * SAMSUNG/GOOGLE Peach-Pit board device tree source 9 /dts-v1/; 11 #include <dt-bindings/clock/maxim,max77802.h> 12 #include <dt-bindings/regulator/maxim,max77802.h> 17 compatible = "google,pit-rev#", "google,pit", 21 google,bad-wake-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>; 22 hwid = "PIT TEST A-A 7848"; 23 lazy-init = <1>; 34 compatible = "pwm-backlight"; [all …]
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H A D | rk3399-gru-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Chromebook shared properties 8 #include "rk3399-gru.dtsi" 11 pp900_ap: pp900-ap { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp900_ap"; 15 /* EC turns on w/ pp900_ap_en; always on for AP */ 16 regulator-always-on; 17 regulator-boot-on; 18 regulator-min-microvolt = <900000>; [all …]
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H A D | tegra124-nyan.dtsi | 1 #include <dt-bindings/input/input.h> 19 vdd-supply = <&vdd_3v3_hdmi>; 20 pll-supply = <&vdd_hdmi_pll>; 21 hdmi-supply = <&vdd_5v0_hdmi>; 23 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 24 nvidia,hpd-gpio = 36 vdd-supply = <&vdd_3v3_panel>; 52 clock-frequency = <100000>; 54 acodec: audio-codec@10 { 57 interrupt-parent = <&gpio>; [all …]
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H A D | exynos5250-snow.dts | 12 /dts-v1/; 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 15 #include <dt-bindings/input/input.h> 51 stdout-path = "serial3:115200n8"; 59 samsung,bl1-offset = <0x1400>; 60 samsung,bl2-offset = <0x3400>; 61 u-boot-memory = "/memory"; 62 u-boot-offset = <0x3e00000 0x100000>; 67 #address-cells = <1>; [all …]
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H A D | exynos5250-spring.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/input/input.h> 48 samsung,bl1-offset = <0x1400>; 49 samsung,bl2-offset = <0x3400>; 50 u-boot-memory = "/memory"; 51 u-boot-offset = <0x3e00000 0x100000>; 56 #address-cells = <1>; [all …]
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/openbmc/linux/arch/arm/boot/dts/rockchip/ |
H A D | rk3288-veyron-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/clock/rockchip,rk808.h> 10 #include <dt-bindings/input/input.h> 11 #include "rk3288-veyron.dtsi" 12 #include "rk3288-veyron-analog-audio.dtsi" 13 #include "rk3288-veyron-edp.dtsi" 14 #include "rk3288-veyron-sdmmc.dtsi" 22 gpio-charger { 23 compatible = "gpio-charger"; 24 charger-type = "mains"; [all …]
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 32 power-supply = <&ppvar_sys>; [all …]
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H A D | mt8192-asurada.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/spmi/spmi.h> 25 stdout-path = "serial0:115200n8"; 33 backlight_lcd0: backlight-lcd0 { 34 compatible = "pwm-backlight"; 36 power-supply = <&ppvar_sys>; 37 enable-gpios = <&pio 152 0>; 38 brightness-levels = <0 1023>; [all …]
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H A D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_pp5000>; 28 enable-gpios = <&pio 176 0>; 29 brightness-levels = <0 1023>; 30 num-interpolated-steps = <1023>; 31 default-brightness-level = <576>; [all …]
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H A D | mt8183-kukui-jacuzzi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include "mt8183-kukui.dtsi" 7 /* Must come after mt8183-kukui.dtsi to modify cros_ec */ 8 #include <arm/cros-ec-keyboard.dtsi> 11 pp1000_mipibrdg: pp1000-mipibrdg { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp1000_mipibrdg"; 14 regulator-min-microvolt = <1000000>; 15 regulator-max-microvolt = <1000000>; 16 pinctrl-names = "default"; [all …]
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/openbmc/linux/arch/arm64/boot/dts/qcom/ |
H A D | sc7280-herobrine.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 16 #include <dt-bindings/input/gpio-keys.h> 17 #include <dt-bindings/input/input.h> 18 #include <dt-bindings/leds/common.h> 20 #include "sc7280-qcard.dtsi" 21 #include "sc7280-chrome-common.dtsi" 25 stdout-path = "serial0:115200n8"; 38 ppvar_sys: ppvar-sys-regulator { 39 compatible = "regulator-fixed"; 40 regulator-name = "ppvar_sys"; [all …]
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H A D | sc7180-trogdor.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/gpio-keys.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/leds/common.h> 12 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 13 #include <dt-bindings/sound/sc7180-lpass.h> 16 #include "sc7180-firmware-tfa.dtsi" 22 thermal-zones { 23 charger_thermal: charger-thermal { [all …]
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H A D | sdm845-cheza.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 25 stdout-path = "serial0:115200n8"; 29 compatible = "pwm-backlight"; 31 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; 32 power-supply = <&ppvar_sys>; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&ap_edp_bklten>; 37 /* FIXED REGULATORS - parents above children */ [all …]
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/openbmc/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 5 * Copyright 2016-2017 Google, Inc 8 #include <dt-bindings/input/input.h> 10 #include "rk3399-op1-opp.dtsi" 19 stdout-path = "serial2:115200n8"; 28 * - Rails that only connect to the EC (or devices that the EC talks to) 30 * - Rails _are_ included if the rails go to the AP even if the AP 36 * view, though, we won't create a full fixed regulator. We'll just 39 * - The EC controls the enable and the EC always enables a rail as 41 * - The rails are actually connected to each other by a jumper and [all …]
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H A D | rk3399-gru-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Google Gru-Chromebook shared properties 8 #include "rk3399-gru.dtsi" 11 pp900_ap: pp900-ap { 12 compatible = "regulator-fixed"; 13 regulator-name = "pp900_ap"; 15 /* EC turns on w/ pp900_ap_en; always on for AP */ 16 regulator-always-on; 17 regulator-boot-on; 18 regulator-min-microvolt = <900000>; [all …]
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/openbmc/linux/drivers/regulator/ |
H A D | cros-ec-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 #include <linux/regulator/driver.h> 10 #include <linux/regulator/machine.h> 11 #include <linux/regulator/of_regulator.h> 29 .index = data->index, in cros_ec_regulator_enable() 33 return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_ENABLE, &cmd, in cros_ec_regulator_enable() 41 .index = data->index, in cros_ec_regulator_disable() 45 return cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_ENABLE, &cmd, in cros_ec_regulator_disable() 53 .index = data->index, in cros_ec_regulator_is_enabled() 58 ret = cros_ec_cmd(data->ec_dev, 0, EC_CMD_REGULATOR_IS_ENABLED, &cmd, in cros_ec_regulator_is_enabled() [all …]
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra124-nyan.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 14 stdout-path = "serial0:115200n8"; 20 * missing a unit-address. However, the bootloader on these Chromebook 22 * Adding the unit-address causes the bootloader to create a /memory 34 /delete-node/ memory@80000000; 40 vdd-supply = <&vdd_3v3_hdmi>; 41 pll-supply = <&vdd_hdmi_pll>; 42 hdmi-supply = <&vdd_5v0_hdmi>; [all …]
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/openbmc/linux/drivers/platform/chrome/ |
H A D | cros_ec.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * ChromeOS EC multi-function device 7 * The ChromeOS EC multi function device is used to mux all the requests 8 * to the EC device for its multiple features: keyboard controller, 9 * battery charging and regulator control, firmware update. 34 * cros_ec_irq_handler() - top half part of the interrupt handler 44 ec_dev->last_event_time = cros_ec_get_time_ns(); in cros_ec_irq_handler() 50 * cros_ec_handle_event() - process and forward pending events on EC 53 * Call this function in a loop when the kernel is notified that the EC has 72 if (wake_event && device_may_wakeup(ec_dev->dev)) in cros_ec_handle_event() [all …]
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5800-peach-pi.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pi-rev16", [all …]
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H A D | exynos5420-peach-pit.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pit-rev16", [all …]
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