Home
last modified time | relevance | path

Searched +full:cpu +full:- +full:syscon (Results 1 – 25 of 121) sorted by relevance

12345

/openbmc/u-boot/arch/arm/dts/
H A Dkeystone-k2hk.dtsi2 * Copyright 2013-2014 Texas Instruments, Inc.
13 #address-cells = <1>;
14 #size-cells = <0>;
16 interrupt-parent = <&gic>;
18 cpu@0 {
19 compatible = "arm,cortex-a15";
20 device_type = "cpu";
24 cpu@1 {
25 compatible = "arm,cortex-a15";
26 device_type = "cpu";
[all …]
H A Dmt7623.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt7623-clk.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/mt7623-power.h>
13 #include <dt-bindings/reset/mtk-reset.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Dmt7629.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt7629-clk.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/mt7629-power.h>
13 #include <dt-bindings/reset/mtk-reset.h>
18 interrupt-parent = <&sysirq>;
19 #address-cells = <1>;
20 #size-cells = <1>;
[all …]
H A Dkeystone-k2l.dtsi13 #address-cells = <1>;
14 #size-cells = <0>;
16 interrupt-parent = <&gic>;
18 cpu@0 {
19 compatible = "arm,cortex-a15";
20 device_type = "cpu";
24 cpu@1 {
25 compatible = "arm,cortex-a15";
26 device_type = "cpu";
32 /include/ "keystone-k2l-clocks.dtsi"
[all …]
H A Dhi6220.dtsi7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/hi6220-clock.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 compatible = "arm,psci-0.2";
22 #address-cells = <2>;
23 #size-cells = <0>;
25 cpu-map {
28 cpu = <&cpu0>;
[all …]
H A Ddra74x.dtsi2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
16 cpu@1 {
17 device_type = "cpu";
18 compatible = "arm,cortex-a15";
20 operating-points-v2 = <&cpu0_opp_table>;
25 compatible = "arm,cortex-a15-pmu";
26 interrupt-parent = <&wakeupgen>;
33 compatible = "syscon";
42 #address-cells = <1>;
43 #size-cells = <1>;
[all …]
H A Drk3399.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd.
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
H A Duniphier-ld11.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/uniphier-gpio.h>
14 compatible = "socionext,uniphier-ld11";
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <0>;
23 cpu-map {
[all …]
H A Drk3368.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/clock/rk3368-cru.h>
44 #include <dt-bindings/gpio/gpio.h>
45 #include <dt-bindings/interrupt-controller/irq.h>
46 #include <dt-bindings/interrupt-controller/arm-gic.h>
47 #include <dt-bindings/pinctrl/rockchip.h>
48 #include <dt-bindings/thermal/thermal.h>
49 #include <dt-bindings/memory/rk3368-dmc.h>
53 interrupt-parent = <&gic>;
54 #address-cells = <2>;
[all …]
/openbmc/u-boot/arch/arm/cpu/arm920t/ep93xx/
H A Dcpu.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Cirrus Logic EP93xx CPU-specific support.
8 * Cory T. Tusar, Videon Central, Inc., <ctusar@videon-central.com>
15 /* We reset the CPU by generating a 1-->0 transition on DeviceCfg bit 31. */
18 struct syscon_regs *syscon = (struct syscon_regs *)SYSCON_BASE; in reset_cpu() local
22 writel(0xAA, &syscon->sysswlock); in reset_cpu()
23 value = readl(&syscon->devicecfg); in reset_cpu()
25 writel(value, &syscon->devicecfg); in reset_cpu()
28 writel(0xAA, &syscon->sysswlock); in reset_cpu()
29 value = readl(&syscon->devicecfg); in reset_cpu()
[all …]
/openbmc/u-boot/arch/mips/dts/
H A Dbrcm,bcm3380.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm3380-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/reset/bcm3380-reset.h>
20 #address-cells = <1>;
21 #size-cells = <0>;
22 u-boot,dm-pre-reloc;
24 cpu@0 {
25 compatible = "brcm,bcm3380-cpu", "mips,mips4Kc";
26 device_type = "cpu";
[all …]
H A Dbrcm,bcm6328.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6328-clock.h>
7 #include <dt-bindings/dma/bcm6328-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6328-power-domain.h>
10 #include <dt-bindings/reset/bcm6328-reset.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
24 u-boot,dm-pre-reloc;
26 cpu@0 {
[all …]
H A Dbrcm,bcm6368.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6368-clock.h>
7 #include <dt-bindings/dma/bcm6368-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6368-reset.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
23 u-boot,dm-pre-reloc;
25 cpu@0 {
26 compatible = "brcm,bcm6368-cpu", "mips,mips4Kc";
[all …]
H A Dmscc,serval.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
15 cpu@0 {
17 device_type = "cpu";
27 cpuintc: interrupt-controller@0 {
28 #address-cells = <0>;
29 #interrupt-cells = <1>;
[all …]
H A Dmscc,servalt.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
15 cpu@0 {
17 device_type = "cpu";
27 cpuintc: interrupt-controller@0 {
28 #address-cells = <0>;
29 #interrupt-cells = <1>;
[all …]
H A Dbrcm,bcm6338.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6338-clock.h>
7 #include <dt-bindings/dma/bcm6338-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6338-reset.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
23 u-boot,dm-pre-reloc;
25 cpu@0 {
26 compatible = "brcm,bcm6338-cpu", "mips,mips4Kc";
[all …]
H A Dbrcm,bcm6838.dtsi1 // SPDX-License-Identifier: GPL-2.0+
13 #address-cells = <1>;
14 #size-cells = <0>;
15 u-boot,dm-pre-reloc;
17 cpu@0 {
18 compatible = "brcm,bcm6838-cpu", "mips,mips4Kc";
19 device_type = "cpu";
21 u-boot,dm-pre-reloc;
24 cpu@1 {
25 compatible = "brcm,bcm6838-cpu", "mips,mips4Kc";
[all …]
H A Dbrcm,bcm6362.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6362-clock.h>
7 #include <dt-bindings/dma/bcm6362-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6362-power-domain.h>
10 #include <dt-bindings/reset/bcm6362-reset.h>
23 #address-cells = <1>;
24 #size-cells = <0>;
25 u-boot,dm-pre-reloc;
27 cpu@0 {
[all …]
H A Dbrcm,bcm6358.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6358-clock.h>
7 #include <dt-bindings/dma/bcm6358-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6358-reset.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
23 u-boot,dm-pre-reloc;
25 cpu@0 {
26 compatible = "brcm,bcm6358-cpu", "mips,mips4Kc";
[all …]
H A Dmt7628a.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
12 cpu@0 {
14 device_type = "cpu";
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
[all …]
H A Dmscc,jr2.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
15 cpu@0 {
17 device_type = "cpu";
27 cpuintc: interrupt-controller@0 {
28 #address-cells = <0>;
29 #interrupt-cells = <1>;
[all …]
H A Dbrcm,bcm63268.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm63268-clock.h>
7 #include <dt-bindings/dma/bcm63268-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm63268-power-domain.h>
10 #include <dt-bindings/reset/bcm63268-reset.h>
23 #address-cells = <1>;
24 #size-cells = <0>;
25 u-boot,dm-pre-reloc;
27 cpu@0 {
[all …]
H A Dbrcm,bcm6348.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6348-clock.h>
7 #include <dt-bindings/dma/bcm6348-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/reset/bcm6348-reset.h>
21 #address-cells = <1>;
22 #size-cells = <0>;
23 u-boot,dm-pre-reloc;
25 cpu@0 {
26 compatible = "brcm,bcm6348-cpu", "mips,mips4Kc";
[all …]
H A Dbrcm,bcm6318.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/bcm6318-clock.h>
7 #include <dt-bindings/dma/bcm6318-dma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/power-domain/bcm6318-power-domain.h>
10 #include <dt-bindings/reset/bcm6318-reset.h>
22 #address-cells = <1>;
23 #size-cells = <0>;
24 u-boot,dm-pre-reloc;
26 cpu@0 {
[all …]
H A Dmscc,ocelot.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
15 cpu@0 {
17 device_type = "cpu";
27 cpuintc: interrupt-controller@0 {
28 #address-cells = <0>;
29 #interrupt-cells = <1>;
[all …]

12345