| /openbmc/qemu/system/ |
| H A D | memory_mapping.c | 10 * See the COPYING file in the top-level directory.
20 #include "system/address-spaces.h"
21 #include "hw/core/cpu.h"
30 QTAILQ_FOREACH(p, &list->head, next) { in memory_mapping_list_add_mapping_sorted()
31 if (p->phys_addr >= mapping->phys_addr) { in memory_mapping_list_add_mapping_sorted()
36 QTAILQ_INSERT_TAIL(&list->head, mapping, next); in memory_mapping_list_add_mapping_sorted()
47 memory_mapping->phys_addr = phys_addr; in create_new_memory_mapping()
48 memory_mapping->virt_addr = virt_addr; in create_new_memory_mapping()
49 memory_mapping->length = length; in create_new_memory_mapping()
50 list->last_mapping = memory_mapping; in create_new_memory_mapping()
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| H A D | physmem.c | 21 #include "exec/page-vary.h"
31 #include "accel/tcg/cpu-ops.h"
36 #include "exec/page-protection.h"
38 #include "exec/translation-block.h"
39 #include "hw/qdev-core.h"
40 #include "hw/qdev-properties.h"
47 #include "qemu/config-file.h"
48 #include "qemu/error-report.h"
49 #include "qemu/qemu-print.h"
58 #include "system/xen-mapcache.h"
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| /openbmc/qemu/contrib/elf2dmp/ |
| H A D | qemu_elf.c | 9 #include "qemu/host-utils.h"
16 #define ROUND_UP(n, d) (((n) + (d) - 1) & -(0 ? (n) : (d)))
21 return s->gs.base >> 63; in is_system()
24 Elf64_Phdr *elf64_getphdr(void *map) in elf64_getphdr() argument
26 Elf64_Ehdr *ehdr = map; in elf64_getphdr()
27 Elf64_Phdr *phdr = (void *)((uint8_t *)map + ehdr->e_phoff); in elf64_getphdr()
32 Elf64_Half elf_getphdrnum(void *map) in elf_getphdrnum() argument
34 Elf64_Ehdr *ehdr = map; in elf_getphdrnum()
36 return ehdr->e_phnum; in elf_getphdrnum()
43 if (uadd64_overflow(offset, size, &offset) || offset > UINT64_MAX - 3) { in advance_note_offset()
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | armada-385.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
23 cpu@0 {
24 device_type = "cpu";
25 compatible = "arm,cortex-a9";
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| H A D | armada-xp-mv78460.dtsi | 6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8 * This file is dual-licensed: you can use it either under the terms
50 #include "armada-xp.dtsi"
54 compatible = "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
64 #address-cells = <1>;
65 #size-cells = <0>;
66 enable-method = "marvell,armada-xp-smp";
68 cpu@0 {
69 device_type = "cpu";
70 compatible = "marvell,sheeva-v7";
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| H A D | armada-xp-mv78230.dtsi | 6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8 * This file is dual-licensed: you can use it either under the terms
50 #include "armada-xp.dtsi"
54 compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
62 #address-cells = <1>;
63 #size-cells = <0>;
64 enable-method = "marvell,armada-xp-smp";
66 cpu@0 {
67 device_type = "cpu";
68 compatible = "marvell,sheeva-v7";
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| H A D | keystone-k2e.dtsi | 2 * Copyright 2013-2014 Texas Instruments, Inc.
13 #address-cells = <1>;
14 #size-cells = <0>;
16 interrupt-parent = <&gic>;
18 cpu@0 {
19 compatible = "arm,cortex-a15";
20 device_type = "cpu";
24 cpu@1 {
25 compatible = "arm,cortex-a15";
26 device_type = "cpu";
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| H A D | armada-380.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 #include "armada-38x.dtsi"
19 #address-cells = <1>;
20 #size-cells = <0>;
21 enable-method = "marvell,armada-380-smp";
23 cpu@0 {
24 device_type = "cpu";
25 compatible = "arm,cortex-a9";
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| H A D | armada-xp-mv78260.dtsi | 6 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
8 * This file is dual-licensed: you can use it either under the terms
50 #include "armada-xp.dtsi"
54 compatible = "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
63 #address-cells = <1>;
64 #size-cells = <0>;
65 enable-method = "marvell,armada-xp-smp";
67 cpu@0 {
68 device_type = "cpu";
69 compatible = "marvell,sheeva-v7";
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| /openbmc/smbios-mdr/src/ |
| H A D | cpu.cpp | 8 // http://www.apache.org/licenses/LICENSE-2.0
17 #include "cpu.hpp"
20 #include <map>
27 void Cpu::socket(const uint8_t positionNum, const uint8_t structLen, in socket()
38 void Cpu::family(const uint8_t family, const uint16_t family2) in family()
40 std::map<uint8_t, const char*>::const_iterator it = in family()
46 else if (it->first == processorFamily2Indicator) in family()
48 std::map<uint16_t, const char*>::const_iterator it2 = in family()
56 processor::family(it2->second); in family()
62 processor::family(it->second); in family()
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| /openbmc/u-boot/doc/ |
| H A D | README.mpc85xxcds | 2 --------------------------
5 "Arcadia", a PCI-form-factor carrier card that plugs into a PCI slot,
6 and a CPU daughter card that bolts onto the daughter card.
10 the switch nomenclature, and the basis for the memory map. There are
14 Building U-Boot
15 ---------------
18 chip. You need to use binutils-2.14.tar.bz2 (or newer) from
22 gcc (GCC) 3.2.2 20030217 (Yellow Dog Linux 3.0 3.2.2-2a)
25 Memory Map
26 ----------
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| /openbmc/qemu/target/arm/ |
| H A D | cpu64.c | 2 * QEMU AArch64 CPU
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "cpu.h"
34 #include "hw/qdev-properties.h"
36 #include "cpu-features.h"
44 #include "cpu-sysregs.h.inc"
54 #include "cpu-sysregs.h.inc" in get_sysreg_idx()
61 void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp) in arm_cpu_sve_finalize() argument
65 * then all other lengths are implicitly disabled. If sve-max-vq is in arm_cpu_sve_finalize()
69 * are enabled and sve-max-vq is not specified, then all lengths not in arm_cpu_sve_finalize()
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| H A D | kvm_arm.h | 2 * QEMU KVM support -- ARM specific functions.
7 * See the COPYING file in the top-level directory.
15 #include "target/arm/cpu-qom.h"
31 * @devid should be the ID of the device as defined by the arm-vgic device
32 * in the device control API. The machine model may map and unmap the device
41 * @cpu: ARMCPU
52 * Note that we do not stop early on failure -- we will attempt
55 bool write_list_to_kvmstate(ARMCPU *cpu, int level);
59 * @cpu: ARMCPU
68 * Note that we do not stop early on failure -- we will attempt
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| /openbmc/qemu/hw/loongarch/ |
| H A D | virt-fdt-build.c | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include "qemu/error-report.h"
7 #include "qemu/guest-random.h"
10 #include "hw/core/sysbus-fdt.h"
14 #include "hw/pci-host/gpex.h"
15 #include "hw/pci-host/ls7a.h"
18 #include "target/loongarch/cpu.h"
25 ms->fdt = create_device_tree(&lvms->fdt_size); in create_fdt()
26 if (!ms->fdt) { in create_fdt()
32 qemu_fdt_setprop_string(ms->fdt, "/", "compatible", in create_fdt()
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| H A D | boot.c | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
10 #include "target/loongarch/cpu.h"
14 #include "qemu/error-report.h"
54 0x02fffc0c, /* addi.d $t0, $r0,-1(0xfff) */
65 0x43fff59f, /* beqz $t0, -12(0x7ffff4) # 48 <.L11> */
103 guidcpy(&systab->tables[0].guid, &tbl_guid); in init_efi_boot_memmap()
104 systab->tables[0].table = (struct efi_configuration_table *)(p - start); in init_efi_boot_memmap()
105 systab->nr_tables = 1; in init_efi_boot_memmap()
107 boot_memmap->desc_size = sizeof(efi_memory_desc_t); in init_efi_boot_memmap()
108 boot_memmap->desc_ver = 1; in init_efi_boot_memmap()
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| /openbmc/openpower-vpd-parser/vpd-manager/include/ |
| H A D | worker.hpp | 46 * @param[in] pathToConfigJSON - Path to the config JSON, if applicable.
47 * @param[in] i_maxThreadCount - Maximum thread while collecting FRUs VPD.
48 * @param[in] i_vpdCollectionMode - Mode in which VPD collection should take
79 * @param[in] i_vpdFilePath - Path to the VPD file.
86 * Note: Call this API to populate D-Bus. Also caller should handle empty
89 * @param[in] parsedVpdMap - Parsed VPD as a map.
90 * @param[out] objectInterfaceMap - Object and its interfaces map.
91 * @param[in] vpdFilePath - EEPROM path of FRU.
100 * @param[in] i_dbusObjPath - Dbus object path of the FRU.
109 * @return - True when done, false otherwise.
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| /openbmc/qemu/linux-user/arm/ |
| H A D | target_cpu.h | 2 * ARM specific CPU ABI and functions for linux-user
24 ARMCPU *cpu = ARM_CPU(cs); in arm_max_reserved_va() local
26 if (arm_feature(&cpu->env, ARM_FEATURE_M)) { in arm_max_reserved_va()
29 * and in general a lot of M-profile system stuff in in arm_max_reserved_va()
30 * the high addresses. Restrict linux-user to the in arm_max_reserved_va()
31 * cached write-back RAM in the system map. in arm_max_reserved_va()
36 * We need to be able to map the commpage. in arm_max_reserved_va()
37 * See init_guest_commpage in linux-user/elfload.c. in arm_max_reserved_va()
48 env->regs[13] = newsp; in cpu_clone_regs_child()
50 env->regs[0] = 0; in cpu_clone_regs_child()
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| /openbmc/phosphor-health-monitor/ |
| H A D | health_metric_config.hpp | 8 #include <map>
20 cpu, enumerator
29 // CPU subtypes
43 auto to_string(Type) -> std::string;
44 auto to_string(SubType) -> std::string;
58 std::map<std::tuple<ThresholdIntf::Type, ThresholdIntf::Bound>,
83 using map_t = std::map<Type, std::vector<HealthMetric>>;
94 auto getHealthMetricConfigs() -> HealthMetric::map_t;
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| /openbmc/openbmc/poky/meta/recipes-core/glibc/glibc/ |
| H A D | 0001-Propagate-ffile-prefix-map-from-CFLAGS-to-ASFLAGS.patch | 3 Date: Wed, 16 Apr 2025 19:51:01 -0700
4 Subject: [PATCH] Propagate -ffile-prefix-map from CFLAGS to ASFLAGS.
6 Upstream-Status: Submitted [https://sourceware.org/pipermail/libc-alpha/2025-April/165969.html]
7 Signed-off-by: Khem Raj <raj.khem@gmail.com>
8 ---
9 Makeconfig | 2 +-
10 1 file changed, 1 insertion(+), 1 deletion(-)
12 diff --git a/Makeconfig b/Makeconfig
14 --- a/Makeconfig
16 @@ -1176,7 +1176,7 @@ endif
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| /openbmc/u-boot/arch/mips/include/asm/ |
| H A D | io.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (C) 1994 - 2000, 06 Ralf Baechle
18 #include <asm/cpu-features.h>
19 #include <asm/pgtable-bits.h>
24 #include <mangle-port.h>
39 /* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
49 return gd->arch.io_port_base; in mips_io_port_base()
56 gd->arch.io_port_base = base; in set_io_port_base()
75 * virt_to_phys - map virtual addresses to physical
78 * The returned physical address is the physical (CPU) mapping for
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| /openbmc/pldm/libpldmresponder/ |
| H A D | fru_parser.hpp | 4 #include <map>
44 // DBusLookupInfo contains info to lookup in the D-Bus inventory, D-Bus
45 // inventory service bus name, root path of the inventory D-Bus objects and list
60 using FruRecordMap = std::map<ItemIntfName, FruRecordInfos>;
65 * structure, containing the information needed to map the D-Bus
80 /** @brief Provides the service, root D-Bus path and the interfaces that is
92 * type, for example xyz.openbmc_project.Inventory.Item.Cpu for CPU's
94 * @param[in] intf - name of the item interface
96 * @return return the info create the PLDM FRU records from inventory D-Bus
115 * @param[in] dirPath - directory path where all the FRU configuration JSON
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| /openbmc/qemu/hw/arm/ |
| H A D | vexpress.c | 4 * Copyright (c) 2010 - 2011 B Labs Ltd.
20 * Contributions after 2012-01-13 are licensed under the terms of the
38 #include "qemu/error-report.h"
41 #include "hw/cpu/a9mpcore.h"
42 #include "hw/cpu/a15mpcore.h"
48 #include "target/arm/cpu-qom.h"
63 * the "legacy" one (used for A9) and the "Cortex-A Series"
64 * map (used for newer cores).
189 #define TYPE_VEXPRESS_A9_MACHINE MACHINE_TYPE_NAME("vexpress-a9")
190 #define TYPE_VEXPRESS_A15_MACHINE MACHINE_TYPE_NAME("vexpress-a15")
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| /openbmc/qemu/hw/xtensa/ |
| H A D | virt.c | 33 #include "hw/pci-host/gpex.h"
37 #include "qemu/error-report.h"
67 /* Map only the first size_ecam bytes of ECAM space. */ in create_pcie()
70 memory_region_init_alias(ecam_alias, OBJECT(dev), "pcie-ecam", in create_pcie()
75 * Map the MMIO window into system address space so as to expose in create_pcie()
82 memory_region_init_alias(mmio_alias, OBJECT(dev), "pcie-mmio", in create_pcie()
86 /* Map IO port space. */ in create_pcie()
89 memory_region_init_alias(pio_alias, OBJECT(dev), "pcie-pio", in create_pcie()
104 if (pci->bus) { in create_pcie()
105 pci_init_nic_devices(pci->bus, mc->default_nic); in create_pcie()
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| /openbmc/qemu/hw/openrisc/ |
| H A D | virt.c | 2 * SPDX-License-Identifier: GPL-2.0-or-later
10 #include "qemu/error-report.h"
11 #include "qemu/guest-random.h"
13 #include "cpu.h"
14 #include "system/address-spaces.h"
17 #include "hw/char/serial-mm.h"
18 #include "hw/core/split-irq.h"
22 #include "hw/pci-host/gpex.h"
23 #include "hw/qdev-properties.h"
26 #include "hw/virtio/virtio-mmio.h"
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| /openbmc/qemu/hw/intc/ |
| H A D | exynos4210_gic.c | 4 * Copyright (c) 2000 - 2011 Samsung Electronics Co., Ltd.
29 #include "hw/qdev-properties.h"
51 qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level); in exynos4210_gic_set_irq()
60 uint32_t n = s->num_cpu; in exynos4210_gic_realize()
63 s->gic = qdev_new("arm_gic"); in exynos4210_gic_realize()
64 qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu); in exynos4210_gic_realize()
65 qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ); in exynos4210_gic_realize()
66 gicbusdev = SYS_BUS_DEVICE(s->gic); in exynos4210_gic_realize()
74 EXYNOS4210_GIC_NIRQ - 32); in exynos4210_gic_realize()
76 memory_region_init(&s->cpu_container, obj, "exynos4210-cpu-container", in exynos4210_gic_realize()
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