/openbmc/linux/arch/mips/mm/ |
H A D | sc-mips.c | 122 unsigned int config2 = read_c0_config2(); in mips_sc_is_activated() local 137 if (config2 & (1 << 12)) in mips_sc_is_activated() 141 tmp = (config2 >> 4) & 0x0f; in mips_sc_is_activated() 186 unsigned int config1, config2; in mips_sc_probe() local 202 /* Does this MIPS32/MIPS64 CPU have a config2 register? */ in mips_sc_probe() 207 config2 = read_c0_config2(); in mips_sc_probe() 212 tmp = (config2 >> 8) & 0x0f; in mips_sc_probe() 218 tmp = (config2 >> 0) & 0x0f; in mips_sc_probe() 227 * According to config2 it would be 5-ways, but that is in mips_sc_probe() 236 * According to config2 it would be 5-ways and 512-sets, in mips_sc_probe()
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H A D | c-r4k.c | 1357 unsigned int config2, lsize; in probe_vcache() local 1362 config2 = read_c0_config2(); in probe_vcache() 1363 if ((lsize = ((config2 >> 20) & 15))) in probe_vcache() 1368 c->vcache.sets = 64 << ((config2 >> 24) & 15); in probe_vcache() 1369 c->vcache.ways = 1 + ((config2 >> 16) & 15); in probe_vcache() 1460 unsigned int config2, lsize; in loongson3_sc_init() local 1462 config2 = read_c0_config2(); in loongson3_sc_init() 1463 lsize = (config2 >> 4) & 15; in loongson3_sc_init() 1468 c->scache.sets = 64 << ((config2 >> 8) & 15); in loongson3_sc_init() 1469 c->scache.ways = 1 + (config2 & 15); in loongson3_sc_init()
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/openbmc/linux/Documentation/ABI/testing/ |
H A D | sysfs-bus-event_source-devices-iommu | 7 perf_event_attr.config1 or perf_event_attr.config2 for 13 or perf_event_attr.config2. All supported attributes 27 filter_pasid = "config2:0-21" - PASID filter 28 filter_ats = "config2:24-28" - Address Type filter 29 filter_page_table = "config2:32-36" - Page Table Level filter
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/openbmc/linux/drivers/staging/iio/addac/ |
H A D | adt7316.c | 100 * ADT7316 config2 185 u8 config2; member 327 if (chip->config2 & ADT7316_AD_SINGLE_CH_MODE) in adt7316_show_mode() 340 u8 config2; in adt7316_store_mode() local 343 config2 = chip->config2 & (~ADT7316_AD_SINGLE_CH_MODE); in adt7316_store_mode() 345 config2 |= ADT7316_AD_SINGLE_CH_MODE; in adt7316_store_mode() 347 ret = chip->bus.write(chip->bus.client, ADT7316_CONFIG2, config2); in adt7316_store_mode() 351 chip->config2 = config2; in adt7316_store_mode() 377 if (!(chip->config2 & ADT7316_AD_SINGLE_CH_MODE)) in adt7316_show_ad_channel() 380 switch (chip->config2 & ADT7516_AD_SINGLE_CH_MASK) { in adt7316_show_ad_channel() [all …]
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/openbmc/linux/tools/perf/tests/ |
H A D | pmu.c | 23 { "krava21", "config2:0-3,10-13,20-23,30-33,40-43,50-53,60-63\n", }, 24 { "krava22", "config2:8,18,48,58\n", }, 25 { "krava23", "config2:28-29,38\n", }, 187 if (attr.config2 != 0x0400000020041d07) in test__pmu()
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/openbmc/linux/drivers/perf/amlogic/ |
H A D | meson_ddr_pmu_core.c | 122 u64 config2 = event->attr.config2; in meson_ddr_perf_event_init() local 135 hweight64(config1) + hweight64(config2) > MAX_AXI_PORTS_OF_CHANNEL) in meson_ddr_perf_event_init() 154 u64 config2 = event->attr.config2; in meson_ddr_perf_event_add() local 163 (const unsigned long *)&config2, in meson_ddr_perf_event_add() 164 BITS_PER_TYPE(config2)) in meson_ddr_perf_event_add() 307 if (sscanf(value, "config2:%d", &id) == 1) in meson_ddr_perf_format_attr_visible()
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/openbmc/u-boot/drivers/mtd/nand/raw/ |
H A D | mxc_nand.h | 83 u16 config2; member 96 u16 config2; member 120 u32 config2; member 199 #define operation config2
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H A D | mxc_nand_spl.c | 31 while (!(readnfc(&nfc->config2) & NFC_V1_V2_CONFIG2_INT)) in nfc_wait_ready() 35 tmp = readnfc(&nfc->config2); in nfc_wait_ready() 37 writenfc(tmp, &nfc->config2); in nfc_wait_ready() 55 tmp = (readnfc(&nfc_ip->config2) & ~(NFC_V3_CONFIG2_SPAS_MASK | in nfc_nand_init() 74 writenfc(tmp, &nfc_ip->config2); in nfc_nand_init()
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/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | mxc_nand.c | 143 * On i.MX21 the CONFIG2:INT bit cannot be read if interrupts are masked 439 * complete by checking the INT bit of config2 register. 685 uint32_t config2; in mxc_nand_enable_hwecc_v3() local 690 config2 = readl(NFC_V3_CONFIG2); in mxc_nand_enable_hwecc_v3() 693 config2 |= NFC_V3_CONFIG2_ECC_EN; in mxc_nand_enable_hwecc_v3() 695 config2 &= ~NFC_V3_CONFIG2_ECC_EN; in mxc_nand_enable_hwecc_v3() 697 writel(config2, NFC_V3_CONFIG2); in mxc_nand_enable_hwecc_v3() 1267 uint32_t config2, config3; in preset_v3() local 1283 config2 = NFC_V3_CONFIG2_ONE_CYCLE | in preset_v3() 1293 config2 |= NFC_V3_CONFIG2_PS_2048; in preset_v3() [all …]
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/openbmc/linux/drivers/net/ethernet/seeq/ |
H A D | ether3.c | 176 ether3_outw(priv(dev)->regs.config2 |= CFG2_CTRLO, REG_CONFIG2); in ether3_ledoff() 187 if (priv(dev)->regs.config2 & CFG2_CTRLO) in ether3_ledon() 188 ether3_outw(priv(dev)->regs.config2 &= ~CFG2_CTRLO, REG_CONFIG2); in ether3_ledon() 274 priv(dev)->regs.config2 = CFG2_CTRLO|CFG2_RECVCRC|CFG2_ERRENCRC; in ether3_init_2() 301 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); in ether3_init_2() 337 priv(dev)->regs.config2 |= CFG2_CTRLO; in ether3_init_for_open() 345 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); in ether3_init_for_open() 471 priv(dev)->regs.config2 |= CFG2_CTRLO; in ether3_timeout() 473 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); in ether3_timeout() 850 ether3_outw(priv(dev)->regs.config2 |= CFG2_CTRLO, REG_CONFIG2); in ether3_remove()
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/openbmc/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra124-jetson-tk1-emc.dtsi | 422 nvidia,emc-auto-cal-config2 = <0x00000000>; 590 nvidia,emc-auto-cal-config2 = <0x00000000>; 758 nvidia,emc-auto-cal-config2 = <0x00000000>; 926 nvidia,emc-auto-cal-config2 = <0x00000000>; 1094 nvidia,emc-auto-cal-config2 = <0x00000000>; 1262 nvidia,emc-auto-cal-config2 = <0x00000000>; 1430 nvidia,emc-auto-cal-config2 = <0x00000000>; 1598 nvidia,emc-auto-cal-config2 = <0x00000000>; 1766 nvidia,emc-auto-cal-config2 = <0x00000000>; 1934 nvidia,emc-auto-cal-config2 = <0x00000000>; [all …]
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H A D | tegra124-apalis-emc.dtsi | 318 nvidia,emc-auto-cal-config2 = <0x00000000>; 415 nvidia,emc-auto-cal-config2 = <0x00000000>; 512 nvidia,emc-auto-cal-config2 = <0x00000000>; 609 nvidia,emc-auto-cal-config2 = <0x00000000>; 706 nvidia,emc-auto-cal-config2 = <0x00000000>; 803 nvidia,emc-auto-cal-config2 = <0x00000000>; 900 nvidia,emc-auto-cal-config2 = <0x00000000>; 997 nvidia,emc-auto-cal-config2 = <0x00000000>; 1094 nvidia,emc-auto-cal-config2 = <0x00000000>; 1191 nvidia,emc-auto-cal-config2 = <0x00000000>; [all …]
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H A D | tegra124-nyan-blaze-emc.dtsi | 384 nvidia,emc-auto-cal-config2 = <0x00000000>; 552 nvidia,emc-auto-cal-config2 = <0x00000000>; 720 nvidia,emc-auto-cal-config2 = <0x00000000>; 888 nvidia,emc-auto-cal-config2 = <0x00000000>; 1056 nvidia,emc-auto-cal-config2 = <0x00000000>; 1224 nvidia,emc-auto-cal-config2 = <0x00000000>; 1392 nvidia,emc-auto-cal-config2 = <0x00000000>; 1560 nvidia,emc-auto-cal-config2 = <0x00000000>; 1728 nvidia,emc-auto-cal-config2 = <0x00000000>; 1896 nvidia,emc-auto-cal-config2 = <0x00000000>;
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/openbmc/linux/arch/x86/events/intel/ |
H A D | uncore_nhmex.c | 198 DEFINE_UNCORE_FORMAT_ATTR(mask, mask, "config2:0-63"); 373 reg2->config = event->attr.config2; in nhmex_bbox_hw_config() 458 reg2->config = event->attr.config2; in nhmex_sbox_hw_config() 807 if (event->attr.config2 & NHMEX_M_PMON_MM_CFG_EN) in nhmex_mbox_hw_config() 808 reg2->config = event->attr.config2; in nhmex_mbox_hw_config() 871 DEFINE_UNCORE_FORMAT_ATTR(filter_cfg_en, filter_cfg_en, "config2:63"); 872 DEFINE_UNCORE_FORMAT_ATTR(filter_match, filter_match, "config2:0-33"); 873 DEFINE_UNCORE_FORMAT_ATTR(filter_mask, filter_mask, "config2:34-61"); 1026 er->config2 == reg2->config)) { in nhmex_rbox_get_constraint() 1030 er->config2 = reg2->config; in nhmex_rbox_get_constraint() [all …]
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/openbmc/linux/drivers/mmc/host/ |
H A D | au1xmmc.c | 197 u32 config2; in SEND_STOP() local 202 config2 = __raw_readl(HOST_CONFIG2(host)); in SEND_STOP() 203 __raw_writel(config2 | SD_CONFIG2_DF, HOST_CONFIG2(host)); in SEND_STOP() 743 u32 config2; in au1xmmc_set_ios() local 756 config2 = __raw_readl(HOST_CONFIG2(host)); in au1xmmc_set_ios() 759 config2 |= SD_CONFIG2_BB; in au1xmmc_set_ios() 762 config2 &= ~SD_CONFIG2_BB; in au1xmmc_set_ios() 763 config2 |= SD_CONFIG2_WB; in au1xmmc_set_ios() 766 config2 &= ~(SD_CONFIG2_WB | SD_CONFIG2_BB); in au1xmmc_set_ios() 769 __raw_writel(config2, HOST_CONFIG2(host)); in au1xmmc_set_ios()
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/openbmc/u-boot/arch/mips/mach-ath79/ar934x/ |
H A D | ddr.c | 25 u32 config2; member 95 writel(memcfg->config2, ddr_regs + AR71XX_DDR_REG_CONFIG2); in ar934x_ddr_init()
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/openbmc/linux/tools/perf/arch/x86/tests/ |
H A D | hybrid.c | 155 TEST_ASSERT_VAL("wrong config2", 3 == evsel->core.attr.config2); in test__checkevent_pmu() 209 .name = "cpu_core/config=10,config1,config2=3,period=1000/u",
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/openbmc/linux/tools/perf/tests/attr/ |
H A D | base-record-spe | 37 config2=*
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H A D | base-stat | 38 config2=0
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H A D | base-record | 38 config2=0
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H A D | system-wide-dummy | 49 config2=0
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/openbmc/linux/drivers/iommu/intel/ |
H A D | perfmon.c | 103 IOMMU_PMU_ATTR(filter_pasid, "config2:0-21", IOMMU_PMU_FILTER_PASID); 104 IOMMU_PMU_ATTR(filter_ats, "config2:24-28", IOMMU_PMU_FILTER_ATS); 105 IOMMU_PMU_ATTR(filter_page_table, "config2:32-36", IOMMU_PMU_FILTER_PAGE_TABLE); 441 iommu_pmu_set_filter(pasid, event->attr.config2, in iommu_pmu_assign_event() 444 iommu_pmu_set_filter(ats, event->attr.config2, in iommu_pmu_assign_event() 447 iommu_pmu_set_filter(page_table, event->attr.config2, in iommu_pmu_assign_event()
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/openbmc/linux/drivers/scsi/ |
H A D | mac53c94.h | 38 unsigned char config2; member 185 * Bits in config2 register.
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/openbmc/u-boot/arch/mips/lib/ |
H A D | cache_init.S | 113 * For there to be an L2 present, Config2 must be present. If it isn't 125 * by Config2. The Config5.L2C bit indicates whether this is the case, 187 * cache configuration from the cop0 Config2 register.
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/openbmc/linux/arch/mips/kernel/ |
H A D | cpu-probe.c | 491 unsigned int config2; in decode_config2() local 493 config2 = read_c0_config2(); in decode_config2() 495 if (config2 & MIPS_CONF2_SL) in decode_config2() 498 return config2 & MIPS_CONF_M; in decode_config2() 867 unsigned int config2; in decode_guest_config2() local 869 probe_gc0_config(config2, config2, MIPS_CONF_M); in decode_guest_config2() 871 if (config2 & MIPS_CONF_M) in decode_guest_config2() 873 return config2 & MIPS_CONF_M; in decode_guest_config2() 1753 * XBurst misses a config2 register, so config3 decode was skipped in in cpu_probe_ingenic()
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