Home
last modified time | relevance | path

Searched +full:config +full:- +full:space (Results 1 – 25 of 697) sorted by relevance

12345678910>>...28

/openbmc/qemu/hw/vfio/
H A Dpci-quirks.h2 * vfio generic region quirks (mostly backdoors to PCI config space)
4 * Copyright Red Hat, Inc. 2012-2015
10 * the COPYING file in the top-level directory.
24 * register access emulated PCI config space for the device rather than
25 * passing through accesses. This enables devices where PCI config space
56 * The generic mirror quirk handles devices which expose PCI config space
58 * redirected through to emulated PCI config space. XXX if PCI config space
64 uint32_t config_offset; /* Offset in PCI config space */
/openbmc/qemu/include/hw/pci/
H A Dpci_device.h8 #define TYPE_PCI_DEVICE "pci-device"
17 #define INTERFACE_CXL_DEVICE "cxl-device"
20 #define INTERFACE_PCIE_DEVICE "pci-express-device"
23 #define INTERFACE_CONVENTIONAL_PCI_DEVICE "conventional-pci-device"
64 /* PCI config space */
65 uint8_t *config; member
68 * Used to enable config checks on load. Note that writable bits are
79 /* Used to allocate config space for capabilities. */
111 /* Offset of PM capability in config space */
114 /* Offset of MSI-X capability in config space */
[all …]
H A Dpci.h33 /* QEMU-specific Vendor and Device ID definitions */
79 /* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */
84 /* legacy virtio-pci devices */
95 * modern virtio-pci devices get their id assigned automatically,
159 pcibus_t addr; /* current PCI mapping address. -1 means not mapped */
189 /* Size of the standard PCI config header */
191 /* Size of the standard PCI config space */
193 /* Size of the standard PCIe config space: 4KB */
196 #define PCI_NUM_PINS 4 /* A-D */
208 /* command register SERR bit enabled - unused since QEMU v5.0 */
[all …]
/openbmc/u-boot/drivers/core/
H A DKconfig3 config DM
6 This config option enables Driver Model. This brings in the core
7 support, including scanning of platform data on start-up. If
11 config SPL_DM
24 config TPL_DM
38 config DM_WARN
43 The dm_warn() function can use up quite a bit of space for its
44 strings. By default this is disabled for SPL builds to save space.
45 This will cause dm_warn() to be compiled out - it will do nothing
48 config DM_DEBUG
[all …]
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/multipath-tools/files/
H A D0005-RH-add-mpathconf.patch8 has a couple of built-in options that can be set directly from the
13 Signed-off-by: Benjamin Marzinski <bmarzins@redhat.com>
15 Upstream-Status: Pending
18 Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com>
21 Signed-off-by: Changqing Li <changqing.li@windriver.com>
22 ---
23 libmultipath/config.c | 1 +
31 diff --git a/libmultipath/config.c b/libmultipath/config.c
33 --- a/libmultipath/config.c
34 +++ b/libmultipath/config.c
[all …]
/openbmc/u-boot/arch/x86/
H A DKconfig4 config SYS_ARCH
8 prompt "Run U-Boot in 32/64-bit mode"
11 U-Boot can be built as a 32-bit binary which runs in 32-bit mode
12 even on 64-bit machines. In this case SPL is not used, and U-Boot
13 runs directly from the reset vector (via 16-bit start-up).
15 Alternatively it can be run as a 64-bit binary, thus requiring a
16 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit
17 start-up) then jumps to U-Boot in 64-bit mode.
19 For now, 32-bit mode is recommended, as 64-bit is still
22 config X86_RUN_32BIT
[all …]
/openbmc/u-boot/arch/arm/mach-aspeed/
H A DKconfig3 config SYS_ARCH
6 config SYS_SOC
9 config SYS_TEXT_BASE
17 config ASPEED_AST2400
21 The Aspeed AST2400 is a ARM-based SoC with arm926ejs CPU.
25 config ASPEED_AST2500
30 The Aspeed AST2500 is a ARM-based SoC with arm1176 CPU.
34 config ASPEED_AST2600
43 The Aspeed AST2600 is a ARM-based SoC with Cortex-A7 CPU.
48 config ASPEED_ALLOW_DANGEROUS_BACKDOORS
[all …]
/openbmc/u-boot/arch/arm/cpu/armv8/
H A DKconfig3 config ARMV8_SPL_EXCEPTION_VECTORS
9 dump, but still takes quite a lot of space in the image size.
11 Say N here if you are running out of code space in the image
12 and want to save some space at the cost of less debugging info.
14 config ARMV8_MULTIENTRY
15 bool "Enable multiple CPUs to enter into U-Boot"
17 config ARMV8_SET_SMPEN
21 CPUECTLR_EL1.SMPEN bit before U-Boot.
35 config ARMV8_SPIN_TABLE
36 bool "Support spin-table enable method"
[all …]
/openbmc/u-boot/board/armltd/integrator/
H A Dpci.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
25 #include "integrator-sc.h"
33 * where we read and write stuff - you don't want to try to
37 #define PHYS_PCI_IO_BASE 0x60000000 /* PCI I/O space base */
43 * These are in the PCI BUS address space
46 * range that devices actually use - what would they be doing at
67 #define PCI_ENET0_IOADDR 0x60000000 /* First card in PCI I/O space */
68 #define PCI_ENET0_MEMADDR 0x40000000 /* First card in PCI memory space */
106 * Linux calls the thing U-Boot calls "DEV" "SLOT" in v3_open_config_window()
[all …]
/openbmc/u-boot/dts/
H A DKconfig5 config SUPPORT_OF_CONTROL
8 config DTC
11 config PYLIBFDT
14 config DTOC
18 config BINMAN
25 config OF_CONTROL
26 bool "Run-time configuration via Device Tree"
29 This feature provides for run-time configuration of U-Boot
32 config OF_BOARD_FIXUP
33 bool "Board-specific manipulation of Device Tree"
[all …]
/openbmc/dbus-sensors/include/linux/
H A Dpeci-ioctl.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018-2019 Intel Corporation */
4 // clang-format off
48 * enum peci_cmd - PECI client commands
53 * @PECI_CMD_RD_PKG_CFG: read access to the PCS (Package Configuration Space)
54 * @PECI_CMD_WR_PKG_CFG: write access to the PCS (Package Configuration Space)
58 * @PECI_CMD_RD_PCI_CFG: sideband read access to the PCI configuration space
60 * @PECI_CMD_WR_PCI_CFG: sideband write access to the PCI configuration space
63 * space that resides within the processor
65 * space that resides within the processor
[all …]
/openbmc/phosphor-ipmi-flash/tools/
H A Dpci.cpp8 * http://www.apache.org/licenses/LICENSE-2.0
45 pci->pci_iterator_destroy(it); in closeIt()
57 It it(pci->pci_id_match_iterator_create(match), pci); in PciAccessBridge()
59 while ((dev = pci->pci_device_next(*it))) in PciAccessBridge()
61 int ret = pci->pci_device_probe(dev); in PciAccessBridge()
68 /* Verify it's a memory-based bar. */ in PciAccessBridge()
69 if (!dev->regions[bar].is_IO) in PciAccessBridge()
76 "PCI device {:#04x}:{:#04x}", match->vendor_id, match->device_id)); in PciAccessBridge()
79 std::fprintf(stderr, "Find [0x%x 0x%x] \n", match->vendor_id, in PciAccessBridge()
80 match->device_id); in PciAccessBridge()
[all …]
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-daemons/proftpd/files/
H A Dproftpd-basic.init5 # Required-Start: $remote_fs $syslog $local_fs $network
6 # Required-Stop: $remote_fs $syslog $local_fs $network
7 # Should-Start: $named
8 # Should-Stop: $named
9 # Default-Start: 2 3 4 5
10 # Default-Stop: 0 1 6
11 # Short-Description: Starts ProFTPD daemon
27 PIDFILE=`grep -i '^pidfile' $CONFIG_FILE|awk '{ print $2 }'`
33 # Read config (will override defaults)
34 [ -r /etc/default/proftpd ] && . /etc/default/proftpd
[all …]
/openbmc/u-boot/arch/arm/mach-versal/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0+
5 config SYS_BOARD
9 config SYS_VENDOR
13 config SYS_SOC
16 config SYS_CONFIG_NAME
24 config GICV3
27 config SYS_MALLOC_LEN
30 config COUNTER_FREQUENCY
36 config ZYNQ_SDHCI_MAX_FREQ
39 config VERSAL_OF_BOARD_DTB_ADDR
[all …]
/openbmc/qemu/docs/specs/
H A Dfsi.rst8 FSI is a point-to-point two wire interface which is capable of supporting
21 1. The Common FRU Access Macro (CFAM), an address space containing various
29 slave's configuration registers appear in address space of the CFAM to
34 FSI is a bit-based protocol supporting synchronous and DMA-driven accesses
37 4. The On-Chip Peripheral Bus (OPB): A low-speed bus typically found in POWER
40 MMIO-mapping of the CFAM address straight onto a sub-region of the OPB
41 address space.
43 5. An APB-to-OPB bridge enabling access to the OPB from the ARM core in the
51 'config' member of LBusDeviceClass to match the engine's type.
58 As for FSI, its symbols and wire-protocol are not modelled at all. This is not
[all …]
/openbmc/u-boot/doc/device-tree-bindings/misc/
H A Dintel,irq-router.txt8 - reg : Specifies the interrupt router's PCI configuration space address as
10 - compatible = "intel,irq-router"
11 - intel,pirq-config : Specifies the IRQ routing register programming mechanism.
14 "ibase": IRQ routing is in the memory-mapped IBASE register block
15 - intel,ibase-offset : IBASE register offset in the interrupt router's PCI
16 configuration space, required only if intel,pirq-config = "ibase".
17 - intel,actl-8bit : If ACTL (ACPI control) register width is 8-bit, this must
18 be specified. The 8-bit ACTL register is seen on ICH series chipset, like
19 ICH9/Panther Point/etc. On Atom chipset it is a 32-bit register.
20 - intel,actl-addr : ACTL (ACPI control) register offset. ACTL can be either
[all …]
/openbmc/qemu/
H A D.editorconfig8 # Emacs: you need https://github.com/10sr/editorconfig-custom-majormode-el
9 # to automatically enable the appropriate major-mode for your files
10 # that aren't already caught by your existing config.
18 charset = utf-8
31 indent_style = space
36 indent_style = space
48 indent_style = space
53 indent_style = space
58 [scripts/{kernel-doc,get_maintainer.pl,checkpatch.pl}]
/openbmc/u-boot/arch/x86/cpu/tangier/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0+
5 config INTEL_TANGIER
19 config SYS_CAR_ADDR
23 config SYS_CAR_SIZE
27 Space in bytes in eSRAM used as Cache-As-RAM (CAR).
30 config SYS_USB_OTG_BASE
/openbmc/u-boot/doc/device-tree-bindings/pinctrl/
H A Dmarvell,mvebu-pinctrl.txt1 The pinctrl driver enables Marvell Armada 8K SoCs to configure the multi-purpose
8 - compatible: "marvell,mvebu-pinctrl",
9 "marvell,ap806-pinctrl",
10 "marvell,armada-7k-pinctrl",
11 "marvell,armada-8k-cpm-pinctrl",
12 "marvell,armada-8k-cps-pinctrl"
13 - bank-name: A string defining the pinc controller bank name
14 - reg: A pair of values defining the pin controller base address
15 and the address space
16 - pin-count: Numeric value defining the amount of multi purpose pins
[all …]
/openbmc/u-boot/drivers/serial/
H A DKconfig7 config BAUDRATE
11 Select a default baudrate, where "default" has a driver-specific
16 config REQUIRE_SERIAL_CONSOLE
19 # non-dm serial code
27 config SPECIFY_CONSOLE_INDEX
34 in U-Boot.
36 config SERIAL_PRESENT
41 In very space-constrained devices even the full UART driver is too
43 This option enables the full UART in U-Boot, so if is it disabled,
44 the full UART driver will be omitted, thus saving space.
[all …]
/openbmc/phosphor-health-monitor/
H A Dbmc_health_config_json.md3 This file outlines the format for the supplemental health metric config that can
4 be supplied by the platform to override the default in-code config from
7 The json config may have following metric types -
9 - `CPU`
10 - This indicates the total CPU utilization.
11 - `CPU_User`
12 - This indicates the user level CPU utilization.
13 - `CPU_Kernel`
14 - This indicates the kernel level CPU utilization.
15 - `Memory`
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-ls2080a.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
5 * Copyright 2013-2015 Freescale Semiconductor, Inc.
10 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
17 /* DRAM space - 1, size : 2 GB DRAM */
20 gic: interrupt-controller@6000000 {
21 compatible = "arm,gic-v3";
24 #interrupt-cells = <3>;
25 interrupt-controller;
[all …]
/openbmc/qemu/pc-bios/optionrom/
H A DMakefile1 include config.mak
2 SRC_DIR := $(TOPSRC_DIR)/pc-bios/optionrom
9 CFLAGS = -O2 -g
12 SPACE := $(NULL) # macro
13 TARGET_PREFIX := $(patsubst %/,%:$(SPACE),$(TARGET_DIR))
15 quiet-@ = $(if $(V),,@$(if $1,printf "%s\n" "$(TARGET_PREFIX)$1" && ))
16 quiet-command = $(call quiet-@,$2 $@)$1
19 override CPPFLAGS += -MMD -MP -MT $@ -MF $(@D)/$(*F).d
21 override CFLAGS += -march=i486 -Wall $(EXTRA_CFLAGS) -m16
22 override CFLAGS += -ffreestanding -I$(TOPSRC_DIR)/include
[all …]
/openbmc/u-boot/env/
H A DKconfig3 config ENV_IS_NOWHERE
20 while U-Boot is running, but once U-Boot exits it will not be
21 stored. U-Boot will therefore always start up with a default
24 config ENV_IS_IN_EEPROM
31 - CONFIG_ENV_OFFSET:
32 - CONFIG_ENV_SIZE:
41 - CONFIG_ENV_EEPROM_IS_ON_I2C
45 - CONFIG_I2C_ENV_EEPROM_BUS
55 config ENV_IS_IN_FAT
66 config ENV_IS_IN_EXT4
[all …]
/openbmc/qemu/subprojects/libvduse/
H A Dlibvduse.h10 * later. See the COPYING file in the top-level directory.
39 /* Number of physically-contiguous device-readable descriptors */
41 /* Number of physically-contiguous device-writable descriptors */
43 /* Array to store physically-contiguous device-writable descriptors */
45 /* Array to store physically-contiguous device-readable descriptors */
75 * Returns: file descriptor on success, -1 on failure.
136 * Returns: file descriptor on success, -1 on failure.
146 * Returns: file descriptor on success, -errno on failure.
153 * @size: the size to write to configuration space
154 * @offset: the offset from the beginning of configuration space
[all …]

12345678910>>...28