Lines Matching +full:config +full:- +full:space
4 config SYS_ARCH
8 prompt "Run U-Boot in 32/64-bit mode"
11 U-Boot can be built as a 32-bit binary which runs in 32-bit mode
12 even on 64-bit machines. In this case SPL is not used, and U-Boot
13 runs directly from the reset vector (via 16-bit start-up).
15 Alternatively it can be run as a 64-bit binary, thus requiring a
16 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit
17 start-up) then jumps to U-Boot in 64-bit mode.
19 For now, 32-bit mode is recommended, as 64-bit is still
22 config X86_RUN_32BIT
23 bool "32-bit"
25 Build U-Boot as a 32-bit binary with no SPL. This is the currently
26 supported normal setup. U-Boot will stay in 32-bit mode even on
27 64-bit machines. When booting a 64-bit kernel, U-Boot will switch
28 to 64-bit just before starting the kernel. Only the bottom 4GB of
32 config X86_RUN_64BIT
33 bool "64-bit"
39 Build U-Boot as a 64-bit binary with a 32-bit SPL. This is
40 experimental and many features are missing. U-Boot SPL starts up,
41 runs through the 16-bit and 32-bit init, then switches to 64-bit
42 mode and jumps to U-Boot proper.
46 config X86_64
49 config SPL_X86_64
57 config VENDOR_ADVANTECH
60 config VENDOR_CONGATEC
63 config VENDOR_COREBOOT
66 config VENDOR_DFI
69 config VENDOR_EFI
72 config VENDOR_EMULATION
75 config VENDOR_GOOGLE
78 config VENDOR_INTEL
83 # subarchitectures-specific options below
84 config INTEL_MID
89 Select to build a U-Boot capable of supporting Intel MID
99 # board-specific options below
109 # platform-specific options below
121 # architecture-specific options below
123 config AHCI
126 config SYS_MALLOC_F_LEN
129 config RAMBASE
133 config XIP_ROM_SIZE
138 config CPU_ADDR_BITS
142 config HPET_ADDRESS
146 config SMM_TSEG
150 config SMM_TSEG_SIZE
153 config X86_RESET_VECTOR
158 # The following options control where the 16-bit and 32-bit init lies
159 # If SPL is enabled then it normally holds this init code, and U-Boot proper
160 # is normally a 64-bit build.
162 # The 16-bit init refers to the reset vector and the small amount of code to
163 # get the processor into 32-bit mode. It may be in SPL or in U-Boot proper,
164 # or missing altogether if U-Boot is started from EFI or coreboot.
166 # The 32-bit init refers to processor init, running binary blobs including
168 # 32-bit code. It is normally in the same place as 16-bit init if that is
169 # enabled (i.e. they are both in SPL, or both in U-Boot proper).
170 config X86_16BIT_INIT
175 This is enabled when 16-bit init is in U-Boot proper
177 config SPL_X86_16BIT_INIT
182 This is enabled when 16-bit init is in SPL
184 config X86_32BIT_INIT
189 This is enabled when 32-bit init is in U-Boot proper
191 config SPL_X86_32BIT_INIT
196 This is enabled when 32-bit init is in SPL
198 config RESET_SEG_START
203 config RESET_SEG_SIZE
208 config RESET_VEC_LOC
213 config SYS_X86_START16
218 config X86_LOAD_FROM_32_BIT
219 bool "Boot from a 32-bit program"
221 Define this to boot U-Boot from a 32-bit program which sets
224 payload-loading feature.
226 config BOARD_ROMSIZE_KB_512
228 config BOARD_ROMSIZE_KB_1024
230 config BOARD_ROMSIZE_KB_2048
232 config BOARD_ROMSIZE_KB_4096
234 config BOARD_ROMSIZE_KB_8192
236 config BOARD_ROMSIZE_KB_16384
249 Select the size of the ROM chip you intend to flash U-Boot on.
251 The build system will take care of creating a u-boot.rom file
254 config UBOOT_ROMSIZE_KB_512
259 config UBOOT_ROMSIZE_KB_1024
264 config UBOOT_ROMSIZE_KB_2048
269 config UBOOT_ROMSIZE_KB_4096
274 config UBOOT_ROMSIZE_KB_8192
279 config UBOOT_ROMSIZE_KB_16384
286 # Map the config names to an integer (KB).
287 config UBOOT_ROMSIZE_KB
296 # Map the config names to a hex value (bytes).
297 config ROM_SIZE
307 config HAVE_INTEL_ME
310 Newer higher-end devices have an Intel Management Engine (ME)
316 config X86_RAMTEST
320 often crash within U-Boot or the kernel. This option enables a
325 config FLASH_DESCRIPTOR_FILE
333 config INTEL_ME_FILE
341 config HAVE_FSP
346 the resulting U-Boot image. It is a binary blob which U-Boot uses
349 Note: Without this binary U-Boot will not be able to set up its
352 config FSP_FILE
360 config FSP_ADDR
373 config FSP_TEMP_RAM_ADDR
381 config FSP_SYS_MALLOC_F_LEN
388 config FSP_USE_UPD
397 config FSP_BROKEN_HOB
403 tell U-Boot to do some additional work to ensure U-Boot relocation
407 config ENABLE_MRC_CACHE
416 please check FSP output HOB via U-Boot command 'fsp hob' to see
422 config HAVE_MRC
427 the resulting U-Boot image. MRC stands for Memory Reference Code.
428 It is a binary blob which U-Boot uses to set up SDRAM.
430 Note: Without this binary U-Boot will not be able to set up its
433 config CACHE_MRC_BIN
443 config CACHE_MRC_SIZE_KB
451 of cached space.
453 config DCACHE_RAM_BASE
457 Sets the base of the data cache area in memory space. This is the
458 start address of the cache-as-RAM (CAR) area and the address varies
463 config DCACHE_RAM_SIZE
468 Sets the total size of the data cache area in memory space. This
469 sets the size of the cache-as-RAM (CAR) area. Note that much of the
470 CAR space is required by the MRC. The CAR space available to U-Boot
474 config DCACHE_RAM_MRC_VAR_SIZE
483 config HAVE_REFCODE
487 U-Boot image. This is an Intel binary blob that handles system
491 broadwell) U-Boot will be missing some critical setup steps.
494 config SMP
498 Enable use of more than one CPU in U-Boot and the Operating System
504 config MAX_CPUS
509 When using multi-CPU chips it is possible for U-Boot to start up
511 pre-allocated so at present U-Boot wants to know the maximum
516 config AP_STACK_SIZE
521 Each additional CPU started by U-Boot requires its own stack. This
524 enough space.
526 config CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
533 config HAVE_VGA_BIOS
539 config VGA_BIOS_FILE
546 config VGA_BIOS_ADDR
555 config HAVE_VBT
572 config VBT_FILE
580 config VBT_ADDR
589 config VIDEO_FSP
593 Turn on this option to enable a framebuffer driver when U-Boot is
597 config ROM_TABLE_ADDR
603 those tables, including PIRQ routing table, Multi-Processor
606 config ROM_TABLE_SIZE
613 config GENERATE_PIRQ_TABLE
618 is generated by U-Boot in the system memory from 0xf0000 to 0xfffff
619 at every 16-byte boundary with a PCI IRQ routing signature ("$PIR").
623 config GENERATE_SFI_TABLE
629 boot on SFI-only platforms. If you have ACPI tables then these are
632 U-Boot writes this table in write_sfi_table() just before booting
637 config GENERATE_MP_TABLE
638 bool "Generate an MP (Multi-Processor) table"
641 Generate an MP (Multi-Processor) table for this board. The MP table
646 config GENERATE_ACPI_TABLE
653 by the operating system. It defines platform-independent interfaces
658 config HAVE_ACPI_RESUME
662 Select this to enable ACPI S3 resume. S3 is an ACPI-defined sleeping
663 state where all system context is lost except system memory. U-Boot
667 registers, U-Boot needs to write the original value. When everything
668 is done, U-Boot needs to find out the wakeup vector provided by OSes
671 config S3_VGA_ROM_RUN
672 bool "Re-run VGA option ROMs on S3 resume"
675 Execute VGA option ROMs in U-Boot when resuming from S3. Normally
682 config STACK_SIZE
687 Estimated U-Boot's runtime stack size that needs to be reserved
690 config MAX_PIRQ_LINKS
698 config IRQ_SLOT_COUNT
702 U-Boot can support up to 254 IRQ slot info in the PIRQ routing table
707 config PCIE_ECAM_BASE
711 This is the memory-mapped address of PCI configuration space, which
715 configuration space through I/O access, but memory access is more
718 assigned to PCI devices - i.e. the memory and prefetch regions, as
721 config PCIE_ECAM_SIZE
725 This is the size of memory-mapped address of PCI configuration space,
731 config I8259_PIC
736 slave) interrupt controllers. Include this to have U-Boot set up
739 config APIC
748 config PINCTRL_ICH6
754 config I8254_TIMER
759 Include this to have U-Boot set up the timer correctly.
761 config SEABIOS
764 SeaBIOS is an open source implementation of a 16-bit X86 BIOS.
766 of coreboot/U-Boot. By turning on this option, U-Boot prepares
771 config HIGH_TABLE_SIZE
776 SeaBIOS itself resides in E seg and F seg, where U-Boot puts all
777 configuration tables like PIRQ/MP/ACPI. To avoid conflicts, U-Boot