/openbmc/linux/Documentation/devicetree/bindings/mmc/ |
H A D | arm,pl18x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Ulf Hansson <ulf.hansson@linaro.org> 20 - $ref: /schemas/arm/primecell.yaml# 21 - $ref: mmc-controller.yaml# 29 - arm,pl180 30 - arm,pl181 31 - arm,pl18x [all …]
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/openbmc/linux/arch/arm64/boot/dts/mediatek/ |
H A D | mt8365-evk.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2021-2022 BayLibre, SAS. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h> 19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; 26 stdout-path = "serial0:921600n8"; 31 compatible = "linaro,optee-tz"; 36 gpio-keys { [all …]
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H A D | mt8192-asurada.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/spmi/spmi.h> 25 stdout-path = "serial0:115200n8"; 33 backlight_lcd0: backlight-lcd0 { 34 compatible = "pwm-backlight"; 36 power-supply = <&ppvar_sys>; 37 enable-gpios = <&pio 152 0>; 38 brightness-levels = <0 1023>; [all …]
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H A D | mt8195-demo.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 14 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 18 compatible = "mediatek,mt8195-demo", "mediatek,mt8195"; 25 stdout-path = "serial0:921600n8"; 30 compatible = "linaro,optee-tz"; 35 gpio-keys { [all …]
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H A D | mt6795-sony-xperia-m5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 14 compatible = "sony,xperia-m5", "mediatek,mt6795"; 15 chassis-type = "handset"; 30 reserved_memory: reserved-memory { 31 #address-cells = <2>; 32 #size-cells = <2>; 38 no-map; 42 preloader-region@44800000 { [all …]
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H A D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 32 power-supply = <&ppvar_sys>; [all …]
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H A D | mt7986a-rfb.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 8 #include <dt-bindings/pinctrl/mt65xx.h> 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a"; 22 stdout-path = "serial0:115200n8"; 30 reg_1p8v: regulator-1p8v { 31 compatible = "regulator-fixed"; 32 regulator-name = "fixed-1.8V"; 33 regulator-min-microvolt = <1800000>; [all …]
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H A D | mt7622-rfb1.dts | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 /dts-v1/; 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/gpio/gpio.h> 18 chassis-type = "embedded"; 19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-supply = <&mt6380_vcpu_reg>; 33 sram-supply = <&mt6380_vm_reg>; 37 proc-supply = <&mt6380_vcpu_reg>; [all …]
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H A D | mt7622-bananapi-bpi-r64.dts | 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/leds/common.h> 17 model = "Bananapi BPI-R64"; 18 chassis-type = "embedded"; 19 compatible = "bananapi,bpi-r64", "mediatek,mt7622"; 26 stdout-path = "serial0:115200n8"; 32 proc-supply = <&mt6380_vcpu_reg>; [all …]
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H A D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_pp5000>; 28 enable-gpios = <&pio 176 0>; 29 brightness-levels = <0 1023>; 30 num-interpolated-steps = <1023>; 31 default-brightness-level = <576>; [all …]
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H A D | mt7986a-bananapi-bpi-r3.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 * Frank Wunderlich <frank-w@public-files.de> 9 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/leds/common.h> 13 #include <dt-bindings/pinctrl/mt65xx.h> 18 model = "Bananapi BPI-R3"; 19 chassis-type = "embedded"; 20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a"; [all …]
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/openbmc/linux/arch/arm/boot/dts/mediatek/ |
H A D | mt7623.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (c) 2017-2018 MediaTek Inc. 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/clock/mt2701-clk.h> 13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h> 14 #include <dt-bindings/power/mt2701-power.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/phy/phy.h> 17 #include <dt-bindings/reset/mt2701-resets.h> [all …]
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/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/ |
H A D | immap.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * (C) Copyright 2000-2003 24 sysconf8xx_t __iomem *sc = &immap->im_siu_conf; in do_siuinfo() 27 in_be32(&sc->sc_siumcr), in_be32(&sc->sc_sypcr)); in do_siuinfo() 28 printf("SWT = %08x\n", in_be32(&sc->sc_swt)); in do_siuinfo() 30 in_be32(&sc->sc_sipend), in_be32(&sc->sc_simask)); in do_siuinfo() 32 in_be32(&sc->sc_siel), in_be32(&sc->sc_sivec)); in do_siuinfo() 34 in_be32(&sc->sc_tesr), in_be32(&sc->sc_sdcr)); in do_siuinfo() 42 memctl8xx_t __iomem *memctl = &immap->im_memctl; in do_memcinfo() 44 uint __iomem *p = &memctl->memc_br0; in do_memcinfo() [all …]
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | mediatek,mt6795-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> 11 - Sean Wang <sean.wang@kernel.org> 14 The MediaTek's MT6795 Pin controller is used to control SoC pins. 18 const: mediatek,mt6795-pinctrl 20 gpio-controller: true 22 '#gpio-cells': [all …]
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H A D | mediatek,mt6779-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andy Teng <andy.teng@mediatek.com> 11 - Sean Wang <sean.wang@kernel.org> 20 - mediatek,mt6779-pinctrl 21 - mediatek,mt6797-pinctrl 26 reg-names: true 28 gpio-controller: true [all …]
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H A D | mediatek,mt7986-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@kernel.org> 13 The MediaTek's MT7986 Pin controller is used to control SoC pins. 18 - mediatek,mt7986a-pinctrl 19 - mediatek,mt7986b-pinctrl 25 reg-names: 27 - const: gpio [all …]
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/openbmc/u-boot/board/qualcomm/dragonboard820c/ |
H A D | dragonboard820c.c | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> 8 #include <asm/arch/sysmap-apq8096.h> 9 #include <linux/arm-smccc.h> 22 gd->ram_size = PHYS_SDRAM_SIZE; in dram_init() 29 gd->bd->bi_dram[0].start = PHYS_SDRAM_1; in dram_init_banksize() 30 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; in dram_init_banksize() 32 gd->bd->bi_dram[1].start = PHYS_SDRAM_2; in dram_init_banksize() 33 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE; in dram_init_banksize() 45 u8 mask; /* mask clk/dat/cmd control */ in sdhci_power_init() [all …]
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/openbmc/linux/drivers/mmc/host/ |
H A D | alcor.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright (C) 2018 Oleksij Rempel <linux@rempel-privat.de> 12 * thing what I did. 2018 Oleksij Rempel <linux@rempel-privat.de> 47 struct mmc_command *cmd; member 75 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_rmw8() 89 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_mask_sd_irqs() 96 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_unmask_sd_irqs() 106 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_reset() 116 dev_err(host->dev, "%s: timeout\n", __func__); in alcor_reset() 124 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_data_set_dma() [all …]
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H A D | omap_hsmmc.c | 27 #include <linux/dma-mapping.h> 37 #include <linux/mmc/slot-gpio.h> 44 #include <linux/platform_data/hsmmc-omap.h> 153 #define mmc_pdata(host) host->pdata 173 struct mmc_command *cmd; member 220 struct mmc_ios *ios = &mmc->ios; in omap_hsmmc_enable_supply() 222 if (!IS_ERR(mmc->supply.vmmc)) { in omap_hsmmc_enable_supply() 223 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); in omap_hsmmc_enable_supply() 229 if (!IS_ERR(mmc->supply.vqmmc) && !host->vqmmc_enabled) { in omap_hsmmc_enable_supply() 230 ret = regulator_enable(mmc->supply.vqmmc); in omap_hsmmc_enable_supply() [all …]
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H A D | sdhci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver 5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved. 9 * - JMicron (hardware and technical support) 19 #include <linux/dma-mapping.h> 33 #include <linux/mmc/slot-gpio.h> 40 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x) 43 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x) 52 static bool sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd); 73 SDHCI_DUMP("Wake-up: 0x%08x | Clock: 0x%08x\n", in sdhci_dumpregs() [all …]
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/openbmc/linux/drivers/mtd/nand/raw/ |
H A D | cs553x_nand.c | 1 // SPDX-License-Identifier: GPL-2.0-only 11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3] 12 * where 0-3 reflects the chip select for NAND. 50 /* Pin function selection MSR (IDE vs. flash on the IDE pins) */ 54 /* Registers within the NAND flash controller BAR -- memory mapped */ 56 #define MM_NAND_CTL 0x800 /* Any even address 0x800-0x80e */ 57 #define MM_NAND_IO 0x801 /* Any odd address 0x801-0x80f */ 65 /* Registers within the NAND flash controller BAR -- I/O mapped */ 108 writeb(ctl, cs553x->mmio + MM_NAND_CTL); in cs553x_write_ctrl_byte() 109 writeb(data, cs553x->mmio + MM_NAND_IO); in cs553x_write_ctrl_byte() [all …]
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/openbmc/u-boot/drivers/mtd/nand/raw/ |
H A D | sunxi_nand.c | 1 // SPDX-License-Identifier: GPL-2.0+ 7 * https://github.com/yuq/sunxi-nfc-mtd 10 * https://github.com/hno/Allwinner-Info 78 #define NFC_PAGE_SHIFT(x) (((x) < 10 ? 0 : (x) - 10) << 8) 114 #define NFC_ADR_NUM(x) (((x) - 1) << 16) 173 * native NAND R/B pins (those which can be muxed to the NAND 245 u8 cmd[2]; member 292 div_m = (clock_get_pll6() + hz - 1) / hz; in sunxi_nfc_set_clk_rate() 304 &ccm->nand0_clk_cfg); in sunxi_nfc_set_clk_rate() 307 setbits_le32(&ccm->ahb_gate0, (1 << AHB_GATE_OFFSET_NAND0)); in sunxi_nfc_set_clk_rate() [all …]
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/openbmc/linux/sound/soc/ti/ |
H A D | davinci-mcasp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Multi-channel Audio Serial Port Driver 7 * Author: Nirmal Pandey <n-pandey@ti.com>, 39 #include "edma-pcm.h" 40 #include "sdma-pcm.h" 41 #include "udma-pcm.h" 42 #include "davinci-mcasp.h" 136 void __iomem *reg = mcasp->base + offset; in mcasp_set_bits() 143 void __iomem *reg = mcasp->base + offset; in mcasp_clr_bits() 150 void __iomem *reg = mcasp->base + offset; in mcasp_mod_bits() [all …]
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/openbmc/u-boot/drivers/mmc/ |
H A D | omap_hsmmc.c | 4 * Sukumar Ghorai <s-ghorai@ti.com> 22 * MA 02111-1307 USA 166 return dev_get_priv(mmc->dev); in omap_hsmmc_get_data() 168 return (struct omap_hsmmc_data *)mmc->priv; in omap_hsmmc_get_data() 174 struct omap_hsmmc_plat *plat = dev_get_platdata(mmc->dev); in omap_hsmmc_get_cfg() 175 return &plat->cfg; in omap_hsmmc_get_cfg() 177 return &((struct omap_hsmmc_data *)mmc->priv)->cfg; in omap_hsmmc_get_cfg() 188 return -1; in omap_mmc_setup_gpio_in() 213 pbias_lite = readl(&t2_base->pbias_lite); in mmc_board_init() 230 writel(pbias_lite, &t2_base->pbias_lite); in mmc_board_init() [all …]
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/openbmc/linux/drivers/i2c/ |
H A D | i2c-core-base.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Copyright (C) 1995-99 Simon G. Vogl 10 * Copyright (C) 2013-2017 Wolfram Sang <wsa@kernel.org> 13 #define pr_fmt(fmt) "i2c-core: " fmt 15 #include <dt-bindings/i2c/i2c.h> 17 #include <linux/clk/clk-conf.h> 25 #include <linux/i2c-smbus.h> 46 #include "i2c-core.h" 111 while (id->name[0]) { in i2c_match_id() 112 if (strcmp(client->name, id->name) == 0) in i2c_match_id() [all …]
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