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/openbmc/qemu/include/hw/ppc/
H A Dpnv.h29 #define TYPE_PNV_CHIP "pnv-chip"
60 PnvCore *pnv_chip_find_core(PnvChip *chip, uint32_t core_id);
61 PowerPCCPU *pnv_chip_find_cpu(PnvChip *chip, uint32_t pir);
112 PnvChip *pnv_chip_add_phb(PnvChip *chip, PnvPHB *phb);
132 #define PNV_XSCOM_BASE(chip) \ argument
133 (0x0003fc0000000000ull + ((uint64_t)(chip)->chip_id) * PNV_XSCOM_SIZE)
137 #define PNV_OCC_SENSOR_BASE(chip) (PNV_OCC_COMMON_AREA_BASE + \ argument
138 PNV_OCC_SENSOR_DATA_BLOCK_BASE((chip)->chip_id))
141 #define PNV_HOMER_BASE(chip) \ argument
142 (0x7ffd800000ull + ((uint64_t)(chip)->chip_id) * PNV_HOMER_SIZE)
[all …]
/openbmc/u-boot/drivers/mtd/nand/raw/
H A Dnand_base.c109 struct nand_chip *chip = mtd_to_nand(mtd); in check_offs_len() local
113 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
119 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
128 * nand_release_device - [GENERIC] release chip
131 * Release chip lock and wake up anyone waiting on the device.
135 struct nand_chip *chip = mtd_to_nand(mtd); in nand_release_device() local
138 chip->select_chip(mtd, -1); in nand_release_device()
142 * nand_read_byte - [DEFAULT] read one byte from the chip
149 struct nand_chip *chip = mtd_to_nand(mtd); in nand_read_byte() local
150 return readb(chip->IO_ADDR_R); in nand_read_byte()
[all …]
H A Dmxs_nand_spl.c17 register struct nand_chip *chip = mtd_to_nand(mtd); in mxs_nand_command() local
21 chip->cmd_ctrl(mtd, command, NAND_CLE); in mxs_nand_command()
25 chip->cmd_ctrl(mtd, column, NAND_ALE); in mxs_nand_command()
26 chip->cmd_ctrl(mtd, column >> 8, NAND_ALE); in mxs_nand_command()
29 chip->cmd_ctrl(mtd, page_addr, NAND_ALE); in mxs_nand_command()
30 chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE); in mxs_nand_command()
32 if (chip->chipsize > (128 << 20)) in mxs_nand_command()
33 chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE); in mxs_nand_command()
35 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0); in mxs_nand_command()
38 chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE); in mxs_nand_command()
[all …]
H A Dzynq_nand.c51 #define ZYNQ_NAND_DIRECT_CMD ((0x4 << 23) | /* Chip 0 from interface 1 */ \
81 #define ZYNQ_NAND_CLEAR_CS (1 << CLEAR_CS_SHIFT) /* Clear chip select */
418 * @chip: nand chip info structure
422 static int zynq_nand_read_oob(struct mtd_info *mtd, struct nand_chip *chip, in zynq_nand_read_oob() argument
429 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); in zynq_nand_read_oob()
431 p = chip->oob_poi; in zynq_nand_read_oob()
432 chip->read_buf(mtd, p, (mtd->oobsize - data_width)); in zynq_nand_read_oob()
435 data_phase_addr = (unsigned long)chip->IO_ADDR_R; in zynq_nand_read_oob()
437 chip->IO_ADDR_R = (void __iomem *)data_phase_addr; in zynq_nand_read_oob()
438 chip->read_buf(mtd, p, data_width); in zynq_nand_read_oob()
[all …]
H A Dfsl_upm.c66 struct nand_chip *chip = mtd_to_nand(mtd); in fun_select_chip() local
67 struct fsl_upm_nand *fun = nand_get_controller_data(chip); in fun_select_chip()
71 chip->IO_ADDR_R = chip->IO_ADDR_W = in fun_select_chip()
74 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); in fun_select_chip()
81 struct nand_chip *chip = mtd_to_nand(mtd); in fun_cmd_ctrl() local
82 struct fsl_upm_nand *fun = nand_get_controller_data(chip); in fun_cmd_ctrl()
115 * needs it. Probably weird chip, because I don't see any in fun_cmd_ctrl()
125 struct nand_chip *chip = mtd_to_nand(mtd); in upm_nand_read_byte() local
127 return in_8(chip->IO_ADDR_R); in upm_nand_read_byte()
133 struct nand_chip *chip = mtd_to_nand(mtd); in upm_nand_write_buf() local
[all …]
H A Dmxc_nand.c384 struct nand_chip *chip, argument
387 struct mxc_nand_host *host = nand_get_controller_data(chip);
388 uint8_t *buf = chip->oob_poi;
390 int eccpitch = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
397 chip->cmdfunc(mtd, NAND_CMD_READOOB, mtd->writesize, page);
398 for (i = 0; i < chip->ecc.steps; i++) {
399 toread = min_t(int, length, chip->ecc.prepad);
401 chip->read_buf(mtd, bufpoi, toread);
405 bufpoi += chip->ecc.bytes;
406 host->col_addr += chip->ecc.bytes;
[all …]
H A Ddenali.c291 * Some commands are followed by chip->dev_ready or chip->waitfunc. in denali_cmd_ctrl()
308 struct nand_chip *chip, uint8_t *buf, in denali_check_erased_page() argument
312 uint8_t *ecc_code = chip->buffers->ecccode; in denali_check_erased_page()
313 int ecc_steps = chip->ecc.steps; in denali_check_erased_page()
314 int ecc_size = chip->ecc.size; in denali_check_erased_page()
315 int ecc_bytes = chip->ecc.bytes; in denali_check_erased_page()
318 ret = mtd_ooblayout_get_eccbytes(mtd, ecc_code, chip->oob_poi, 0, in denali_check_erased_page()
319 chip->ecc.total); in denali_check_erased_page()
330 chip->ecc.strength); in denali_check_erased_page()
349 struct nand_chip *chip = mtd_to_nand(mtd); in denali_hw_ecc_fixup() local
[all …]
/openbmc/u-boot/drivers/tpm/
H A Dtpm2_tis_core.c17 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_get_desc() local
24 dev->name, chip->vend_dev & 0xFFFF, in tpm_tis_get_desc()
25 chip->vend_dev >> 16, chip->rid, in tpm_tis_get_desc()
26 (chip->is_open ? "open" : "closed")); in tpm_tis_get_desc()
39 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_check_locality() local
40 struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; in tpm_tis_check_locality()
47 chip->locality = loc; in tpm_tis_check_locality()
64 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_request_locality() local
65 struct tpm_tis_phy_ops *phy_ops = chip->phy_ops; in tpm_tis_request_locality()
74 stop = chip->timeout_a; in tpm_tis_request_locality()
[all …]
H A Dtpm_tis_st33zp24_i2c.c112 * @param: chip, the tpm chip description.
123 * @param: chip, the tpm chip description
128 struct tpm_chip *chip = dev_get_priv(dev); in st33zp24_i2c_check_locality() local
136 return chip->locality; in st33zp24_i2c_check_locality()
143 * @param: chip, the chip description
148 struct tpm_chip *chip = dev_get_priv(dev); in st33zp24_i2c_request_locality() local
153 if (st33zp24_i2c_check_locality(dev) == chip->locality) in st33zp24_i2c_request_locality()
154 return chip->locality; in st33zp24_i2c_request_locality()
163 stop = chip->timeout_a; in st33zp24_i2c_request_locality()
166 return chip->locality; in st33zp24_i2c_request_locality()
[all …]
H A Dtpm2_tis_spi.c159 /* If an error occurred, release the chip by deasserting the CS */ in tpm_tis_spi_xfer()
194 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_spi_check_locality() local
203 chip->locality = loc; in tpm_tis_spi_check_locality()
227 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_spi_request_locality() local
250 stop = chip->timeout_a; in tpm_tis_spi_request_locality()
273 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_spi_status() local
275 return tpm_tis_spi_read(dev, TPM_STS(chip->locality), status, 1); in tpm_tis_spi_status()
300 struct tpm_chip *chip = dev_get_priv(dev); in tpm_tis_spi_get_burstcount() local
306 stop = chip->timeout_d; in tpm_tis_spi_get_burstcount()
308 ret = tpm_tis_spi_read32(dev, TPM_STS(chip->locality), in tpm_tis_spi_get_burstcount()
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dpca953x.c30 uint8_t chip; member
41 static int pca953x_ngpio(uint8_t chip) in pca953x_ngpio() argument
46 if (pca953x_chip_ngpios[i].chip == chip) in pca953x_ngpio()
52 static int pca953x_ngpio(uint8_t chip) in pca953x_ngpio() argument
61 static int pca953x_reg_write(uint8_t chip, uint addr, uint mask, uint data) in pca953x_reg_write() argument
66 if (pca953x_ngpio(chip) <= 8) { in pca953x_reg_write()
67 if (i2c_read(chip, addr, 1, &valb, 1)) in pca953x_reg_write()
73 return i2c_write(chip, addr, 1, &valb, 1); in pca953x_reg_write()
75 if (i2c_read(chip, addr << 1, 1, (u8*)&valw, 2)) in pca953x_reg_write()
83 return i2c_write(chip, addr << 1, 1, (u8*)&valw, 2); in pca953x_reg_write()
[all …]
H A Dtca642x.c46 static int tca642x_reg_write(uchar chip, uint8_t addr, in tca642x_reg_write() argument
56 if (i2c_read(chip, addr, 1, (uint8_t *)&valw, 1)) { in tca642x_reg_write()
64 ret = i2c_write(chip, addr, 1, (u8 *)&valw, 1); in tca642x_reg_write()
71 static int tca642x_reg_read(uchar chip, uint8_t addr, uint8_t *data) in tca642x_reg_read() argument
79 if (i2c_read(chip, addr, 1, (u8 *)&valw, 1)) { in tca642x_reg_read()
95 int tca642x_set_val(uchar chip, uint8_t gpio_bank, in tca642x_set_val() argument
100 return tca642x_reg_write(chip, out_reg, reg_bit, data); in tca642x_set_val()
107 int tca642x_set_pol(uchar chip, uint8_t gpio_bank, in tca642x_set_pol() argument
112 return tca642x_reg_write(chip, pol_reg, reg_bit, data); in tca642x_set_pol()
119 int tca642x_set_dir(uchar chip, uint8_t gpio_bank, in tca642x_set_dir() argument
[all …]
/openbmc/qemu/tests/qtest/
H A Dpnv-xscom-test.c15 static uint64_t pnv_xscom_read(QTestState *qts, const PnvChip *chip, in pnv_xscom_read() argument
18 return qtest_readq(qts, pnv_xscom_addr(chip, pcba)); in pnv_xscom_read()
21 static void test_xscom_cfam_id(QTestState *qts, const PnvChip *chip) in test_xscom_cfam_id() argument
23 uint64_t f000f = pnv_xscom_read(qts, chip, 0xf000f); in test_xscom_cfam_id()
25 g_assert_cmphex(f000f, ==, chip->cfam_id); in test_xscom_cfam_id()
30 const PnvChip *chip = data; in test_cfam_id() local
34 if (chip->chip_type == PNV_CHIP_POWER9) { in test_cfam_id()
36 } else if (chip->chip_type == PNV_CHIP_POWER10) { in test_cfam_id()
41 machine, chip->cpu_model); in test_cfam_id()
42 test_xscom_cfam_id(qts, chip); in test_cfam_id()
[all …]
H A Dpnv-spi-seeprom-test.c37 static void pnv_spi_xscom_write(QTestState *qts, const PnvChip *chip, in pnv_spi_xscom_write() argument
41 qtest_writeq(qts, pnv_xscom_addr(chip, pcba), val); in pnv_spi_xscom_write()
44 static uint64_t pnv_spi_xscom_read(QTestState *qts, const PnvChip *chip, in pnv_spi_xscom_read() argument
48 return qtest_readq(qts, pnv_xscom_addr(chip, pcba)); in pnv_spi_xscom_read()
51 static void spi_seeprom_transaction(QTestState *qts, const PnvChip *chip) in spi_seeprom_transaction() argument
54 pnv_spi_xscom_write(qts, chip, SPI_CTR_CFG_REG, READ_OP_COUNTER_CONFIG); in spi_seeprom_transaction()
55 pnv_spi_xscom_write(qts, chip, SPI_SEQ_OP_REG, READ_OP_SEQUENCER); in spi_seeprom_transaction()
56 pnv_spi_xscom_write(qts, chip, SPI_XMIT_DATA_REG, READ_OP_TDR_DATA); in spi_seeprom_transaction()
57 pnv_spi_xscom_write(qts, chip, SPI_XMIT_DATA_REG, 0); in spi_seeprom_transaction()
59 uint64_t rdr_val = pnv_spi_xscom_read(qts, chip, SPI_RCV_DATA_REG); in spi_seeprom_transaction()
[all …]
/openbmc/u-boot/drivers/net/
H A Dftmac110.c70 struct ftmac110_chip *chip = dev->priv; in mdio_read() local
71 struct ftmac110_regs *regs = chip->regs; in mdio_read()
99 struct ftmac110_chip *chip = dev->priv; in mdio_write() local
100 struct ftmac110_regs *regs = chip->regs; in mdio_write()
125 struct ftmac110_chip *chip = dev->priv; in ftmac110_phyqry() local
135 chip->phy_addr = pa; in ftmac110_phyqry()
144 chip->lnkup = 0; in ftmac110_phyqry()
145 bmcr = mdio_read(dev, chip->phy_addr, MII_BMCR); in ftmac110_phyqry()
148 bmsr = mdio_read(dev, chip->phy_addr, MII_BMSR); in ftmac110_phyqry()
149 chip->lnkup = (bmsr & BMSR_LSTATUS) ? 1 : 0; in ftmac110_phyqry()
[all …]
/openbmc/gpioplus/src/gpioplus/
H A Dchip.hpp11 /** @brief Information about the queried gpio chip */
14 /** @brief Kernel name of the chip */
16 /** @brief Functional name of the chip */
18 /** @brief Number of lines on the chip */
48 /** @brief name of the line as specified by the gpio chip */
54 /** @class Chip
55 * @brief Handle to a gpio chip
56 * @details Provides a c++ interface to gpio chip operations
58 class Chip class
61 /** @brief Creates a new chip from chip id
[all …]
/openbmc/qemu/hw/ppc/
H A Dpnv.c96 * per chip.
114 _FDT((fdt_setprop_cell(fdt, off, "ibm,chip-id", chip_id))); in pnv_dt_memory()
139 static int pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt) in pnv_dt_core() argument
147 PnvChipClass *pnv_cc = PNV_CHIP_GET_CLASS(chip); in pnv_dt_core()
161 pnv_cc->get_pir_tir(chip, pc->hwid, 0, &pir, &tir); in pnv_dt_core()
171 _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id", chip->chip_id))); in pnv_dt_core()
248 pnv_cc->get_pir_tir(chip, pc->hwid, i, &pir, NULL); in pnv_dt_core()
251 pnv_cc->get_pir_tir(chip, pc->hwid + 1, i, &pir, NULL); in pnv_dt_core()
260 pnv_cc->get_pir_tir(chip, pc->hwid, i, &pir, NULL); in pnv_dt_core()
271 static void pnv_dt_icp(PnvChip *chip, void *fdt, uint32_t hwid, in pnv_dt_icp() argument
[all …]
H A Dpnv_xscom.c56 static uint32_t pnv_xscom_pcba(PnvChip *chip, uint64_t addr) in pnv_xscom_pcba() argument
58 return PNV_CHIP_GET_CLASS(chip)->xscom_pcba(chip, addr); in pnv_xscom_pcba()
61 static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba) in xscom_read_default() argument
65 return PNV_CHIP_GET_CLASS(chip)->chip_cfam_id; in xscom_read_default()
106 static bool xscom_write_default(PnvChip *chip, uint32_t pcba, uint64_t val) in xscom_write_default() argument
110 case 0xf000f: /* chip id is RO */ in xscom_write_default()
151 PnvChip *chip = opaque; in xscom_read() local
152 uint32_t pcba = pnv_xscom_pcba(chip, addr); in xscom_read()
157 val = xscom_read_default(chip, pcba); in xscom_read()
162 val = address_space_ldq(&chip->xscom_as, (uint64_t) pcba << 3, in xscom_read()
[all …]
/openbmc/u-boot/drivers/misc/
H A Dds4510.c32 static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count) in ds4510_mem_write() argument
42 if (i2c_write(chip, offset, 1, &buf[i], wrlen)) in ds4510_mem_write()
61 static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count) in ds4510_mem_read() argument
63 return i2c_read(chip, offset, 1, buf, count); in ds4510_mem_read()
71 static int ds4510_see_write(uint8_t chip, uint8_t nv) in ds4510_see_write() argument
75 if (i2c_read(chip, DS4510_CFG, 1, &data, 1)) in ds4510_see_write()
83 return ds4510_mem_write(chip, DS4510_CFG, &data, 1); in ds4510_see_write()
89 static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay) in ds4510_rstdelay_write() argument
93 if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1)) in ds4510_rstdelay_write()
99 return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1); in ds4510_rstdelay_write()
[all …]
/openbmc/u-boot/drivers/usb/gadget/
H A Dfotg210.c38 struct fotg210_chip *chip; member
66 static inline int fifo_to_ep(struct fotg210_chip *chip, int id, int in) in fifo_to_ep() argument
71 static inline int ep_to_fifo(struct fotg210_chip *chip, int id) in ep_to_fifo() argument
76 static inline int ep_reset(struct fotg210_chip *chip, uint8_t ep_addr) in ep_reset() argument
79 struct fotg210_regs *regs = chip->regs; in ep_reset()
100 static int fotg210_reset(struct fotg210_chip *chip) in fotg210_reset() argument
102 struct fotg210_regs *regs = chip->regs; in fotg210_reset()
105 chip->state = USB_STATE_POWERED; in fotg210_reset()
107 /* chip enable */ in fotg210_reset()
111 chip->addr = 0; in fotg210_reset()
[all …]
/openbmc/u-boot/drivers/mmc/
H A Dftsdc010_mci.c57 struct ftsdc010_chip chip; member
65 struct ftsdc010_chip *chip = mmc->priv; in ftsdc010_send_cmd() local
66 struct ftsdc010_mmc __iomem *regs = chip->regs; in ftsdc010_send_cmd()
75 if (chip->acmd) { in ftsdc010_send_cmd()
77 chip->acmd = 0; in ftsdc010_send_cmd()
127 chip->acmd = 1; in ftsdc010_send_cmd()
135 struct ftsdc010_chip *chip = mmc->priv; in ftsdc010_clkset() local
136 struct ftsdc010_mmc __iomem *regs = chip->regs; in ftsdc010_clkset()
140 if (rate >= chip->sclk / (2 * (div + 1))) in ftsdc010_clkset()
143 chip->rate = chip->sclk / (2 * (div + 1)); in ftsdc010_clkset()
[all …]
/openbmc/u-boot/drivers/usb/host/
H A DKconfig50 bool "Support for Rockchip on-chip xHCI USB controller"
56 Enables support for the on-chip xHCI controller on Rockchip SoCs.
67 bool "Support for STMicroelectronics STiH407 family on-chip xHCI USB controller"
71 Enables support for the on-chip xHCI controller on STMicroelectronics
76 bool "Support for Xilinx ZynqMP on-chip xHCI USB controller"
80 Enables support for the on-chip xHCI controller on Xilinx ZynqMP SoCs.
92 bool "Support for NXP Layerscape on-chip xHCI USB controller"
96 Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
122 bool "Support for Aspeed on-chip EHCI USB controller"
126 Enables support for the on-chip EHCI controller on ASPEED chips.
[all …]
/openbmc/openbmc/meta-facebook/meta-ventura/recipes-ventura/plat-svc/files/
H A Dgpio_util3 # Get GPIO chip and line number by GPIO name
5 # Echo: "<chip> <line>"
9 /^gpiochip/ {chip=$1}
12 print chip, $2
22 local chip line gpio_val
23 read -r chip line < <(get_gpio_by_name "$name")
26 if ! gpio_val="$(gpioget "$chip" "$line" 2>/dev/null)"; then
29 if ! gpio_val=$(get_gpio_val_from_debugfs "$chip" "$line"); then
37 # Get GPIO logic level (0/1) from /sys/kernel/debug/gpio by chip and line offset
38 # Args: $1 = chip number/name, $2 = line offset
[all …]
/openbmc/openpower-hw-diags/analyzer/plugins/
H A Dplugin.hpp19 // Use of these plugins should be limited to avoid maintaining chip specific
27 // - The plugin instance for plugins that may be defined for a chip that has
29 // - The chip containing the root cause attention.
33 std::function<void(unsigned int, const libhei::Chip&, ServiceData&)>;
35 // These are provided as know chip types for plugin definitions.
72 /** A nested map that contains the function for each chip type and plugin
80 * @param i_type The chip type associated with the plugin.
104 * @param i_type The chip type associated with the plugin.
136 #define __PLUGIN_DEFINE(CHIP, NAME, FUNC) \ argument
137 class __PLUGIN_MAKE(Plugin_, CHIP, NAME) \
[all …]
/openbmc/u-boot/drivers/i2c/
H A Di2c-uclass.c43 * i2c_setup_offset() - Set up a new message with a chip offset
45 * @chip: Chip to use
46 * @offset: Byte offset within chip
52 static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset, in i2c_setup_offset() argument
55 int offset_len = chip->offset_len; in i2c_setup_offset()
57 msg->addr = chip->chip_addr; in i2c_setup_offset()
58 if (chip->chip_addr_offset_mask) in i2c_setup_offset()
60 chip->chip_addr_offset_mask; in i2c_setup_offset()
61 msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0; in i2c_setup_offset()
62 msg->len = chip->offset_len; in i2c_setup_offset()
[all …]

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