Home
last modified time | relevance | path

Searched +full:bus +full:- +full:frequency (Results 1 – 25 of 1047) sorted by relevance

12345678910>>...42

/openbmc/u-boot/arch/arm/dts/
H A Dast2600-bletchley.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
5 #include "ast2600-u-boot.dtsi"
9 compatible = "facebook,bletchley-bmc", "aspeed,ast2600";
17 stdout-path = &uart5;
35 clock-frequency = <800000000>;
38 clock-frequency = <800000000>;
44 u-boot,dm-pre-reloc;
49 clock-frequency = <400000000>;
66 pinctrl-names = "default";
[all …]
H A Dast2600-slt.dts1 /dts-v1/;
3 #include "ast2600-u-boot.dtsi"
12 stdout-path = &uart5;
30 clock-frequency = <800000000>;
33 clock-frequency = <800000000>;
39 u-boot,dm-pre-reloc;
44 clock-frequency = <400000000>;
48 u-boot,dm-pre-reloc;
53 u-boot,dm-pre-reloc;
58 u-boot,dm-pre-reloc;
[all …]
H A Dast2600-pfr.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /dts-v1/;
4 #include "ast2600-u-boot.dtsi"
8 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
16 stdout-path = &uart5;
34 clock-frequency = <800000000>;
37 clock-frequency = <800000000>;
43 u-boot,dm-pre-reloc;
48 clock-frequency = <400000000>;
65 pinctrl-names = "default";
[all …]
H A Dast2600-intel.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "ast2600-u-boot.dtsi"
8 compatible = "aspeed,ast2600-intel", "aspeed,ast2600";
16 stdout-path = &uart5;
34 clock-frequency = <1200000000>;
37 clock-frequency = <1200000000>;
43 u-boot,dm-pre-reloc;
48 clock-frequency = <400000000>;
65 pinctrl-names = "default";
[all …]
H A Dast2600-evb.dts1 /dts-v1/;
3 #include "ast2600-u-boot.dtsi"
7 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
15 stdout-path = &uart5;
33 clock-frequency = <800000000>;
36 clock-frequency = <800000000>;
42 u-boot,dm-pre-reloc;
47 clock-frequency = <400000000>;
64 pinctrl-names = "default";
65 pinctrl-0 = < &pinctrl_mdio1_default &pinctrl_mdio2_default
[all …]
H A Dast2500-evb.dts1 /dts-v1/;
3 #include "ast2500-u-boot.dtsi"
7 compatible = "aspeed,ast2500-evb", "aspeed,ast2500";
15 stdout-path = &uart5;
27 u-boot,dm-pre-reloc;
32 clock-frequency = <400000000>;
36 u-boot,dm-pre-reloc;
41 u-boot,dm-pre-reloc;
46 u-boot,dm-pre-reloc;
52 phy-mode = "rgmii";
[all …]
H A Dast2400-evb.dts1 /dts-v1/;
3 #include "ast2400-u-boot.dtsi"
7 compatible = "aspeed,ast2400-evb", "aspeed,ast2400";
15 stdout-path = &uart5;
27 u-boot,dm-pre-reloc;
32 clock-frequency = <200000000>;
36 u-boot,dm-pre-reloc;
41 u-boot,dm-pre-reloc;
47 phy-mode = "rgmii";
49 pinctrl-names = "default";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dopencores,i2c-ocores.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/opencores,i2c-ocores.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Korsgaard <peter@korsgaard.com>
11 - Andrew Lunn <andrew@lunn.ch>
14 - $ref: /schemas/i2c/i2c-controller.yaml#
19 - items:
20 - enum:
21 - sifive,fu740-c000-i2c # Opencore based IP block FU740-C000 SoC
[all …]
H A Di2c.txt7 Required properties (per bus)
8 -----------------------------
10 - #address-cells - should be <1>. Read more about addresses below.
11 - #size-cells - should be <0>.
12 - compatible - name of I2C bus controller
17 The cells properties above define that an address of children of an I2C bus
20 Optional properties (per bus)
21 -----------------------------
26 - clock-frequency
27 frequency of bus clock in Hz.
[all …]
/openbmc/linux/drivers/devfreq/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
9 operating frequency based on the device driver's policy.
19 clock frequency of the device, which is also attached
20 to a device by 1-to-1. The device registering devfreq takes the
21 responsibility to "interpret" the representative frequency and
37 Chooses frequency based on the recent load on the device. Works
39 Simple-Ondemand should be able to provide busy/total counter
46 Sets the frequency at the maximum available frequency.
47 This governor always returns UINT_MAX as frequency so that
[all …]
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186-evb.dts1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 /dts-v1/;
10 chassis-type = "embedded";
11 compatible = "mediatek,mt8186-evb", "mediatek,mt8186";
18 stdout-path = "serial0:921600n8";
30 clock-frequency = <400000>;
31 pinctrl-names = "default";
32 pinctrl-0 = <&i2c0_pins>;
38 clock-frequency = <400000>;
39 i2c-scl-internal-delay-ns = <8000>;
[all …]
/openbmc/u-boot/drivers/spi/
H A Dzynq_spi.c1 // SPDX-License-Identifier: GPL-2.0+
56 u32 frequency; /* input frequency */ member
69 u32 freq; /* required frequency */
72 static int zynq_spi_ofdata_to_platdata(struct udevice *bus) in zynq_spi_ofdata_to_platdata() argument
74 struct zynq_spi_platdata *plat = bus->platdata; in zynq_spi_ofdata_to_platdata()
75 const void *blob = gd->fdt_blob; in zynq_spi_ofdata_to_platdata()
76 int node = dev_of_offset(bus); in zynq_spi_ofdata_to_platdata()
78 plat->regs = (struct zynq_spi_regs *)devfdt_get_addr(bus); in zynq_spi_ofdata_to_platdata()
81 plat->frequency = fdtdec_get_int(blob, node, "spi-max-frequency", in zynq_spi_ofdata_to_platdata()
83 plat->deactivate_delay_us = fdtdec_get_int(blob, node, in zynq_spi_ofdata_to_platdata()
[all …]
H A Drk_spi.c1 // SPDX-License-Identifier: GPL-2.0+
7 * (C) Copyright 2008-2013 Rockchip Electronics
14 #include <dt-structs.h>
31 s32 frequency; /* Default clock frequency, -1 for none */ member
55 debug("ctrl0: \t\t0x%08x\n", readl(&regs->ctrlr0)); in rkspi_dump_regs()
56 debug("ctrl1: \t\t0x%08x\n", readl(&regs->ctrlr1)); in rkspi_dump_regs()
57 debug("ssienr: \t\t0x%08x\n", readl(&regs->enr)); in rkspi_dump_regs()
58 debug("ser: \t\t0x%08x\n", readl(&regs->ser)); in rkspi_dump_regs()
59 debug("baudr: \t\t0x%08x\n", readl(&regs->baudr)); in rkspi_dump_regs()
60 debug("txftlr: \t\t0x%08x\n", readl(&regs->txftlr)); in rkspi_dump_regs()
[all …]
H A Dtegra20_sflash.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2010-2013 NVIDIA Corporation
15 #include <asm/arch-tegra/clk_rst.h>
76 int tegra20_sflash_cs_info(struct udevice *bus, unsigned int cs, in tegra20_sflash_cs_info() argument
79 /* Tegra20 SPI-Flash - only 1 device ('bus/cs') */ in tegra20_sflash_cs_info()
81 return -ENODEV; in tegra20_sflash_cs_info()
86 static int tegra20_sflash_ofdata_to_platdata(struct udevice *bus) in tegra20_sflash_ofdata_to_platdata() argument
88 struct tegra_spi_platdata *plat = bus->platdata; in tegra20_sflash_ofdata_to_platdata()
89 const void *blob = gd->fdt_blob; in tegra20_sflash_ofdata_to_platdata()
90 int node = dev_of_offset(bus); in tegra20_sflash_ofdata_to_platdata()
[all …]
H A Dexynos_spi.c1 // SPDX-License-Identifier: GPL-2.0+
25 s32 frequency; /* Default clock frequency, -1 for none */ member
32 unsigned int freq; /* Default frequency */
47 clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST); in spi_flush_fifo()
48 clrbits_le32(&regs->ch_cfg, SPI_CH_RST); in spi_flush_fifo()
49 setbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON); in spi_flush_fifo()
55 uint32_t spi_sts = readl(&regs->spi_sts); in spi_get_fifo_levels()
75 setbits_le32(&regs->mode_cfg, in spi_request_bytes()
78 setbits_le32(&regs->swap_cfg, SPI_TX_SWAP_EN | SPI_RX_SWAP_EN | in spi_request_bytes()
83 clrbits_le32(&regs->mode_cfg, in spi_request_bytes()
[all …]
H A Dtegra20_slink.c1 // SPDX-License-Identifier: GPL-2.0
3 * NVIDIA Tegra SPI-SLINK controller
5 * Copyright (c) 2010-2013 NVIDIA Corporation
12 #include <asm/arch-tegra/clk_rst.h>
92 static int tegra30_spi_ofdata_to_platdata(struct udevice *bus) in tegra30_spi_ofdata_to_platdata() argument
94 struct tegra_spi_platdata *plat = bus->platdata; in tegra30_spi_ofdata_to_platdata()
95 const void *blob = gd->fdt_blob; in tegra30_spi_ofdata_to_platdata()
96 int node = dev_of_offset(bus); in tegra30_spi_ofdata_to_platdata()
98 plat->base = devfdt_get_addr(bus); in tegra30_spi_ofdata_to_platdata()
99 plat->periph_id = clock_decode_periph_id(bus); in tegra30_spi_ofdata_to_platdata()
[all …]
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-impedance-analyzer-ad59331 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_start
4 Contact: linux-iio@vger.kernel.org
6 Frequency sweep start frequency in Hz.
8 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_increment
11 Contact: linux-iio@vger.kernel.org
13 Frequency increment in Hz (step size) between consecutive
14 frequency points along the sweep.
16 What: /sys/bus/iio/devices/iio:deviceX/out_altvoltageY_frequency_points
19 Contact: linux-iio@vger.kernel.org
21 Number of frequency points (steps) in the frequency sweep.
[all …]
H A Dsysfs-platform-dptf1 What: /sys/bus/platform/devices/INT3407:00/dptf_power/charger_type
4 Contact: linux-acpi@vger.kernel.org
6 (RO) The charger type - Traditional, Hybrid or NVDC.
8 What: /sys/bus/platform/devices/INT3407:00/dptf_power/adapter_rating_mw
11 Contact: linux-acpi@vger.kernel.org
16 What: /sys/bus/platform/devices/INT3407:00/dptf_power/max_platform_power_mw
19 Contact: linux-acpi@vger.kernel.org
24 What: /sys/bus/platform/devices/INT3407:00/dptf_power/platform_power_source
27 Contact: linux-acpi@vger.kernel.org
33 - 0x00 = DC
[all …]
/openbmc/linux/drivers/staging/iio/Documentation/
H A Dsysfs-bus-iio-dds2 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencyY
4 Contact: linux-iio@vger.kernel.org
6 Stores frequency into tuning word Y.
8 which allows for pin controlled FSK Frequency Shift Keying
13 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencyY_scale
15 Contact: linux-iio@vger.kernel.org
18 obtain the desired value in Hz. If shared across all frequency
22 What: /sys/bus/iio/devices/.../out_altvoltageX_frequencysymbol
24 Contact: linux-iio@vger.kernel.org
26 Specifies the active output frequency tuning word. The value
[all …]
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dspi-stm32-qspi.txt2 --------------------------------------------
5 - compatible : should be "st,stm32-qspi".
6 - reg : 1. Physical base address and size of SPI registers map.
8 - spi-max-frequency : Max supported spi frequency.
9 - status : enable in requried dts.
12 --------------------------
13 - spi-max-frequency : Max supported spi frequency.
14 - spi-tx-bus-width : Bus width (number of lines) for writing (1-4)
15 - spi-rx-bus-width : Bus width (number of lines) for reading (1-4)
16 - memory-map : Address and size for memory-mapping the flash
[all …]
/openbmc/linux/arch/powerpc/sysdev/
H A Dmpc5xxx_clocks.c1 // SPDX-License-Identifier: GPL-2.0
10 * mpc5xxx_fwnode_get_bus_frequency - Find the bus frequency for a firmware node
13 * Returns bus frequency (IPS on MPC512x, IPB on MPC52xx),
14 * or 0 if the bus frequency cannot be found.
22 ret = fwnode_property_read_u32(fwnode, "bus-frequency", &bus_freq); in mpc5xxx_fwnode_get_bus_frequency()
27 ret = fwnode_property_read_u32(parent, "bus-frequency", &bus_freq); in mpc5xxx_fwnode_get_bus_frequency()
/openbmc/u-boot/doc/driver-model/
H A Dspi-howto.txt4 Here is a rough step-by-step guide. It is based around converting the
6 around U-Boot v2014.10-rc2 (commit be9f643). This has been updated for
13 exists, but now it is 'per-child data' for the SPI bus. Each child of the
14 SPI bus is a SPI slave. The information that was stored in the
15 driver-specific slave structure can now be port in private data for the
16 SPI bus.
25 In this case 'slave' will be in per-child data, and 'ctrl' will be in the
35 - methods to set speed and mode are separated out
36 - cs_info is used to get information on a chip select
65 return -ENODEV;
[all …]
/openbmc/linux/drivers/net/ethernet/xilinx/
H A Dxilinx_axienet_mdio.c1 // SPDX-License-Identifier: GPL-2.0
3 * MDIO bus driver for the Xilinx Axi Ethernet device
6 * Copyright (c) 2010 - 2011 Michal Simek <monstr@monstr.eu>
7 * Copyright (c) 2010 - 2011 PetaLogix
9 * Copyright (c) 2010 - 2012 Xilinx, Inc. All rights reserved.
37 ((u32)lp->mii_clk_div | XAE_MDIO_MC_MDIOEN_MASK)); in axienet_mdio_mdc_enable()
51 * axienet_mdio_read - MDIO interface read function
52 * @bus: Pointer to mii bus structure
56 * Return: The register contents on success, -ETIMEDOUT on a timeout
62 static int axienet_mdio_read(struct mii_bus *bus, int phy_id, int reg) in axienet_mdio_read() argument
[all …]
/openbmc/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
21 Documentation/devicetree/bindings/devfreq/event/rockchip-dfi.txt.
26 clock-names:
28 - const: dmc_clk
[all …]

12345678910>>...42