| /openbmc/qemu/block/ |
| H A D | blkdebug.c | 4 * Copyright (C) 2016-2017 Red Hat, Inc. 29 #include "qemu/config-file.h" 30 #include "block/block-io.h" 35 #include "qapi/qapi-visit-block-core.h" 39 #include "qapi/qobject-input-visitor.h" 42 /* All APIs are thread-safe */ 116 .name = "inject-error", 120 .name = "event", 124 .name = "state", 128 .name = "iotype", [all …]
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| H A D | iscsi.c | 4 * Copyright (c) 2010-2011 Ronnie Sahlberg <ronniesahlberg@gmail.com> 5 * Copyright (c) 2012-2017 Peter Lieven <pl@kamp.de> 32 #include "qemu/config-file.h" 33 #include "qemu/error-report.h" 36 #include "block/block-io.h" 46 #include "qapi/qapi-commands-machine.h" 57 #include <iscsi/scsi-lowlevel.h> 78 struct scsi_inquiry_block_limits bl; member 83 * unallocated pages (iscsilun->lprz) we can directly return zeros instead 143 /* this threshold is a trade-off knob to choose between [all …]
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| H A D | blkio.c | 1 /* SPDX-License-Identifier: LGPL-2.1-or-later */ 15 #include "exec/cpu-common.h" /* for qemu_ram_get_fd() */ 16 #include "qemu/defer-call.h" 18 #include "qemu/error-report.h" 21 #include "system/block-backend.h" 24 #include "block/block-io.h" 38 * libblkio is not thread-safe so this lock protects ->blkio and 39 * ->blkioq. 43 struct blkioq *blkioq; /* make this multi-queue in the future... */ 55 * Protects ->bounce_pool, ->bounce_bufs, ->bounce_available. [all …]
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| H A D | file-posix.c | 28 #include "qemu/error-report.h" 29 #include "block/block-io.h" 36 #include "block/thread-pool.h" 38 #include "block/raw-aio.h" 42 #include "scsi/pr-manager.h" 76 #include <linux/dm-ioctl.h> 146 * - DM_MPATH_PROBE_PATHS returns success, but before SG_IO completes, another 149 * - DM_MPATH_PROBE_PATHS failed all paths in the current path group, so we have 154 * failover), it's rare to have more than eight path groups - and even then 171 * s->fd. */ [all …]
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| H A D | file-win32.c | 28 #include "block/block-io.h" 32 #include "block/raw-aio.h" 34 #include "block/thread-pool.h" 69 * Returns the number of bytes handles or -errno in case of an error. Short 77 for (i = 0; i < aiocb->aio_niov; i++) { in handle_aiocb_rw() 82 ov.Offset = (aiocb->aio_offset + offset); in handle_aiocb_rw() 83 ov.OffsetHigh = (aiocb->aio_offset + offset) >> 32; in handle_aiocb_rw() 84 len = aiocb->aio_iov[i].iov_len; in handle_aiocb_rw() 85 if (aiocb->aio_type & QEMU_AIO_WRITE) { in handle_aiocb_rw() 86 ret = WriteFile(aiocb->hfile, aiocb->aio_iov[i].iov_base, in handle_aiocb_rw() [all …]
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| H A D | blklogwrites.c | 6 * Copyright (c) 2018-2024 Ari Sundholm <ari@tuxera.com> 9 * See the COPYING file in the top-level directory. 15 #include "block/block-io.h" 23 /* Disk format stuff - taken from Linux drivers/md/dm-log-writes.c */ 37 /* All fields are little-endian. */ 72 * The super block sequence number. Non-zero if a super block update is in 80 * A coroutine-aware queue to serialize super block updates. 89 .name = "blklogwrites", 93 .name = "log-append", 98 .name = "log-sector-size", [all …]
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| H A D | nbd.c | 36 #include "qemu/main-loop.h" 38 #include "qapi/qapi-visit-sockets.h" 40 #include "qapi/clone-visitor.h" 52 #define COOKIE_TO_INDEX(cookie) ((cookie) - 1) 115 BDRVNBDState *s = (BDRVNBDState *)bs->opaque; in nbd_clear_bdrvstate() 117 nbd_client_connection_release(s->conn); in nbd_clear_bdrvstate() 118 s->conn = NULL; in nbd_clear_bdrvstate() 120 yank_unregister_instance(BLOCKDEV_YANK_INSTANCE(bs->node_name)); in nbd_clear_bdrvstate() 123 assert(!s->reconnect_delay_timer); in nbd_clear_bdrvstate() 124 assert(!s->open_timer); in nbd_clear_bdrvstate() [all …]
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| /openbmc/u-boot/board/Seagate/goflexhome/ |
| H A D | goflexhome.c | 1 // SPDX-License-Identifier: GPL-2.0+ 16 #include <asm/mach-types.h> 26 /* Multi-Purpose Pins Functionality configuration */ in board_early_init_f() 98 gd->bd->bi_arch_number = MACH_TYPE_GOFLEXHOME; in board_init() 101 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; in board_init() 112 char *name = "egiga0"; in reset_phy() local 114 if (miiphy_set_current_dev(name)) in reset_phy() 118 if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) { in reset_phy() 128 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 129 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() [all …]
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| /openbmc/skeleton/op-flasher/ |
| H A D | flasher_obj.c | 7 * http://www.apache.org/licenses/LICENSE-2.0 49 static struct blocklevel_device *bl; variable 64 rc = arch_flash_erase_chip(bl); in erase_chip() 84 "org.openbmc.control.Flash", /* name */ in flash_message() 86 "org.openbmc.Flash", /* interface name */ in flash_message() 99 -1, in flash_message() 114 if(fd == -1) { in program_file() 135 size -= len; in program_file() 137 rc = blocklevel_write(bl, start, file_buf, len); in program_file() 165 arch_flash_close(bl, NULL); in flash_access_cleanup() [all …]
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| /openbmc/u-boot/doc/device-tree-bindings/pwm/ |
| H A D | pwm.txt | 5 ----------------- 8 with a property containing a 'pwm-list': 10 pwm-list ::= <single-pwm> [pwm-list] 11 single-pwm ::= <pwm-phandle> <pwm-specifier> 12 pwm-phandle : phandle to PWM controller node 13 pwm-specifier : array of #pwm-cells specifying the given PWM 18 An optional property "pwm-names" may contain a list of strings to label 19 each of the PWM devices listed in the "pwms" property. If no "pwm-names" 20 property is given, the name of the user node will be used as fallback. 23 "pwm-names" property to map the name of the PWM device requested by the [all …]
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| /openbmc/u-boot/board/Seagate/dockstar/ |
| H A D | dockstar.c | 1 // SPDX-License-Identifier: GPL-2.0+ 17 #include <asm/mach-types.h> 33 /* Multi-Purpose Pins Functionality configuration */ in board_early_init_f() 96 gd->bd->bi_arch_number = MACH_TYPE_DOCKSTAR; in board_init() 99 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; in board_init() 110 char *name = "egiga0"; in reset_phy() local 112 if (miiphy_set_current_dev(name)) in reset_phy() 116 if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) { in reset_phy() 126 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2); in reset_phy() 127 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®); in reset_phy() [all …]
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| /openbmc/u-boot/arch/powerpc/cpu/mpc86xx/ |
| H A D | cpu.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2006,2009-2010 Freescale Semiconductor, Inc. 38 volatile ccsr_gur_t *gur = &immap->im_gur; in checkcpu() 54 cpu = gd->arch.cpu; in checkcpu() 56 puts(cpu->name); in checkcpu() 66 if (gur->pordevsr & MPC86xx_PORDEVSR_CORE1TE) in checkcpu() 68 debug(" (MSSCR0=%x, PORDEVSR=%x)", msscr0, gur->pordevsr); in checkcpu() 75 printf(" CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freq_processor)); in checkcpu() 76 printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freq_systembus)); in checkcpu() 77 printf(" DDR:%-4s MHz (%s MT/s data rate), ", in checkcpu() [all …]
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| /openbmc/qemu/pc-bios/vof/ |
| H A D | entry.S | 1 #define LOAD32(rn, name) \ argument 2 lis rn,name##@h; \ 3 ori rn,rn,name##@l 25 stwu %r1,-112(%r1) 28 bl prom_entry 41 /* This is the actual RTAS blob copied to the OS at instantiate-rtas */ 49 .long . - hv_rtas;
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| /openbmc/u-boot/arch/arm/lib/ |
| H A D | crt0_arm_efi.S | 1 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-2-Clause */ 3 * crt0-efi-arm.S - PE/COFF header for ARM EFI applications 7 * This file is taken and modified from the gnu-efi project. 10 #include <asm-generic/pe.h> 21 .long pe_header - image_base /* Offset to the PE header */ 31 .short section_table - optional_header /* SizeOfOptionalHeader */ 42 .long _edata - _start /* SizeOfCode */ 45 .long _start - image_base /* AddressOfEntryPoint */ 46 .long _start - image_base /* BaseOfCode */ 61 .long _edata - image_base /* SizeOfImage */ [all …]
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| H A D | crt0_aarch64_efi.S | 1 /* SPDX-License-Identifier: GPL-2.0+ OR BSD-2-Clause */ 3 * crt0-efi-aarch64.S - PE/COFF header for aarch64 EFI applications 8 * This file is taken and modified from the gnu-efi project. 11 #include <asm-generic/pe.h> 22 .long pe_header - ImageBase /* Offset to the PE header */ 32 .short section_table - optional_header /* SizeOfOptionalHeader */ 42 .long _edata - _start /* SizeOfCode */ 45 .long _start - ImageBase /* AddressOfEntryPoint */ 46 .long _start - ImageBase /* BaseOfCode */ 60 .long _edata - ImageBase /* SizeOfImage */ [all …]
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| /openbmc/u-boot/include/ |
| H A D | ppc_asm.tmpl | 1 /* SPDX-License-Identifier: GPL-2.0+ */ 3 * (C) Copyright 2000-2002 34 bl 1f ; \ 36 0: .long .LCTOC1-1f ; \ 39 lwz r0,0b-1b(r12) ; \ 42 #define GOT_ENTRY(NAME) .L_ ## NAME = . - .LCTOC1 ; .long NAME 44 #define GOT(NAME) .L_ ## NAME (r12) 87 #define ICR 148 /* Interrupt Cause Register (37-44) */ 89 #define COUNTA 150 /* Breakpoint Counter (37-44) */ 90 #define COUNTB 151 /* Breakpoint Counter (37-44) */ [all …]
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| /openbmc/qemu/tests/tcg/arm/system/ |
| H A D | boot.S | 9 * R0 - semihosting call number 10 * R1 - semihosting parameter 23 .macro endf name argument 24 .global \name 25 .type \name, %function 26 .size \name, . - \name 50 bl mmu_setup /* Set up the MMU */ 51 bl main /* Jump to main */ 57 ite EQ // if-then-else. "EQ" is for if equal, else otherwise 79 * PA[31:20] - Section Base Address [all …]
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | am335x-shc.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 11 #include <dt-bindings/input/input.h> 15 compatible = "ti,am335x-shc", "ti,am335x-bone", "ti,am33xx"; 29 operating-points = < 34 voltage-tolerance = <2>; /* 2 percentage */ 35 cpu0-supply = <&dcdc2_reg>; 40 compatible = "gpio-keys"; 46 debounce-interval = <1000>; 47 wakeup-source; [all …]
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| H A D | am335x-brppt1-mmc.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * http://www.br-automation.com 7 /dts-v1/; 15 fset: factory-settings { 16 bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; 18 order-no = "6PPT30 (MMC)"; 19 hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890"; 20 serial-no = "0"; 21 device-id = <0x0>; 22 parent-id = <0x0>; [all …]
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| /openbmc/qemu/docs/about/ |
| H A D | emulation.rst | 9 .. list-table:: Supported Guest Architectures for Emulation 11 :header-rows: 1 13 * - Architecture (qemu name) 14 - System 15 - User 16 - Notes 17 * - Alpha 18 - Yes 19 - Yes 20 - Legacy 64 bit RISC ISA developed by DEC [all …]
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| /openbmc/qemu/hw/block/ |
| H A D | virtio-blk.c | 10 * the COPYING file in the top-level directory. 15 #include "qemu/defer-call.h" 19 #include "qemu/error-report.h" 20 #include "qemu/main-loop.h" 24 #include "hw/qdev-properties.h" 26 #include "system/block-ram-registrar.h" 29 #include "hw/virtio/virtio-blk.h" 34 #include "hw/virtio/virtio-bus.h" 35 #include "migration/qemu-file-types.h" 36 #include "hw/virtio/iothread-vq-mapping.h" [all …]
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| /openbmc/u-boot/drivers/ddr/altera/ |
| H A D | sdram_arria10.c | 1 // SPDX-License-Identifier: GPL-2.0 24 /* FAWBANK - Number of Bank of a given device involved in the FAW period. */ 58 /* Chip - Row - Bank - Column Style */ 76 /* Chip - Bank - Row - Column Style */ 131 return -EPERM; in emif_reset() 150 return -EPERM; in emif_reset() 169 ret = wait_for_bit_le32(&socfpga_ecc_hmc_base->ddrcalstat, in ddr_setup() 180 return -EPERM; in ddr_setup() 185 return !!(readl(&socfpga_ecc_hmc_base->eccctrl) & in sdram_is_ecc_enabled() 195 gd->arch.tlb_addr = 0x4000; in sdram_init_ecc_bits() [all …]
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| /openbmc/qemu/include/block/ |
| H A D | block_int-common.h | 28 #include "block/block-common.h" 29 #include "block/block-global-state.h" 105 * certain callbacks that refer to data (see block.c) to their bs->file 106 * or bs->backing (whichever one exists) if the driver doesn't implement 108 * -ENOTSUP. 115 * (And this filtered child must then be bs->file or bs->backing.) 120 * If true, filtered child is bs->backing. Otherwise it's bs->file. 121 * Two internal filters use bs->backing as filtered child and has this 123 * filters in tests/unit/test-bdrv-graph-mod.c. 128 * similarly using bs->file as filtered child. [all …]
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| /openbmc/u-boot/drivers/bios_emulator/include/ |
| H A D | biosemu.h | 6 * Copyright (C) 1996-1999 SciTech Software, Inc. 14 * supporting documentation, and that the name of the authors not be used 56 /*---------------------- Macros and type definitions ----------------------*/ 75 vgaInfo - VGA BIOS information structure 76 biosmem_base - Base of the BIOS image 77 biosmem_limit - Limit of the BIOS image 78 busmem_base - Base of the VGA bus memory 79 timer - Timer used to emulate PC timer ports 80 timer0 - Latched value for timer 0 81 timer0Latched - true if timer 0 value was just latched [all …]
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| /openbmc/qemu/docs/devel/ |
| H A D | zoned-storage.rst | 2 zoned-storage 10 https://zonedstorage.io/docs/introduction/zoned-storage 13 ------------------------------------- 15 - BLK_Z_HM: The host-managed zoned model only allows sequential writes access 16 to zones. It supports ZBD-specific I/O commands that can be used by a host to 18 - BLK_Z_HA: The host-aware zoned model allows random write operations in 20 - BLK_Z_NONE: The non-zoned model has no zones support. It includes both 21 regular and drive-managed ZBD devices. ZBD-specific I/O commands are not 25 BlockLimits struct(BlockDriverState::bl) that is continuously accessed by the 27 a BlockDriverState graph(for example, raw format on top of file-posix). The [all …]
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