1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2013 Suriyan Ramasami <suriyan.r@gmail.com>
4 *
5 * Based on dockstar.c originally written by
6 * Copyright (C) 2010 Eric C. Cooper <ecc@cmu.edu>
7 *
8 * Based on sheevaplug.c originally written by
9 * Prafulla Wadaskar <prafulla@marvell.com>
10 * (C) Copyright 2009
11 * Marvell Semiconductor <www.marvell.com>
12 */
13
14 #include <common.h>
15 #include <miiphy.h>
16 #include <asm/mach-types.h>
17 #include <asm/arch/soc.h>
18 #include <asm/arch/mpp.h>
19 #include <asm/arch/cpu.h>
20 #include <asm/io.h>
21
22 DECLARE_GLOBAL_DATA_PTR;
23
board_early_init_f(void)24 int board_early_init_f(void)
25 {
26 /* Multi-Purpose Pins Functionality configuration */
27 static const u32 kwmpp_config[] = {
28 MPP0_NF_IO2,
29 MPP1_NF_IO3,
30 MPP2_NF_IO4,
31 MPP3_NF_IO5,
32 MPP4_NF_IO6,
33 MPP5_NF_IO7,
34 MPP6_SYSRST_OUTn,
35 MPP7_GPO,
36 MPP8_UART0_RTS,
37 MPP9_UART0_CTS,
38 MPP10_UART0_TXD,
39 MPP11_UART0_RXD,
40 MPP12_SD_CLK,
41 MPP13_SD_CMD,
42 MPP14_SD_D0,
43 MPP15_SD_D1,
44 MPP16_SD_D2,
45 MPP17_SD_D3,
46 MPP18_NF_IO0,
47 MPP19_NF_IO1,
48 MPP20_GPIO,
49 MPP21_GPIO,
50 MPP22_GPIO,
51 MPP23_GPIO,
52 MPP24_GPIO,
53 MPP25_GPIO,
54 MPP26_GPIO,
55 MPP27_GPIO,
56 MPP28_GPIO,
57 MPP29_TSMP9,
58 MPP30_GPIO,
59 MPP31_GPIO,
60 MPP32_GPIO,
61 MPP33_GPIO,
62 MPP34_GPIO,
63 MPP35_GPIO,
64 MPP36_GPIO,
65 MPP37_GPIO,
66 MPP38_GPIO,
67 MPP39_GPIO,
68 MPP40_GPIO,
69 MPP41_GPIO,
70 MPP42_GPIO,
71 MPP43_GPIO,
72 MPP44_GPIO,
73 MPP45_GPIO,
74 MPP46_GPIO,
75 MPP47_GPIO,
76 MPP48_GPIO,
77 MPP49_GPIO,
78 0
79 };
80
81 /*
82 * default gpio configuration
83 * There are maximum 64 gpios controlled through 2 sets of registers
84 * the below configuration configures mainly initial LED status
85 */
86 mvebu_config_gpio(GOFLEXHOME_OE_VAL_LOW,
87 GOFLEXHOME_OE_VAL_HIGH,
88 GOFLEXHOME_OE_LOW, GOFLEXHOME_OE_HIGH);
89 kirkwood_mpp_conf(kwmpp_config, NULL);
90 return 0;
91 }
92
board_init(void)93 int board_init(void)
94 {
95 /*
96 * arch number of board
97 */
98 gd->bd->bi_arch_number = MACH_TYPE_GOFLEXHOME;
99
100 /* address of boot parameters */
101 gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
102
103 return 0;
104 }
105
106 #ifdef CONFIG_RESET_PHY_R
107 /* Configure and enable MV88E1116 PHY */
reset_phy(void)108 void reset_phy(void)
109 {
110 u16 reg;
111 u16 devadr;
112 char *name = "egiga0";
113
114 if (miiphy_set_current_dev(name))
115 return;
116
117 /* command to read PHY dev address */
118 if (miiphy_read(name, 0xEE, 0xEE, (u16 *)&devadr)) {
119 printf("Err..%s could not read PHY dev address\n",
120 __func__);
121 return;
122 }
123
124 /*
125 * Enable RGMII delay on Tx and Rx for CPU port
126 * Ref: sec 4.7.2 of chip datasheet
127 */
128 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
129 miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, ®);
130 reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
131 miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
132 miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
133
134 /* reset the phy */
135 miiphy_reset(name, devadr);
136
137 printf("88E1116 Initialized on %s\n", name);
138 }
139 #endif /* CONFIG_RESET_PHY_R */
140
141 #define GREEN_LED (1 << 14)
142 #define ORANGE_LED (1 << 15)
143 #define BOTH_LEDS (GREEN_LED | ORANGE_LED)
144 #define NEITHER_LED 0
145
set_leds(u32 leds,u32 blinking)146 static void set_leds(u32 leds, u32 blinking)
147 {
148 struct kwgpio_registers *r;
149 u32 oe;
150 u32 bl;
151
152 r = (struct kwgpio_registers *)MVEBU_GPIO1_BASE;
153 oe = readl(&r->oe) | BOTH_LEDS;
154 writel(oe & ~leds, &r->oe); /* active low */
155 bl = readl(&r->blink_en) & ~BOTH_LEDS;
156 writel(bl | blinking, &r->blink_en);
157 }
158
show_boot_progress(int val)159 void show_boot_progress(int val)
160 {
161 switch (val) {
162 case BOOTSTAGE_ID_RUN_OS: /* booting Linux */
163 set_leds(BOTH_LEDS, NEITHER_LED);
164 break;
165 case BOOTSTAGE_ID_NET_ETH_START: /* Ethernet initialization */
166 set_leds(GREEN_LED, GREEN_LED);
167 break;
168 default:
169 if (val < 0) /* error */
170 set_leds(ORANGE_LED, ORANGE_LED);
171 break;
172 }
173 }
174