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/openbmc/linux/drivers/clk/ux500/
H A Du8500_of_clk.c131 u32 bases[CLKRST_MAX]; in u8500_clk_init() local
144 for (i = 0; i < ARRAY_SIZE(bases); i++) { in u8500_clk_init()
151 bases[i] = r.start; in u8500_clk_init()
303 clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
307 clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
311 clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
315 clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
319 clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
323 clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
327 clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
[all …]
H A Dreset-prcc.h13 * @base: the remapped PRCC bases
/openbmc/linux/include/linux/
H A Dposix-timers.h124 * @bases: Base container for posix CPU clocks
133 struct posix_cputimer_base bases[CPUCLOCK_MAX]; member
153 pct->bases[0].nextevt = U64_MAX; in posix_cputimers_init()
154 pct->bases[1].nextevt = U64_MAX; in posix_cputimers_init()
155 pct->bases[2].nextevt = U64_MAX; in posix_cputimers_init()
163 pct->bases[CPUCLOCK_SCHED].nextevt = runtime; in posix_cputimers_rt_watchdog()
179 .bases = INIT_CPU_TIMERBASES(s.posix_cputimers.bases), \
H A Dhrtimer.h183 * struct hrtimer_cpu_base - the per cpu clock bases
184 * @lock: lock protecting the base and associated clock bases
187 * @active_bases: Bitfield to mark bases with active timers
209 * @clock_base: array of clock bases for this cpu
/openbmc/openbmc/poky/meta/lib/oe/
H A Dclassutils.py9 def __init__(cls, name, bases, attrs): argument
11 type.__init__(cls, name, bases, attrs)
27 def __init__(cls, name, bases, attrs): argument
28 super(ClassRegistry, cls).__init__(name, bases, attrs)
/openbmc/openbmc/poky/meta/recipes-support/libpcre/libpcre/
H A DMakefile57 bases='$(TEST_LOGS)'; \
58 bases=`for i in $$bases; do echo $$i; done | sed 's/\.log$$//'`; \
59 bases=`echo $$bases`
75 redo_bases=`for i in $$bases; do \
89 results=`for b in $$bases; do echo $$b.trs; done`; \
139 for b in $$bases; do echo $$b; done; \
162 log_list=`for i in $$bases; do echo $$i.log; done`; \
/openbmc/linux/drivers/iommu/
H A Drockchip-iommu.c107 void __iomem **bases; member
350 writel(command, iommu->bases[i] + RK_MMU_COMMAND); in rk_iommu_command()
370 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines()
380 active &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_stall_active()
392 enable &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_paging_enabled()
404 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0; in rk_iommu_is_reset_done()
429 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_stall()
450 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_stall()
471 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_paging()
492 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_paging()
[all …]
/openbmc/linux/drivers/gpu/host1x/
H A Dsyncpt.c26 struct host1x_syncpt_base *bases = host->bases; in host1x_syncpt_base_request() local
30 if (!bases[i].requested) in host1x_syncpt_base_request()
36 bases[i].requested = true; in host1x_syncpt_base_request()
37 return &bases[i]; in host1x_syncpt_base_request()
282 struct host1x_syncpt_base *bases; in host1x_syncpt_init() local
291 bases = devm_kcalloc(host->dev, host->info->nb_bases, sizeof(*bases), in host1x_syncpt_init()
293 if (!bases) in host1x_syncpt_init()
302 bases[i].id = i; in host1x_syncpt_init()
306 host->bases = bases; in host1x_syncpt_init()
/openbmc/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dbase.c33 } bases[] = { in nv50_base_new() local
46 cid = nvif_mclass(&disp->disp->object, bases); in nv50_base_new()
52 return bases[cid].new(drm, head, bases[cid].oclass, pwndw); in nv50_base_new()
/openbmc/linux/include/xen/interface/
H A Dmemory.h27 * OUT: MFN (*not* GMFN) bases of extents that were allocated
29 * IN: GMFN bases of extents to free
31 * IN: GPFN bases of extents to populate with memory
32 * OUT: GMFN bases of extents that were allocated
68 * [IN] Details of memory extents to be exchanged (GMFN bases).
80 * 4. @out.extent_start lists GPFN bases to be populated
81 * 5. @out.extent_start is overwritten with allocated GMFN bases
116 * Returns a list of MFN bases of 2MB extents comprising the machine_to_phys
/openbmc/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-nvidia.c36 void __iomem *bases[MAX_SMMU_INSTANCES]; member
52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
324 nvidia_smmu->bases[0] = smmu->base; in nvidia_smmu_impl_init()
332 nvidia_smmu->bases[i] = devm_ioremap_resource(dev, res); in nvidia_smmu_impl_init()
333 if (IS_ERR(nvidia_smmu->bases[i])) in nvidia_smmu_impl_init()
334 return ERR_CAST(nvidia_smmu->bases[i]); in nvidia_smmu_impl_init()
/openbmc/u-boot/arch/x86/include/asm/arch-quark/
H A Diomap.h9 /* Memory Mapped IO bases */
27 /* IO Port bases */
/openbmc/u-boot/arch/x86/include/asm/arch-braswell/
H A Diomap.h9 /* Memory Mapped IO bases */
39 /* IO Port bases */
/openbmc/openbmc/poky/bitbake/lib/bb/
H A Dnamedtuple_with_abc.py49 def __new__(mcls, name, bases, namespace): argument
51 for base in bases:
57 bases = (basetuple,) + bases
61 return ABCMeta.__new__(mcls, name, bases, namespace)
/openbmc/linux/kernel/time/
H A Dposix-cpu-timers.c28 pct->bases[CPUCLOCK_PROF].nextevt = cpu_limit * NSEC_PER_SEC; in posix_cputimers_group_init()
35 * tsk->signal->posix_cputimers.bases[clock].nextevt expiration cache if
154 return !(~pct->bases[CPUCLOCK_PROF].nextevt | in expiry_cache_is_inactive()
155 ~pct->bases[CPUCLOCK_VIRT].nextevt | in expiry_cache_is_inactive()
156 ~pct->bases[CPUCLOCK_SCHED].nextevt); in expiry_cache_is_inactive()
422 return tsk->posix_cputimers.bases + clkidx; in timer_base()
424 return tsk->signal->posix_cputimers.bases + clkidx; in timer_base()
533 cleanup_timerqueue(&pct->bases[CPUCLOCK_PROF].tqhead); in cleanup_timers()
534 cleanup_timerqueue(&pct->bases[CPUCLOCK_VIRT].tqhead); in cleanup_timers()
535 cleanup_timerqueue(&pct->bases[CPUCLOCK_SCHED].tqhead); in cleanup_timers()
[all …]
H A Dhrtimer.c62 * The timer bases:
64 * There are more clockids than hrtimer bases. Thus, we index
65 * into the timer bases by the hrtimer_base_type enum. When trying
543 * the clock bases so the result might be negative. Fix it up in __hrtimer_next_event_base()
558 * When a softirq is pending, we can ignore the HRTIMER_ACTIVE_SOFT bases,
560 * hrtimer_run_softirq(), hrtimer_update_softirq_timer() will re-add these bases.
562 * Therefore softirq values are those from the HRTIMER_ACTIVE_SOFT clock bases.
603 * soft bases. They will be handled in the already raised soft in hrtimer_update_next_event()
862 * clock bases and reprogram the clock event device. in hrtimer_reprogram()
885 * bases. Either it will see the update before handling a base or in update_needs_ipi()
[all …]
/openbmc/qemu/include/hw/xen/interface/
H A Dmemory.h50 * OUT: MFN (*not* GMFN) bases of extents that were allocated
52 * IN: GMFN bases of extents to free
54 * IN: GPFN bases of extents to populate with memory
55 * OUT: GMFN bases of extents that were allocated
94 * [IN] Details of memory extents to be exchanged (GMFN bases).
106 * 4. @out.extent_start lists GPFN bases to be populated
107 * 5. @out.extent_start is overwritten with allocated GMFN bases
155 * Returns a list of MFN bases of 2MB extents comprising the machine_to_phys
/openbmc/u-boot/arch/x86/include/asm/arch-baytrail/
H A Diomap.h12 /* Memory Mapped IO bases */
81 /* IO Port bases */
/openbmc/openbmc/poky/scripts/lib/wic/
H A Dpluginbase.py66 def __new__(cls, name, bases, attrs): argument
67 class_type = type.__new__(cls, name, bases, attrs)
/openbmc/linux/arch/x86/boot/
H A Dearly_serial_console.c77 static const int bases[] = { 0x3f8, 0x2f8 }; in parse_earlyprintk() local
86 port = bases[idx]; in parse_earlyprintk()
/openbmc/qemu/hw/i386/
H A Dacpi-build.h8 /* PCI Hot-plug registers bases. See docs/spec/acpi_pci_hotplug.txt */
/openbmc/openbmc/poky/bitbake/lib/toaster/orm/migrations/
H A D0003_customimagepackage.py22 bases=('orm.package',),
H A D0002_customimagerecipe.py22 bases=('orm.recipe',),
/openbmc/linux/arch/mips/include/asm/mach-loongson32/
H A Dloongson1.h17 /* Loongson 1 Register Bases */
/openbmc/u-boot/arch/nds32/include/asm/arch-ae3xx/
H A Dae3xx.h11 /* Hardware register bases */

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