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Searched +full:auto +full:- +full:cmd12 (Results 1 – 14 of 14) sorted by relevance

/openbmc/qemu/include/hw/sd/
H A Dsdhci.h8 * Based on MMC controller for Samsung S5PC1xx-based board emulation
60 uint32_t rspreg[4]; /* Response Registers 0-3 */
75 uint16_t acmd12errsts; /* Auto CMD12 error status register */
80 /* Read-only registers */
90 /* Buffer Data Port Register - virtual access point to R and W buffers */
91 /* Software Reset Register - always reads as 0 */
92 /* Force Event Auto CMD12 Error Interrupt Reg - write only */
93 /* Force Event Error Interrupt Register- write only */
115 * Controller does not provide transfer-complete interrupt when not
123 #define TYPE_PCI_SDHCI "sdhci-pci"
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/openbmc/u-boot/arch/arm/dts/
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR X11
11 interrupt-parent = <&gic>;
12 #address-cells = <2>;
13 #size-cells = <2>;
18 /* DRAM space - 1, size : 2 GB DRAM */
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <100000000>;
25 clock-output-names = "sysclk";
29 compatible = "fsl,ls2080a-clockgen";
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H A Dast2400.dtsi3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g4.dtsi
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm926ej-s";
54 compatible = "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <1>;
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H A Dls1021a.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013-2015 Freescale Semiconductor, Inc.
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <0>;
30 compatible = "arm,cortex-a7";
37 compatible = "arm,cortex-a7";
45 compatible = "arm,armv7-timer";
53 compatible = "arm,cortex-a7-pmu";
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H A Dast2500.dtsi3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
38 #address-cells = <1>;
39 #size-cells = <0>;
42 compatible = "arm,arm1176jzf-s";
54 compatible = "simple-bus";
55 #address-cells = <1>;
56 #size-cells = <1>;
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H A Dast2600.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
3 #include <dt-bindings/gpio/aspeed-gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
46 #address-cells = <1>;
47 #size-cells = <0>;
48 enable-method = "aspeed,ast2600-smp";
51 compatible = "arm,cortex-a7";
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/openbmc/u-boot/drivers/mmc/
H A Dtmio-common.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #define TMIO_SD_CMD_NOSTOP BIT(14) /* No automatic CMD12 issue */
16 #define TMIO_SD_CMD_NORMAL (0 << 8)/* auto-detect of resp-type */
25 #define TMIO_SD_STOP_STP BIT(0) /* issue CMD12 */
94 #define TMIO_SD_DMA_CTL_START BIT(0) /* start DMA (auto cleared) */
H A Dsh_mmcif.h1 /* SPDX-License-Identifier: GPL-2.0 */
51 /* 1: CMD12 auto issue */
H A Dtegra_mmc.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Portions Copyright 2011-2016 NVIDIA Corporation
16 #include <asm/arch-tegra/tegra_mmc.h>
40 if (power != (unsigned short)-1) { in tegra_mmc_set_power()
58 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power()
64 writeb(pwr, &priv->reg->pwrcon); in tegra_mmc_set_power()
74 debug("buf: %p (%p), data->blocks: %u, data->blocksize: %u\n", in tegra_mmc_prepare_data()
75 bbstate->bounce_buffer, bbstate->user_buffer, data->blocks, in tegra_mmc_prepare_data()
76 data->blocksize); in tegra_mmc_prepare_data()
78 writel((u32)(unsigned long)bbstate->bounce_buffer, &priv->reg->sysad); in tegra_mmc_prepare_data()
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H A Dtmio-common.c1 // SPDX-License-Identifier: GPL-2.0+
14 #include <linux/dma-direction.h>
20 #include "tmio-common.h"
26 return readq(priv->regbase + (reg << 1)); in tmio_sd_readq()
32 writeq(val, priv->regbase + (reg << 1)); in tmio_sd_writeq()
37 return readw(priv->regbase + (reg >> 1)); in tmio_sd_readw()
43 writew(val, priv->regbase + (reg >> 1)); in tmio_sd_writew()
50 if (priv->caps & TMIO_SD_CAP_64BIT) in tmio_sd_readl()
51 return readl(priv->regbase + (reg << 1)); in tmio_sd_readl()
52 else if (priv->caps & TMIO_SD_CAP_16BIT) { in tmio_sd_readl()
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/openbmc/qemu/hw/sd/
H A Dsdhci-internal.h8 * Based on MMC controller for Samsung S5PC1xx-based board emulation
188 /* ROC Auto CMD12 error status register 0x0 */
197 FIELD(SDHC_HOSTCTL2, V18_ENA, 3, 1); /* UHS-I only */
198 FIELD(SDHC_HOSTCTL2, DRIVER_STRENGTH, 4, 2); /* UHS-I only */
199 FIELD(SDHC_HOSTCTL2, EXECUTE_TUNING, 6, 1); /* UHS-I only */
200 FIELD(SDHC_HOSTCTL2, SAMPLING_CLKSEL, 7, 1); /* UHS-I only */
247 /* W Force Event Auto CMD12 Error Interrupt Register 0x0000 */
296 * - 3.3v and 1.8v voltages
297 * - SDMA/ADMA1/ADMA2
298 * - high-speed
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H A Dallwinner-sdhost.c27 #include "hw/qdev-properties.h"
29 #include "hw/sd/allwinner-sdhost.h"
34 #define TYPE_AW_SDHOST_BUS "allwinner-sdhost-bus"
60 REG_SD_A12A = 0x58, /* Auto command 12 argument */
80 REG_SD_SAMP_DL = 0x144, /* Sample Delay Control (sun50i-a64) */
189 if (s->global_ctl & SD_GCTL_INT_ENB) { in allwinner_sdhost_update_irq()
190 irq = s->irq_status & s->irq_mask; in allwinner_sdhost_update_irq()
196 qemu_set_irq(s->irq, !!irq); in allwinner_sdhost_update_irq()
202 if (s->transfer_cnt > bytes) { in allwinner_sdhost_update_transfer_cnt()
203 s->transfer_cnt -= bytes; in allwinner_sdhost_update_transfer_cnt()
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H A Dsdhci.c10 * Based on MMC controller for Samsung S5PC1xx-based board emulation
29 #include "qemu/error-report.h"
32 #include "hw/qdev-properties.h"
38 #include "sdhci-internal.h"
43 #define TYPE_SDHCI_BUS "sdhci-bus"
52 return 1 << (9 + FIELD_EX32(s->capareg, SDHC_CAPAB, MAXBLOCKLENGTH)); in DECLARE_INSTANCE_CHECKER()
59 if (s->sd_spec_version >= 3) { in sdhci_check_capab_freq_range()
68 "in range 0-63 only", desc); in sdhci_check_capab_freq_range()
76 uint64_t msk = s->capareg; in sdhci_check_capareg()
80 switch (s->sd_spec_version) { in sdhci_check_capareg()
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/openbmc/qemu/hw/ppc/
H A De500.c2 * QEMU PowerPC e500-based platforms
20 #include "qemu/guest-random.h"
23 #include "cpu-models.h"
25 #include "e500-ccsr.h"
27 #include "qemu/config-file.h"
29 #include "hw/char/serial-mm.h"
31 #include "system/block-backend-io.h"
41 #include "hw/qdev-properties.h"
45 #include "qemu/host-utils.h"
47 #include "hw/pci-host/ppce500.h"
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