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/openbmc/linux/Documentation/devicetree/bindings/i3c/
H A Di3c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
11 - Miquel Raynal <miquel.raynal@bootlin.com>
20 pattern: "^i3c-master@[0-9a-f]+$"
22 "#address-cells":
27 All I3C devices are supposed to support DAA (Dynamic Address Assignment),
35 this I3C device has a static I2C address and we want to assign it a
36 specific I3C dynamic address before the DAA takes place (so that other
[all …]
/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema/
H A DIPAddresses.v1_1_5.json3 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
4 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
14 …"Deprecated": "This address is currently within its valid lifetime but is now outside its RFC4862-…
15 …"Failed": "This address has failed Duplicate Address Detection (DAD) testing, as defined in RFC486…
16 …"Preferred": "This address is currently within both its RFC4862-defined valid and preferred lifeti…
17 …"Tentative": "This address is currently undergoing Duplicate Address Detection (DAD) testing, as d…
23 "description": "This type describes an IPv4 address.",
24 "longDescription": "This type shall describe an IPv4 address assigned to an interface.",
26 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
40 "Address": { object
[all …]
/openbmc/bmcweb/redfish-core/schema/dmtf/json-schema-installed/
H A DIPAddresses.v1_1_5.json3 "$schema": "http://redfish.dmtf.org/schemas/v1/redfish-schema-v1.json",
4 …"copyright": "Copyright 2014-2024 DMTF. For the full DMTF copyright policy, see http://www.dmtf.or…
14 …"Deprecated": "This address is currently within its valid lifetime but is now outside its RFC4862-…
15 …"Failed": "This address has failed Duplicate Address Detection (DAD) testing, as defined in RFC486…
16 …"Preferred": "This address is currently within both its RFC4862-defined valid and preferred lifeti…
17 …"Tentative": "This address is currently undergoing Duplicate Address Detection (DAD) testing, as d…
23 "description": "This type describes an IPv4 address.",
24 "longDescription": "This type shall describe an IPv4 address assigned to an interface.",
26 "^([a-zA-Z_][a-zA-Z0-9_]*)?@(odata|Redfish|Message)\\.[a-zA-Z_][a-zA-Z0-9_]*$": {
40 "Address": { object
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8ulp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8ulp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/imx8ulp-power.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8ulp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
H A Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
[all …]
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j721s2-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
H A Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
H A Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
H A Dk3-j784s4-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 bootph-all;
11 compatible = "ti,k2g-sci";
12 ti,host-id = <12>;
14 mbox-names = "rx", "tx";
19 reg-names = "debug_messages";
22 k3_pds: power-controller {
23 bootph-all;
[all …]
H A Dk3-am62-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
19 #address-cells = <2>;
20 #size-cells = <2>;
22 #interrupt-cells = <3>;
[all …]
H A Dk3-am62a-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
17 gic500: interrupt-controller@1800000 {
18 compatible = "arm,gic-v3";
25 #address-cells = <2>;
26 #size-cells = <2>;
28 #interrupt-cells = <3>;
[all …]
H A Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
[all …]
H A Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sram";
19 #address-cells = <1>;
20 #size-cells = <1>;
23 atf-sram@0 {
28 scm_conf: scm-conf@100000 {
[all …]
H A Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-bindings/mux/mux.h>
11 #include "k3-serdes.h"
14 cmn_refclk: clock-cmnrefclk {
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
17 clock-frequency = <0>;
[all …]
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra-audio-graph-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Sameer Pujar <spujar@nvidia.com>
19 - $ref: audio-graph.yaml#
24 - nvidia,tegra210-audio-graph-card
25 - nvidia,tegra186-audio-graph-card
30 clock-names:
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/dma/at91.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/mfd/at91-usart.h>
19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
[all …]
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-j721e-wiz.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/phy/ti,phy-j721e-wiz.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Kishon Vijay Abraham I <kishon@ti.com>
16 - ti,j721e-wiz-16g
17 - ti,j721e-wiz-10g
18 - ti,j721s2-wiz-10g
19 - ti,am64-wiz-10g
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-imx8dx.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include "fsl-imx8-ca35.dtsi"
8 #include <dt-bindings/soc/imx_rsrc.h>
9 #include <dt-bindings/soc/imx8_pd.h>
10 #include <dt-bindings/clock/imx8qxp-clock.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/pinctrl/pads-imx8qxp.h>
13 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
[all …]
H A Dimx7ulp.dtsi2 * Copyright 2015-2016 Freescale Semiconductor, Inc.
9 #include <dt-bindings/clock/imx7ulp-clock.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx7ulp-pinfunc.h"
16 interrupt-parent = <&intc>;
37 #address-cells = <1>;
38 #size-cells = <0>;
41 compatible = "arm,cortex-a7";
47 reserved-memory {
[all …]
/openbmc/linux/Documentation/devicetree/bindings/ufs/
H A Dti,j721e-ufs.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vignesh Raghavendra <vigneshr@ti.com>
15 - const: ti,j721e-ufs
19 description: address of TI UFS glue registers
23 description: phandle to the M-PHY clock
25 power-domains:
28 assigned-clocks:
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/i2c/
H A Dsony,imx335.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul J. Murphy <paul.j.murphy@intel.com>
12 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
17 I2C client address is fixed to 0x1a as per sensor data sheet. Image data is
18 sent through MIPI CSI-2.
24 description: I2C address
27 assigned-clocks: true
28 assigned-clock-parents: true
[all …]
H A Dsony,imx334.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul J. Murphy <paul.j.murphy@intel.com>
12 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
17 I2C client address is fixed to 0x1a as per sensor data sheet. Image data is
18 sent through MIPI CSI-2.
24 description: I2C address
27 assigned-clocks: true
28 assigned-clock-parents: true
[all …]
H A Dsony,imx412.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Paul J. Murphy <paul.j.murphy@intel.com>
12 - Daniele Alessandrelli <daniele.alessandrelli@intel.com>
17 I2C client address is fixed to 0x1a as per sensor data sheet. Image data is
18 sent through MIPI CSI-2.
23 - sony,imx412
24 - sony,imx577
26 description: I2C address
[all …]

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